diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_alpha_head.c gxemul-0.7.0/src/cpus/tmp_alpha_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_alpha_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_alpha_head.c	2022-10-18 16:37:22.074736200 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES ALPHA_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH alpha
+#define DYNTRANS_ALPHA
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N ALPHA_L2N
+#define DYNTRANS_L3N ALPHA_L3N
+#if !defined(ALPHA_L2N) || !defined(ALPHA_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE alpha_l2_64_table
+#define DYNTRANS_L3_64_TABLE alpha_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC alpha_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE ALPHA_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT ALPHA_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE alpha_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY alpha_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR ALPHA_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY ALPHA_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE alpha_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE alpha_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS alpha_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC alpha_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS alpha_combine_instructions
+#define DISASSEMBLE alpha_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_alpha_instr.c */
+#define instr(n) alpha_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) alpha32_instr_ ## n
+
+#endif
+
+
+#define X(n) void alpha_instr_ ## n(struct cpu *cpu, \
+ struct alpha_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.alpha.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct alpha_instr_call nothing_call = { instr(nothing), {0,0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_alpha_misc.c gxemul-0.7.0/src/cpus/tmp_alpha_misc.c
--- gxemul-0.7.0.orig/src/cpus/tmp_alpha_misc.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_alpha_misc.c	2022-10-18 16:37:22.075737100 +0000
@@ -0,0 +1,4119 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#define ALU_N alpha_instr_addl
+#define ALU_LONG
+#define ALU_ADD
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_LONG
+#undef ALU_ADD
+#undef ALU_N
+#define ALU_N alpha_instr_subl
+#define ALU_LONG
+#define ALU_SUB
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_LONG
+#undef ALU_SUB
+#undef ALU_N
+#define ALU_N alpha_instr_s4addl
+#define ALU_LONG
+#define ALU_ADD
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_LONG
+#undef ALU_ADD
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s4subl
+#define ALU_LONG
+#define ALU_SUB
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_LONG
+#undef ALU_SUB
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s8addl
+#define ALU_LONG
+#define ALU_ADD
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_LONG
+#undef ALU_ADD
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_s8subl
+#define ALU_LONG
+#define ALU_SUB
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_LONG
+#undef ALU_SUB
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_addq
+#define ALU_ADD
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_ADD
+#undef ALU_N
+#define ALU_N alpha_instr_subq
+#define ALU_SUB
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_SUB
+#undef ALU_N
+#define ALU_N alpha_instr_s4addq
+#define ALU_ADD
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_ADD
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s4subq
+#define ALU_SUB
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_SUB
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s8addq
+#define ALU_ADD
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_ADD
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_s8subq
+#define ALU_SUB
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_SUB
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_addl_imm
+#define ALU_IMM
+#define ALU_LONG
+#define ALU_ADD
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_LONG
+#undef ALU_ADD
+#undef ALU_N
+#define ALU_N alpha_instr_subl_imm
+#define ALU_IMM
+#define ALU_LONG
+#define ALU_SUB
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_LONG
+#undef ALU_SUB
+#undef ALU_N
+#define ALU_N alpha_instr_s4addl_imm
+#define ALU_IMM
+#define ALU_LONG
+#define ALU_ADD
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_LONG
+#undef ALU_ADD
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s4subl_imm
+#define ALU_IMM
+#define ALU_LONG
+#define ALU_SUB
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_LONG
+#undef ALU_SUB
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s8addl_imm
+#define ALU_IMM
+#define ALU_LONG
+#define ALU_ADD
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_LONG
+#undef ALU_ADD
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_s8subl_imm
+#define ALU_IMM
+#define ALU_LONG
+#define ALU_SUB
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_LONG
+#undef ALU_SUB
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_addq_imm
+#define ALU_IMM
+#define ALU_ADD
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_ADD
+#undef ALU_N
+#define ALU_N alpha_instr_subq_imm
+#define ALU_IMM
+#define ALU_SUB
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_SUB
+#undef ALU_N
+#define ALU_N alpha_instr_s4addq_imm
+#define ALU_IMM
+#define ALU_ADD
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_ADD
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s4subq_imm
+#define ALU_IMM
+#define ALU_SUB
+#define ALU_S4
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_SUB
+#undef ALU_S4
+#undef ALU_N
+#define ALU_N alpha_instr_s8addq_imm
+#define ALU_IMM
+#define ALU_ADD
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_ADD
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_s8subq_imm
+#define ALU_IMM
+#define ALU_SUB
+#define ALU_S8
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_SUB
+#undef ALU_S8
+#undef ALU_N
+#define ALU_N alpha_instr_and
+#define ALU_AND
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_AND
+#undef ALU_N
+#define ALU_N alpha_instr_or
+#define ALU_OR
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_OR
+#undef ALU_N
+#define ALU_N alpha_instr_xor
+#define ALU_XOR
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_XOR
+#undef ALU_N
+#define ALU_N alpha_instr_zap
+#define ALU_ZAP
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_ZAP
+#undef ALU_N
+#define ALU_N alpha_instr_sll
+#define ALU_SLL
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_SLL
+#undef ALU_N
+#define ALU_N alpha_instr_srl
+#define ALU_SRL
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_SRL
+#undef ALU_N
+#define ALU_N alpha_instr_sra
+#define ALU_SRA
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_SRA
+#undef ALU_N
+#define ALU_N alpha_instr_andnot
+#define ALU_AND
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_NOT
+#undef ALU_AND
+#undef ALU_N
+#define ALU_N alpha_instr_ornot
+#define ALU_OR
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_NOT
+#undef ALU_OR
+#undef ALU_N
+#define ALU_N alpha_instr_xornot
+#define ALU_XOR
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_NOT
+#undef ALU_XOR
+#undef ALU_N
+#define ALU_N alpha_instr_zapnot
+#define ALU_ZAP
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_NOT
+#undef ALU_ZAP
+#undef ALU_N
+#define ALU_N alpha_instr_and_imm
+#define ALU_IMM
+#define ALU_AND
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_AND
+#undef ALU_N
+#define ALU_N alpha_instr_or_imm
+#define ALU_IMM
+#define ALU_OR
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_OR
+#undef ALU_N
+#define ALU_N alpha_instr_xor_imm
+#define ALU_IMM
+#define ALU_XOR
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_XOR
+#undef ALU_N
+#define ALU_N alpha_instr_zap_imm
+#define ALU_IMM
+#define ALU_ZAP
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_ZAP
+#undef ALU_N
+#define ALU_N alpha_instr_sll_imm
+#define ALU_IMM
+#define ALU_SLL
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_SLL
+#undef ALU_N
+#define ALU_N alpha_instr_srl_imm
+#define ALU_IMM
+#define ALU_SRL
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_SRL
+#undef ALU_N
+#define ALU_N alpha_instr_sra_imm
+#define ALU_IMM
+#define ALU_SRA
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_SRA
+#undef ALU_N
+#define ALU_N alpha_instr_andnot_imm
+#define ALU_IMM
+#define ALU_AND
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_NOT
+#undef ALU_AND
+#undef ALU_N
+#define ALU_N alpha_instr_ornot_imm
+#define ALU_IMM
+#define ALU_OR
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_NOT
+#undef ALU_OR
+#undef ALU_N
+#define ALU_N alpha_instr_xornot_imm
+#define ALU_IMM
+#define ALU_XOR
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_NOT
+#undef ALU_XOR
+#undef ALU_N
+#define ALU_N alpha_instr_zapnot_imm
+#define ALU_IMM
+#define ALU_ZAP
+#define ALU_NOT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_NOT
+#undef ALU_ZAP
+#undef ALU_N
+#define ALU_CMP
+#define ALU_N alpha_instr_cmpult
+#define ALU_UNSIGNED
+#define ALU_CMP_LT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_UNSIGNED
+#undef ALU_CMP_LT
+#undef ALU_N
+#define ALU_N alpha_instr_cmpeq
+#define ALU_CMP_EQ
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMP_EQ
+#undef ALU_N
+#define ALU_N alpha_instr_cmpule
+#define ALU_UNSIGNED
+#define ALU_CMP_LE
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_UNSIGNED
+#undef ALU_CMP_LE
+#undef ALU_N
+#define ALU_N alpha_instr_cmplt
+#define ALU_CMP_LT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMP_LT
+#undef ALU_N
+#define ALU_N alpha_instr_cmple
+#define ALU_CMP_LE
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMP_LE
+#undef ALU_N
+#define ALU_N alpha_instr_cmpult_imm
+#define ALU_IMM
+#define ALU_UNSIGNED
+#define ALU_CMP_LT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_UNSIGNED
+#undef ALU_CMP_LT
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmpeq_imm
+#define ALU_IMM
+#define ALU_CMP_EQ
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMP_EQ
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmpule_imm
+#define ALU_IMM
+#define ALU_UNSIGNED
+#define ALU_CMP_LE
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_UNSIGNED
+#undef ALU_CMP_LE
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmplt_imm
+#define ALU_IMM
+#define ALU_CMP_LT
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMP_LT
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmple_imm
+#define ALU_IMM
+#define ALU_CMP_LE
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMP_LE
+#undef ALU_IMM
+#undef ALU_N
+#undef ALU_CMP
+#define ALU_CMOV
+#define ALU_N alpha_instr_cmovlbs
+#define ALU_CMOV_lbs
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_lbs
+#undef ALU_N
+#define ALU_N alpha_instr_cmovlbc
+#define ALU_CMOV_lbc
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_lbc
+#undef ALU_N
+#define ALU_N alpha_instr_cmoveq
+#define ALU_CMOV_eq
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_eq
+#undef ALU_N
+#define ALU_N alpha_instr_cmovne
+#define ALU_CMOV_ne
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_ne
+#undef ALU_N
+#define ALU_N alpha_instr_cmovlt
+#define ALU_CMOV_lt
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_lt
+#undef ALU_N
+#define ALU_N alpha_instr_cmovge
+#define ALU_CMOV_ge
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_ge
+#undef ALU_N
+#define ALU_N alpha_instr_cmovle
+#define ALU_CMOV_le
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_le
+#undef ALU_N
+#define ALU_N alpha_instr_cmovgt
+#define ALU_CMOV_gt
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_gt
+#undef ALU_N
+#define ALU_N alpha_instr_cmovlbs_imm
+#define ALU_IMM
+#define ALU_CMOV_lbs
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_lbs
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmovlbc_imm
+#define ALU_IMM
+#define ALU_CMOV_lbc
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_lbc
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmoveq_imm
+#define ALU_IMM
+#define ALU_CMOV_eq
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_eq
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmovne_imm
+#define ALU_IMM
+#define ALU_CMOV_ne
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_ne
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmovlt_imm
+#define ALU_IMM
+#define ALU_CMOV_lt
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_lt
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmovge_imm
+#define ALU_IMM
+#define ALU_CMOV_ge
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_ge
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmovle_imm
+#define ALU_IMM
+#define ALU_CMOV_le
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_le
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_N alpha_instr_cmovgt_imm
+#define ALU_IMM
+#define ALU_CMOV_gt
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_CMOV_gt
+#undef ALU_IMM
+#undef ALU_N
+#undef ALU_CMOV
+#define ALU_CMPBGE
+#define ALU_N alpha_instr_cmpbge
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_N
+#define ALU_N alpha_instr_cmpbge_imm
+#define ALU_IMM
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_IMM
+#undef ALU_N
+#undef ALU_CMPBGE
+#define ALU_MSK
+#define ALU_N alpha_instr_mskwh
+#define ALU_W
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_MSK
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_msklh
+#define ALU_L
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_MSK
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskqh
+#define ALU_Q
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_MSK
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extwh
+#define ALU_W
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_EXT
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extlh
+#define ALU_L
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_EXT
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extqh
+#define ALU_Q
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_EXT
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_inswh
+#define ALU_W
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_INS
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_inslh
+#define ALU_L
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_INS
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insqh
+#define ALU_Q
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_INS
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskbl
+#define ALU_B
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_B
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskwl
+#define ALU_W
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskll
+#define ALU_L
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskql
+#define ALU_Q
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extbl
+#define ALU_B
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_B
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extwl
+#define ALU_W
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extll
+#define ALU_L
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extql
+#define ALU_Q
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insbl
+#define ALU_B
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_B
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_inswl
+#define ALU_W
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insll
+#define ALU_L
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insql
+#define ALU_Q
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskwh_imm
+#define ALU_IMM
+#define ALU_W
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_MSK
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_msklh_imm
+#define ALU_IMM
+#define ALU_L
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_MSK
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskqh_imm
+#define ALU_IMM
+#define ALU_Q
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_MSK
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extwh_imm
+#define ALU_IMM
+#define ALU_W
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_EXT
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extlh_imm
+#define ALU_IMM
+#define ALU_L
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_EXT
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extqh_imm
+#define ALU_IMM
+#define ALU_Q
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_EXT
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_inswh_imm
+#define ALU_IMM
+#define ALU_W
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_INS
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_inslh_imm
+#define ALU_IMM
+#define ALU_L
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_INS
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insqh_imm
+#define ALU_IMM
+#define ALU_Q
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_INS
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskbl_imm
+#define ALU_IMM
+#define ALU_B
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_B
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskwl_imm
+#define ALU_IMM
+#define ALU_W
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskll_imm
+#define ALU_IMM
+#define ALU_L
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_MSK
+#define ALU_N alpha_instr_mskql_imm
+#define ALU_IMM
+#define ALU_Q
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_MSK
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extbl_imm
+#define ALU_IMM
+#define ALU_B
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_B
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extwl_imm
+#define ALU_IMM
+#define ALU_W
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extll_imm
+#define ALU_IMM
+#define ALU_L
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_EXT
+#define ALU_N alpha_instr_extql_imm
+#define ALU_IMM
+#define ALU_Q
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_EXT
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insbl_imm
+#define ALU_IMM
+#define ALU_B
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_B
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_inswl_imm
+#define ALU_IMM
+#define ALU_W
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_W
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insll_imm
+#define ALU_IMM
+#define ALU_L
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_L
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define ALU_INS
+#define ALU_N alpha_instr_insql_imm
+#define ALU_IMM
+#define ALU_Q
+#define ALU_LO
+#include "cpu_alpha_instr_alu.c"
+#undef ALU_Q
+#undef ALU_INS
+#undef ALU_LO
+#undef ALU_IMM
+#undef ALU_N
+#define LS_B
+#define LS_GENERIC_N alpha_generic_stb
+#define LS_N alpha_instr_stb
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#define LS_W
+#define LS_GENERIC_N alpha_generic_stw
+#define LS_N alpha_instr_stw
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#define LS_L
+#define LS_GENERIC_N alpha_generic_stl
+#define LS_N alpha_instr_stl
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_stq
+#define LS_N alpha_instr_stq
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#define LS_IGNORE_OFFSET
+#define LS_B
+#define LS_GENERIC_N alpha_generic_stb
+#define LS_N alpha_instr_stb_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_W
+#define LS_GENERIC_N alpha_generic_stw
+#define LS_N alpha_instr_stw_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_L
+#define LS_GENERIC_N alpha_generic_stl
+#define LS_N alpha_instr_stl_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_stq
+#define LS_N alpha_instr_stq_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_B
+#define LS_GENERIC_N alpha_generic_ldb
+#define LS_N alpha_instr_ldb
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_W
+#define LS_GENERIC_N alpha_generic_ldw
+#define LS_N alpha_instr_ldw
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_L
+#define LS_GENERIC_N alpha_generic_ldl
+#define LS_N alpha_instr_ldl
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_ldq
+#define LS_N alpha_instr_ldq
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_LOAD
+#define LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_B
+#define LS_GENERIC_N alpha_generic_ldb
+#define LS_N alpha_instr_ldb_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_LOAD
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_W
+#define LS_GENERIC_N alpha_generic_ldw
+#define LS_N alpha_instr_ldw_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_LOAD
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_L
+#define LS_GENERIC_N alpha_generic_ldl
+#define LS_N alpha_instr_ldl_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#undef LS_LOAD
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_ldq
+#define LS_N alpha_instr_ldq_0
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_LOAD
+#undef LS_IGNORE_OFFSET
+#define LS_LLSC
+#define LS_L
+#define LS_GENERIC_N alpha_generic_stl_llsc
+#define LS_N alpha_instr_stl_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#undef LS_LLSC
+#define LS_LLSC
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_stq_llsc
+#define LS_N alpha_instr_stq_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_LLSC
+#define LS_IGNORE_OFFSET
+#define LS_LLSC
+#define LS_L
+#define LS_GENERIC_N alpha_generic_stl_llsc
+#define LS_N alpha_instr_stl_0_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#undef LS_LLSC
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_LLSC
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_stq_llsc
+#define LS_N alpha_instr_stq_0_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_LLSC
+#undef LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_LLSC
+#define LS_L
+#define LS_GENERIC_N alpha_generic_ldl_llsc
+#define LS_N alpha_instr_ldl_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#undef LS_LOAD
+#undef LS_LLSC
+#define LS_LOAD
+#define LS_LLSC
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_ldq_llsc
+#define LS_N alpha_instr_ldq_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_LOAD
+#undef LS_LLSC
+#define LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_LLSC
+#define LS_L
+#define LS_GENERIC_N alpha_generic_ldl_llsc
+#define LS_N alpha_instr_ldl_0_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_L
+#undef LS_LOAD
+#undef LS_LLSC
+#undef LS_IGNORE_OFFSET
+#define LS_IGNORE_OFFSET
+#define LS_LOAD
+#define LS_LLSC
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_ldq_llsc
+#define LS_N alpha_instr_ldq_0_llsc
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_LOAD
+#undef LS_LLSC
+#undef LS_IGNORE_OFFSET
+#define LS_UNALIGNED
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_stq_u
+#define LS_N alpha_instr_stq_u
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#define LS_LOAD
+#define LS_Q
+#define LS_GENERIC_N alpha_generic_ldq_u
+#define LS_N alpha_instr_ldq_u
+#include "cpu_alpha_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_Q
+#undef LS_LOAD
+#undef LS_UNALIGNED
+
+
+void (*alpha_loadstore[32])(struct cpu *, struct alpha_instr_call *) = {
+	alpha_instr_stb,
+	alpha_instr_stw,
+	alpha_instr_stl,
+	alpha_instr_stq,
+	alpha_instr_stb_0,
+	alpha_instr_stw_0,
+	alpha_instr_stl_0,
+	alpha_instr_stq_0,
+	alpha_instr_ldb,
+	alpha_instr_ldw,
+	alpha_instr_ldl,
+	alpha_instr_ldq,
+	alpha_instr_ldb_0,
+	alpha_instr_ldw_0,
+	alpha_instr_ldl_0,
+	alpha_instr_ldq_0,
+	alpha_instr_nop,
+	alpha_instr_nop,
+	alpha_instr_stl_llsc,
+	alpha_instr_stq_llsc,
+	alpha_instr_nop,
+	alpha_instr_nop,
+	alpha_instr_stl_0_llsc,
+	alpha_instr_stq_0_llsc,
+	alpha_instr_nop,
+	alpha_instr_nop,
+	alpha_instr_ldl_llsc,
+	alpha_instr_ldq_llsc,
+	alpha_instr_nop,
+	alpha_instr_nop,
+	alpha_instr_ldl_0_llsc,
+	alpha_instr_ldq_0_llsc,
+};
+
+static void alpha_instr_mov_0_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_0_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[0]; }
+static void alpha_instr_mov_1_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_1_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[1]; }
+static void alpha_instr_mov_2_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_2_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[2]; }
+static void alpha_instr_mov_3_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_3_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[3]; }
+static void alpha_instr_mov_4_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_4_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[4]; }
+static void alpha_instr_mov_5_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_5_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[5]; }
+static void alpha_instr_mov_6_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_6_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[6]; }
+static void alpha_instr_mov_7_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_7_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[7]; }
+static void alpha_instr_mov_8_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_8_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[8]; }
+static void alpha_instr_mov_9_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_9_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[9]; }
+static void alpha_instr_mov_10_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_10_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[10]; }
+static void alpha_instr_mov_11_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_11_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[11]; }
+static void alpha_instr_mov_12_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_12_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[12]; }
+static void alpha_instr_mov_13_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_13_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[13]; }
+static void alpha_instr_mov_14_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_14_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[14]; }
+static void alpha_instr_mov_15_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_15_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[15]; }
+static void alpha_instr_mov_16_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_16_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[16]; }
+static void alpha_instr_mov_17_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_17_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[17]; }
+static void alpha_instr_mov_18_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_18_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[18]; }
+static void alpha_instr_mov_19_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_19_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[19]; }
+static void alpha_instr_mov_20_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_20_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[20]; }
+static void alpha_instr_mov_21_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_21_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[21]; }
+static void alpha_instr_mov_22_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_22_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[22]; }
+static void alpha_instr_mov_23_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_23_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[23]; }
+static void alpha_instr_mov_24_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_24_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[24]; }
+static void alpha_instr_mov_25_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_25_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[25]; }
+static void alpha_instr_mov_26_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_26_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[26]; }
+static void alpha_instr_mov_27_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_27_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[27]; }
+static void alpha_instr_mov_28_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_28_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[28]; }
+static void alpha_instr_mov_29_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_29_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = cpu->cd.alpha.r[29]; }
+static void alpha_instr_mov_30_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_30_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = cpu->cd.alpha.r[30]; }
+static void alpha_instr_mov_31_0(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[0] = 0; }
+static void alpha_instr_mov_31_1(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[1] = 0; }
+static void alpha_instr_mov_31_2(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[2] = 0; }
+static void alpha_instr_mov_31_3(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[3] = 0; }
+static void alpha_instr_mov_31_4(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[4] = 0; }
+static void alpha_instr_mov_31_5(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[5] = 0; }
+static void alpha_instr_mov_31_6(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[6] = 0; }
+static void alpha_instr_mov_31_7(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[7] = 0; }
+static void alpha_instr_mov_31_8(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[8] = 0; }
+static void alpha_instr_mov_31_9(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[9] = 0; }
+static void alpha_instr_mov_31_10(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[10] = 0; }
+static void alpha_instr_mov_31_11(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[11] = 0; }
+static void alpha_instr_mov_31_12(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[12] = 0; }
+static void alpha_instr_mov_31_13(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[13] = 0; }
+static void alpha_instr_mov_31_14(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[14] = 0; }
+static void alpha_instr_mov_31_15(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[15] = 0; }
+static void alpha_instr_mov_31_16(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[16] = 0; }
+static void alpha_instr_mov_31_17(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[17] = 0; }
+static void alpha_instr_mov_31_18(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[18] = 0; }
+static void alpha_instr_mov_31_19(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[19] = 0; }
+static void alpha_instr_mov_31_20(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[20] = 0; }
+static void alpha_instr_mov_31_21(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[21] = 0; }
+static void alpha_instr_mov_31_22(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[22] = 0; }
+static void alpha_instr_mov_31_23(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[23] = 0; }
+static void alpha_instr_mov_31_24(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[24] = 0; }
+static void alpha_instr_mov_31_25(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[25] = 0; }
+static void alpha_instr_mov_31_26(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[26] = 0; }
+static void alpha_instr_mov_31_27(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[27] = 0; }
+static void alpha_instr_mov_31_28(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[28] = 0; }
+static void alpha_instr_mov_31_29(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[29] = 0; }
+static void alpha_instr_mov_31_30(struct cpu *cpu, struct alpha_instr_call *ic)
+{ cpu->cd.alpha.r[30] = 0; }
+
+
+void (*alpha_mov_r_r[32*31])(struct cpu *, struct alpha_instr_call *) = {
+	alpha_instr_nop,
+	alpha_instr_mov_1_0,
+	alpha_instr_mov_2_0,
+	alpha_instr_mov_3_0,
+	alpha_instr_mov_4_0,
+	alpha_instr_mov_5_0,
+	alpha_instr_mov_6_0,
+	alpha_instr_mov_7_0,
+	alpha_instr_mov_8_0,
+	alpha_instr_mov_9_0,
+	alpha_instr_mov_10_0,
+	alpha_instr_mov_11_0,
+	alpha_instr_mov_12_0,
+	alpha_instr_mov_13_0,
+	alpha_instr_mov_14_0,
+	alpha_instr_mov_15_0,
+	alpha_instr_mov_16_0,
+	alpha_instr_mov_17_0,
+	alpha_instr_mov_18_0,
+	alpha_instr_mov_19_0,
+	alpha_instr_mov_20_0,
+	alpha_instr_mov_21_0,
+	alpha_instr_mov_22_0,
+	alpha_instr_mov_23_0,
+	alpha_instr_mov_24_0,
+	alpha_instr_mov_25_0,
+	alpha_instr_mov_26_0,
+	alpha_instr_mov_27_0,
+	alpha_instr_mov_28_0,
+	alpha_instr_mov_29_0,
+	alpha_instr_mov_30_0,
+	alpha_instr_mov_31_0,
+	alpha_instr_mov_0_1,
+	alpha_instr_nop,
+	alpha_instr_mov_2_1,
+	alpha_instr_mov_3_1,
+	alpha_instr_mov_4_1,
+	alpha_instr_mov_5_1,
+	alpha_instr_mov_6_1,
+	alpha_instr_mov_7_1,
+	alpha_instr_mov_8_1,
+	alpha_instr_mov_9_1,
+	alpha_instr_mov_10_1,
+	alpha_instr_mov_11_1,
+	alpha_instr_mov_12_1,
+	alpha_instr_mov_13_1,
+	alpha_instr_mov_14_1,
+	alpha_instr_mov_15_1,
+	alpha_instr_mov_16_1,
+	alpha_instr_mov_17_1,
+	alpha_instr_mov_18_1,
+	alpha_instr_mov_19_1,
+	alpha_instr_mov_20_1,
+	alpha_instr_mov_21_1,
+	alpha_instr_mov_22_1,
+	alpha_instr_mov_23_1,
+	alpha_instr_mov_24_1,
+	alpha_instr_mov_25_1,
+	alpha_instr_mov_26_1,
+	alpha_instr_mov_27_1,
+	alpha_instr_mov_28_1,
+	alpha_instr_mov_29_1,
+	alpha_instr_mov_30_1,
+	alpha_instr_mov_31_1,
+	alpha_instr_mov_0_2,
+	alpha_instr_mov_1_2,
+	alpha_instr_nop,
+	alpha_instr_mov_3_2,
+	alpha_instr_mov_4_2,
+	alpha_instr_mov_5_2,
+	alpha_instr_mov_6_2,
+	alpha_instr_mov_7_2,
+	alpha_instr_mov_8_2,
+	alpha_instr_mov_9_2,
+	alpha_instr_mov_10_2,
+	alpha_instr_mov_11_2,
+	alpha_instr_mov_12_2,
+	alpha_instr_mov_13_2,
+	alpha_instr_mov_14_2,
+	alpha_instr_mov_15_2,
+	alpha_instr_mov_16_2,
+	alpha_instr_mov_17_2,
+	alpha_instr_mov_18_2,
+	alpha_instr_mov_19_2,
+	alpha_instr_mov_20_2,
+	alpha_instr_mov_21_2,
+	alpha_instr_mov_22_2,
+	alpha_instr_mov_23_2,
+	alpha_instr_mov_24_2,
+	alpha_instr_mov_25_2,
+	alpha_instr_mov_26_2,
+	alpha_instr_mov_27_2,
+	alpha_instr_mov_28_2,
+	alpha_instr_mov_29_2,
+	alpha_instr_mov_30_2,
+	alpha_instr_mov_31_2,
+	alpha_instr_mov_0_3,
+	alpha_instr_mov_1_3,
+	alpha_instr_mov_2_3,
+	alpha_instr_nop,
+	alpha_instr_mov_4_3,
+	alpha_instr_mov_5_3,
+	alpha_instr_mov_6_3,
+	alpha_instr_mov_7_3,
+	alpha_instr_mov_8_3,
+	alpha_instr_mov_9_3,
+	alpha_instr_mov_10_3,
+	alpha_instr_mov_11_3,
+	alpha_instr_mov_12_3,
+	alpha_instr_mov_13_3,
+	alpha_instr_mov_14_3,
+	alpha_instr_mov_15_3,
+	alpha_instr_mov_16_3,
+	alpha_instr_mov_17_3,
+	alpha_instr_mov_18_3,
+	alpha_instr_mov_19_3,
+	alpha_instr_mov_20_3,
+	alpha_instr_mov_21_3,
+	alpha_instr_mov_22_3,
+	alpha_instr_mov_23_3,
+	alpha_instr_mov_24_3,
+	alpha_instr_mov_25_3,
+	alpha_instr_mov_26_3,
+	alpha_instr_mov_27_3,
+	alpha_instr_mov_28_3,
+	alpha_instr_mov_29_3,
+	alpha_instr_mov_30_3,
+	alpha_instr_mov_31_3,
+	alpha_instr_mov_0_4,
+	alpha_instr_mov_1_4,
+	alpha_instr_mov_2_4,
+	alpha_instr_mov_3_4,
+	alpha_instr_nop,
+	alpha_instr_mov_5_4,
+	alpha_instr_mov_6_4,
+	alpha_instr_mov_7_4,
+	alpha_instr_mov_8_4,
+	alpha_instr_mov_9_4,
+	alpha_instr_mov_10_4,
+	alpha_instr_mov_11_4,
+	alpha_instr_mov_12_4,
+	alpha_instr_mov_13_4,
+	alpha_instr_mov_14_4,
+	alpha_instr_mov_15_4,
+	alpha_instr_mov_16_4,
+	alpha_instr_mov_17_4,
+	alpha_instr_mov_18_4,
+	alpha_instr_mov_19_4,
+	alpha_instr_mov_20_4,
+	alpha_instr_mov_21_4,
+	alpha_instr_mov_22_4,
+	alpha_instr_mov_23_4,
+	alpha_instr_mov_24_4,
+	alpha_instr_mov_25_4,
+	alpha_instr_mov_26_4,
+	alpha_instr_mov_27_4,
+	alpha_instr_mov_28_4,
+	alpha_instr_mov_29_4,
+	alpha_instr_mov_30_4,
+	alpha_instr_mov_31_4,
+	alpha_instr_mov_0_5,
+	alpha_instr_mov_1_5,
+	alpha_instr_mov_2_5,
+	alpha_instr_mov_3_5,
+	alpha_instr_mov_4_5,
+	alpha_instr_nop,
+	alpha_instr_mov_6_5,
+	alpha_instr_mov_7_5,
+	alpha_instr_mov_8_5,
+	alpha_instr_mov_9_5,
+	alpha_instr_mov_10_5,
+	alpha_instr_mov_11_5,
+	alpha_instr_mov_12_5,
+	alpha_instr_mov_13_5,
+	alpha_instr_mov_14_5,
+	alpha_instr_mov_15_5,
+	alpha_instr_mov_16_5,
+	alpha_instr_mov_17_5,
+	alpha_instr_mov_18_5,
+	alpha_instr_mov_19_5,
+	alpha_instr_mov_20_5,
+	alpha_instr_mov_21_5,
+	alpha_instr_mov_22_5,
+	alpha_instr_mov_23_5,
+	alpha_instr_mov_24_5,
+	alpha_instr_mov_25_5,
+	alpha_instr_mov_26_5,
+	alpha_instr_mov_27_5,
+	alpha_instr_mov_28_5,
+	alpha_instr_mov_29_5,
+	alpha_instr_mov_30_5,
+	alpha_instr_mov_31_5,
+	alpha_instr_mov_0_6,
+	alpha_instr_mov_1_6,
+	alpha_instr_mov_2_6,
+	alpha_instr_mov_3_6,
+	alpha_instr_mov_4_6,
+	alpha_instr_mov_5_6,
+	alpha_instr_nop,
+	alpha_instr_mov_7_6,
+	alpha_instr_mov_8_6,
+	alpha_instr_mov_9_6,
+	alpha_instr_mov_10_6,
+	alpha_instr_mov_11_6,
+	alpha_instr_mov_12_6,
+	alpha_instr_mov_13_6,
+	alpha_instr_mov_14_6,
+	alpha_instr_mov_15_6,
+	alpha_instr_mov_16_6,
+	alpha_instr_mov_17_6,
+	alpha_instr_mov_18_6,
+	alpha_instr_mov_19_6,
+	alpha_instr_mov_20_6,
+	alpha_instr_mov_21_6,
+	alpha_instr_mov_22_6,
+	alpha_instr_mov_23_6,
+	alpha_instr_mov_24_6,
+	alpha_instr_mov_25_6,
+	alpha_instr_mov_26_6,
+	alpha_instr_mov_27_6,
+	alpha_instr_mov_28_6,
+	alpha_instr_mov_29_6,
+	alpha_instr_mov_30_6,
+	alpha_instr_mov_31_6,
+	alpha_instr_mov_0_7,
+	alpha_instr_mov_1_7,
+	alpha_instr_mov_2_7,
+	alpha_instr_mov_3_7,
+	alpha_instr_mov_4_7,
+	alpha_instr_mov_5_7,
+	alpha_instr_mov_6_7,
+	alpha_instr_nop,
+	alpha_instr_mov_8_7,
+	alpha_instr_mov_9_7,
+	alpha_instr_mov_10_7,
+	alpha_instr_mov_11_7,
+	alpha_instr_mov_12_7,
+	alpha_instr_mov_13_7,
+	alpha_instr_mov_14_7,
+	alpha_instr_mov_15_7,
+	alpha_instr_mov_16_7,
+	alpha_instr_mov_17_7,
+	alpha_instr_mov_18_7,
+	alpha_instr_mov_19_7,
+	alpha_instr_mov_20_7,
+	alpha_instr_mov_21_7,
+	alpha_instr_mov_22_7,
+	alpha_instr_mov_23_7,
+	alpha_instr_mov_24_7,
+	alpha_instr_mov_25_7,
+	alpha_instr_mov_26_7,
+	alpha_instr_mov_27_7,
+	alpha_instr_mov_28_7,
+	alpha_instr_mov_29_7,
+	alpha_instr_mov_30_7,
+	alpha_instr_mov_31_7,
+	alpha_instr_mov_0_8,
+	alpha_instr_mov_1_8,
+	alpha_instr_mov_2_8,
+	alpha_instr_mov_3_8,
+	alpha_instr_mov_4_8,
+	alpha_instr_mov_5_8,
+	alpha_instr_mov_6_8,
+	alpha_instr_mov_7_8,
+	alpha_instr_nop,
+	alpha_instr_mov_9_8,
+	alpha_instr_mov_10_8,
+	alpha_instr_mov_11_8,
+	alpha_instr_mov_12_8,
+	alpha_instr_mov_13_8,
+	alpha_instr_mov_14_8,
+	alpha_instr_mov_15_8,
+	alpha_instr_mov_16_8,
+	alpha_instr_mov_17_8,
+	alpha_instr_mov_18_8,
+	alpha_instr_mov_19_8,
+	alpha_instr_mov_20_8,
+	alpha_instr_mov_21_8,
+	alpha_instr_mov_22_8,
+	alpha_instr_mov_23_8,
+	alpha_instr_mov_24_8,
+	alpha_instr_mov_25_8,
+	alpha_instr_mov_26_8,
+	alpha_instr_mov_27_8,
+	alpha_instr_mov_28_8,
+	alpha_instr_mov_29_8,
+	alpha_instr_mov_30_8,
+	alpha_instr_mov_31_8,
+	alpha_instr_mov_0_9,
+	alpha_instr_mov_1_9,
+	alpha_instr_mov_2_9,
+	alpha_instr_mov_3_9,
+	alpha_instr_mov_4_9,
+	alpha_instr_mov_5_9,
+	alpha_instr_mov_6_9,
+	alpha_instr_mov_7_9,
+	alpha_instr_mov_8_9,
+	alpha_instr_nop,
+	alpha_instr_mov_10_9,
+	alpha_instr_mov_11_9,
+	alpha_instr_mov_12_9,
+	alpha_instr_mov_13_9,
+	alpha_instr_mov_14_9,
+	alpha_instr_mov_15_9,
+	alpha_instr_mov_16_9,
+	alpha_instr_mov_17_9,
+	alpha_instr_mov_18_9,
+	alpha_instr_mov_19_9,
+	alpha_instr_mov_20_9,
+	alpha_instr_mov_21_9,
+	alpha_instr_mov_22_9,
+	alpha_instr_mov_23_9,
+	alpha_instr_mov_24_9,
+	alpha_instr_mov_25_9,
+	alpha_instr_mov_26_9,
+	alpha_instr_mov_27_9,
+	alpha_instr_mov_28_9,
+	alpha_instr_mov_29_9,
+	alpha_instr_mov_30_9,
+	alpha_instr_mov_31_9,
+	alpha_instr_mov_0_10,
+	alpha_instr_mov_1_10,
+	alpha_instr_mov_2_10,
+	alpha_instr_mov_3_10,
+	alpha_instr_mov_4_10,
+	alpha_instr_mov_5_10,
+	alpha_instr_mov_6_10,
+	alpha_instr_mov_7_10,
+	alpha_instr_mov_8_10,
+	alpha_instr_mov_9_10,
+	alpha_instr_nop,
+	alpha_instr_mov_11_10,
+	alpha_instr_mov_12_10,
+	alpha_instr_mov_13_10,
+	alpha_instr_mov_14_10,
+	alpha_instr_mov_15_10,
+	alpha_instr_mov_16_10,
+	alpha_instr_mov_17_10,
+	alpha_instr_mov_18_10,
+	alpha_instr_mov_19_10,
+	alpha_instr_mov_20_10,
+	alpha_instr_mov_21_10,
+	alpha_instr_mov_22_10,
+	alpha_instr_mov_23_10,
+	alpha_instr_mov_24_10,
+	alpha_instr_mov_25_10,
+	alpha_instr_mov_26_10,
+	alpha_instr_mov_27_10,
+	alpha_instr_mov_28_10,
+	alpha_instr_mov_29_10,
+	alpha_instr_mov_30_10,
+	alpha_instr_mov_31_10,
+	alpha_instr_mov_0_11,
+	alpha_instr_mov_1_11,
+	alpha_instr_mov_2_11,
+	alpha_instr_mov_3_11,
+	alpha_instr_mov_4_11,
+	alpha_instr_mov_5_11,
+	alpha_instr_mov_6_11,
+	alpha_instr_mov_7_11,
+	alpha_instr_mov_8_11,
+	alpha_instr_mov_9_11,
+	alpha_instr_mov_10_11,
+	alpha_instr_nop,
+	alpha_instr_mov_12_11,
+	alpha_instr_mov_13_11,
+	alpha_instr_mov_14_11,
+	alpha_instr_mov_15_11,
+	alpha_instr_mov_16_11,
+	alpha_instr_mov_17_11,
+	alpha_instr_mov_18_11,
+	alpha_instr_mov_19_11,
+	alpha_instr_mov_20_11,
+	alpha_instr_mov_21_11,
+	alpha_instr_mov_22_11,
+	alpha_instr_mov_23_11,
+	alpha_instr_mov_24_11,
+	alpha_instr_mov_25_11,
+	alpha_instr_mov_26_11,
+	alpha_instr_mov_27_11,
+	alpha_instr_mov_28_11,
+	alpha_instr_mov_29_11,
+	alpha_instr_mov_30_11,
+	alpha_instr_mov_31_11,
+	alpha_instr_mov_0_12,
+	alpha_instr_mov_1_12,
+	alpha_instr_mov_2_12,
+	alpha_instr_mov_3_12,
+	alpha_instr_mov_4_12,
+	alpha_instr_mov_5_12,
+	alpha_instr_mov_6_12,
+	alpha_instr_mov_7_12,
+	alpha_instr_mov_8_12,
+	alpha_instr_mov_9_12,
+	alpha_instr_mov_10_12,
+	alpha_instr_mov_11_12,
+	alpha_instr_nop,
+	alpha_instr_mov_13_12,
+	alpha_instr_mov_14_12,
+	alpha_instr_mov_15_12,
+	alpha_instr_mov_16_12,
+	alpha_instr_mov_17_12,
+	alpha_instr_mov_18_12,
+	alpha_instr_mov_19_12,
+	alpha_instr_mov_20_12,
+	alpha_instr_mov_21_12,
+	alpha_instr_mov_22_12,
+	alpha_instr_mov_23_12,
+	alpha_instr_mov_24_12,
+	alpha_instr_mov_25_12,
+	alpha_instr_mov_26_12,
+	alpha_instr_mov_27_12,
+	alpha_instr_mov_28_12,
+	alpha_instr_mov_29_12,
+	alpha_instr_mov_30_12,
+	alpha_instr_mov_31_12,
+	alpha_instr_mov_0_13,
+	alpha_instr_mov_1_13,
+	alpha_instr_mov_2_13,
+	alpha_instr_mov_3_13,
+	alpha_instr_mov_4_13,
+	alpha_instr_mov_5_13,
+	alpha_instr_mov_6_13,
+	alpha_instr_mov_7_13,
+	alpha_instr_mov_8_13,
+	alpha_instr_mov_9_13,
+	alpha_instr_mov_10_13,
+	alpha_instr_mov_11_13,
+	alpha_instr_mov_12_13,
+	alpha_instr_nop,
+	alpha_instr_mov_14_13,
+	alpha_instr_mov_15_13,
+	alpha_instr_mov_16_13,
+	alpha_instr_mov_17_13,
+	alpha_instr_mov_18_13,
+	alpha_instr_mov_19_13,
+	alpha_instr_mov_20_13,
+	alpha_instr_mov_21_13,
+	alpha_instr_mov_22_13,
+	alpha_instr_mov_23_13,
+	alpha_instr_mov_24_13,
+	alpha_instr_mov_25_13,
+	alpha_instr_mov_26_13,
+	alpha_instr_mov_27_13,
+	alpha_instr_mov_28_13,
+	alpha_instr_mov_29_13,
+	alpha_instr_mov_30_13,
+	alpha_instr_mov_31_13,
+	alpha_instr_mov_0_14,
+	alpha_instr_mov_1_14,
+	alpha_instr_mov_2_14,
+	alpha_instr_mov_3_14,
+	alpha_instr_mov_4_14,
+	alpha_instr_mov_5_14,
+	alpha_instr_mov_6_14,
+	alpha_instr_mov_7_14,
+	alpha_instr_mov_8_14,
+	alpha_instr_mov_9_14,
+	alpha_instr_mov_10_14,
+	alpha_instr_mov_11_14,
+	alpha_instr_mov_12_14,
+	alpha_instr_mov_13_14,
+	alpha_instr_nop,
+	alpha_instr_mov_15_14,
+	alpha_instr_mov_16_14,
+	alpha_instr_mov_17_14,
+	alpha_instr_mov_18_14,
+	alpha_instr_mov_19_14,
+	alpha_instr_mov_20_14,
+	alpha_instr_mov_21_14,
+	alpha_instr_mov_22_14,
+	alpha_instr_mov_23_14,
+	alpha_instr_mov_24_14,
+	alpha_instr_mov_25_14,
+	alpha_instr_mov_26_14,
+	alpha_instr_mov_27_14,
+	alpha_instr_mov_28_14,
+	alpha_instr_mov_29_14,
+	alpha_instr_mov_30_14,
+	alpha_instr_mov_31_14,
+	alpha_instr_mov_0_15,
+	alpha_instr_mov_1_15,
+	alpha_instr_mov_2_15,
+	alpha_instr_mov_3_15,
+	alpha_instr_mov_4_15,
+	alpha_instr_mov_5_15,
+	alpha_instr_mov_6_15,
+	alpha_instr_mov_7_15,
+	alpha_instr_mov_8_15,
+	alpha_instr_mov_9_15,
+	alpha_instr_mov_10_15,
+	alpha_instr_mov_11_15,
+	alpha_instr_mov_12_15,
+	alpha_instr_mov_13_15,
+	alpha_instr_mov_14_15,
+	alpha_instr_nop,
+	alpha_instr_mov_16_15,
+	alpha_instr_mov_17_15,
+	alpha_instr_mov_18_15,
+	alpha_instr_mov_19_15,
+	alpha_instr_mov_20_15,
+	alpha_instr_mov_21_15,
+	alpha_instr_mov_22_15,
+	alpha_instr_mov_23_15,
+	alpha_instr_mov_24_15,
+	alpha_instr_mov_25_15,
+	alpha_instr_mov_26_15,
+	alpha_instr_mov_27_15,
+	alpha_instr_mov_28_15,
+	alpha_instr_mov_29_15,
+	alpha_instr_mov_30_15,
+	alpha_instr_mov_31_15,
+	alpha_instr_mov_0_16,
+	alpha_instr_mov_1_16,
+	alpha_instr_mov_2_16,
+	alpha_instr_mov_3_16,
+	alpha_instr_mov_4_16,
+	alpha_instr_mov_5_16,
+	alpha_instr_mov_6_16,
+	alpha_instr_mov_7_16,
+	alpha_instr_mov_8_16,
+	alpha_instr_mov_9_16,
+	alpha_instr_mov_10_16,
+	alpha_instr_mov_11_16,
+	alpha_instr_mov_12_16,
+	alpha_instr_mov_13_16,
+	alpha_instr_mov_14_16,
+	alpha_instr_mov_15_16,
+	alpha_instr_nop,
+	alpha_instr_mov_17_16,
+	alpha_instr_mov_18_16,
+	alpha_instr_mov_19_16,
+	alpha_instr_mov_20_16,
+	alpha_instr_mov_21_16,
+	alpha_instr_mov_22_16,
+	alpha_instr_mov_23_16,
+	alpha_instr_mov_24_16,
+	alpha_instr_mov_25_16,
+	alpha_instr_mov_26_16,
+	alpha_instr_mov_27_16,
+	alpha_instr_mov_28_16,
+	alpha_instr_mov_29_16,
+	alpha_instr_mov_30_16,
+	alpha_instr_mov_31_16,
+	alpha_instr_mov_0_17,
+	alpha_instr_mov_1_17,
+	alpha_instr_mov_2_17,
+	alpha_instr_mov_3_17,
+	alpha_instr_mov_4_17,
+	alpha_instr_mov_5_17,
+	alpha_instr_mov_6_17,
+	alpha_instr_mov_7_17,
+	alpha_instr_mov_8_17,
+	alpha_instr_mov_9_17,
+	alpha_instr_mov_10_17,
+	alpha_instr_mov_11_17,
+	alpha_instr_mov_12_17,
+	alpha_instr_mov_13_17,
+	alpha_instr_mov_14_17,
+	alpha_instr_mov_15_17,
+	alpha_instr_mov_16_17,
+	alpha_instr_nop,
+	alpha_instr_mov_18_17,
+	alpha_instr_mov_19_17,
+	alpha_instr_mov_20_17,
+	alpha_instr_mov_21_17,
+	alpha_instr_mov_22_17,
+	alpha_instr_mov_23_17,
+	alpha_instr_mov_24_17,
+	alpha_instr_mov_25_17,
+	alpha_instr_mov_26_17,
+	alpha_instr_mov_27_17,
+	alpha_instr_mov_28_17,
+	alpha_instr_mov_29_17,
+	alpha_instr_mov_30_17,
+	alpha_instr_mov_31_17,
+	alpha_instr_mov_0_18,
+	alpha_instr_mov_1_18,
+	alpha_instr_mov_2_18,
+	alpha_instr_mov_3_18,
+	alpha_instr_mov_4_18,
+	alpha_instr_mov_5_18,
+	alpha_instr_mov_6_18,
+	alpha_instr_mov_7_18,
+	alpha_instr_mov_8_18,
+	alpha_instr_mov_9_18,
+	alpha_instr_mov_10_18,
+	alpha_instr_mov_11_18,
+	alpha_instr_mov_12_18,
+	alpha_instr_mov_13_18,
+	alpha_instr_mov_14_18,
+	alpha_instr_mov_15_18,
+	alpha_instr_mov_16_18,
+	alpha_instr_mov_17_18,
+	alpha_instr_nop,
+	alpha_instr_mov_19_18,
+	alpha_instr_mov_20_18,
+	alpha_instr_mov_21_18,
+	alpha_instr_mov_22_18,
+	alpha_instr_mov_23_18,
+	alpha_instr_mov_24_18,
+	alpha_instr_mov_25_18,
+	alpha_instr_mov_26_18,
+	alpha_instr_mov_27_18,
+	alpha_instr_mov_28_18,
+	alpha_instr_mov_29_18,
+	alpha_instr_mov_30_18,
+	alpha_instr_mov_31_18,
+	alpha_instr_mov_0_19,
+	alpha_instr_mov_1_19,
+	alpha_instr_mov_2_19,
+	alpha_instr_mov_3_19,
+	alpha_instr_mov_4_19,
+	alpha_instr_mov_5_19,
+	alpha_instr_mov_6_19,
+	alpha_instr_mov_7_19,
+	alpha_instr_mov_8_19,
+	alpha_instr_mov_9_19,
+	alpha_instr_mov_10_19,
+	alpha_instr_mov_11_19,
+	alpha_instr_mov_12_19,
+	alpha_instr_mov_13_19,
+	alpha_instr_mov_14_19,
+	alpha_instr_mov_15_19,
+	alpha_instr_mov_16_19,
+	alpha_instr_mov_17_19,
+	alpha_instr_mov_18_19,
+	alpha_instr_nop,
+	alpha_instr_mov_20_19,
+	alpha_instr_mov_21_19,
+	alpha_instr_mov_22_19,
+	alpha_instr_mov_23_19,
+	alpha_instr_mov_24_19,
+	alpha_instr_mov_25_19,
+	alpha_instr_mov_26_19,
+	alpha_instr_mov_27_19,
+	alpha_instr_mov_28_19,
+	alpha_instr_mov_29_19,
+	alpha_instr_mov_30_19,
+	alpha_instr_mov_31_19,
+	alpha_instr_mov_0_20,
+	alpha_instr_mov_1_20,
+	alpha_instr_mov_2_20,
+	alpha_instr_mov_3_20,
+	alpha_instr_mov_4_20,
+	alpha_instr_mov_5_20,
+	alpha_instr_mov_6_20,
+	alpha_instr_mov_7_20,
+	alpha_instr_mov_8_20,
+	alpha_instr_mov_9_20,
+	alpha_instr_mov_10_20,
+	alpha_instr_mov_11_20,
+	alpha_instr_mov_12_20,
+	alpha_instr_mov_13_20,
+	alpha_instr_mov_14_20,
+	alpha_instr_mov_15_20,
+	alpha_instr_mov_16_20,
+	alpha_instr_mov_17_20,
+	alpha_instr_mov_18_20,
+	alpha_instr_mov_19_20,
+	alpha_instr_nop,
+	alpha_instr_mov_21_20,
+	alpha_instr_mov_22_20,
+	alpha_instr_mov_23_20,
+	alpha_instr_mov_24_20,
+	alpha_instr_mov_25_20,
+	alpha_instr_mov_26_20,
+	alpha_instr_mov_27_20,
+	alpha_instr_mov_28_20,
+	alpha_instr_mov_29_20,
+	alpha_instr_mov_30_20,
+	alpha_instr_mov_31_20,
+	alpha_instr_mov_0_21,
+	alpha_instr_mov_1_21,
+	alpha_instr_mov_2_21,
+	alpha_instr_mov_3_21,
+	alpha_instr_mov_4_21,
+	alpha_instr_mov_5_21,
+	alpha_instr_mov_6_21,
+	alpha_instr_mov_7_21,
+	alpha_instr_mov_8_21,
+	alpha_instr_mov_9_21,
+	alpha_instr_mov_10_21,
+	alpha_instr_mov_11_21,
+	alpha_instr_mov_12_21,
+	alpha_instr_mov_13_21,
+	alpha_instr_mov_14_21,
+	alpha_instr_mov_15_21,
+	alpha_instr_mov_16_21,
+	alpha_instr_mov_17_21,
+	alpha_instr_mov_18_21,
+	alpha_instr_mov_19_21,
+	alpha_instr_mov_20_21,
+	alpha_instr_nop,
+	alpha_instr_mov_22_21,
+	alpha_instr_mov_23_21,
+	alpha_instr_mov_24_21,
+	alpha_instr_mov_25_21,
+	alpha_instr_mov_26_21,
+	alpha_instr_mov_27_21,
+	alpha_instr_mov_28_21,
+	alpha_instr_mov_29_21,
+	alpha_instr_mov_30_21,
+	alpha_instr_mov_31_21,
+	alpha_instr_mov_0_22,
+	alpha_instr_mov_1_22,
+	alpha_instr_mov_2_22,
+	alpha_instr_mov_3_22,
+	alpha_instr_mov_4_22,
+	alpha_instr_mov_5_22,
+	alpha_instr_mov_6_22,
+	alpha_instr_mov_7_22,
+	alpha_instr_mov_8_22,
+	alpha_instr_mov_9_22,
+	alpha_instr_mov_10_22,
+	alpha_instr_mov_11_22,
+	alpha_instr_mov_12_22,
+	alpha_instr_mov_13_22,
+	alpha_instr_mov_14_22,
+	alpha_instr_mov_15_22,
+	alpha_instr_mov_16_22,
+	alpha_instr_mov_17_22,
+	alpha_instr_mov_18_22,
+	alpha_instr_mov_19_22,
+	alpha_instr_mov_20_22,
+	alpha_instr_mov_21_22,
+	alpha_instr_nop,
+	alpha_instr_mov_23_22,
+	alpha_instr_mov_24_22,
+	alpha_instr_mov_25_22,
+	alpha_instr_mov_26_22,
+	alpha_instr_mov_27_22,
+	alpha_instr_mov_28_22,
+	alpha_instr_mov_29_22,
+	alpha_instr_mov_30_22,
+	alpha_instr_mov_31_22,
+	alpha_instr_mov_0_23,
+	alpha_instr_mov_1_23,
+	alpha_instr_mov_2_23,
+	alpha_instr_mov_3_23,
+	alpha_instr_mov_4_23,
+	alpha_instr_mov_5_23,
+	alpha_instr_mov_6_23,
+	alpha_instr_mov_7_23,
+	alpha_instr_mov_8_23,
+	alpha_instr_mov_9_23,
+	alpha_instr_mov_10_23,
+	alpha_instr_mov_11_23,
+	alpha_instr_mov_12_23,
+	alpha_instr_mov_13_23,
+	alpha_instr_mov_14_23,
+	alpha_instr_mov_15_23,
+	alpha_instr_mov_16_23,
+	alpha_instr_mov_17_23,
+	alpha_instr_mov_18_23,
+	alpha_instr_mov_19_23,
+	alpha_instr_mov_20_23,
+	alpha_instr_mov_21_23,
+	alpha_instr_mov_22_23,
+	alpha_instr_nop,
+	alpha_instr_mov_24_23,
+	alpha_instr_mov_25_23,
+	alpha_instr_mov_26_23,
+	alpha_instr_mov_27_23,
+	alpha_instr_mov_28_23,
+	alpha_instr_mov_29_23,
+	alpha_instr_mov_30_23,
+	alpha_instr_mov_31_23,
+	alpha_instr_mov_0_24,
+	alpha_instr_mov_1_24,
+	alpha_instr_mov_2_24,
+	alpha_instr_mov_3_24,
+	alpha_instr_mov_4_24,
+	alpha_instr_mov_5_24,
+	alpha_instr_mov_6_24,
+	alpha_instr_mov_7_24,
+	alpha_instr_mov_8_24,
+	alpha_instr_mov_9_24,
+	alpha_instr_mov_10_24,
+	alpha_instr_mov_11_24,
+	alpha_instr_mov_12_24,
+	alpha_instr_mov_13_24,
+	alpha_instr_mov_14_24,
+	alpha_instr_mov_15_24,
+	alpha_instr_mov_16_24,
+	alpha_instr_mov_17_24,
+	alpha_instr_mov_18_24,
+	alpha_instr_mov_19_24,
+	alpha_instr_mov_20_24,
+	alpha_instr_mov_21_24,
+	alpha_instr_mov_22_24,
+	alpha_instr_mov_23_24,
+	alpha_instr_nop,
+	alpha_instr_mov_25_24,
+	alpha_instr_mov_26_24,
+	alpha_instr_mov_27_24,
+	alpha_instr_mov_28_24,
+	alpha_instr_mov_29_24,
+	alpha_instr_mov_30_24,
+	alpha_instr_mov_31_24,
+	alpha_instr_mov_0_25,
+	alpha_instr_mov_1_25,
+	alpha_instr_mov_2_25,
+	alpha_instr_mov_3_25,
+	alpha_instr_mov_4_25,
+	alpha_instr_mov_5_25,
+	alpha_instr_mov_6_25,
+	alpha_instr_mov_7_25,
+	alpha_instr_mov_8_25,
+	alpha_instr_mov_9_25,
+	alpha_instr_mov_10_25,
+	alpha_instr_mov_11_25,
+	alpha_instr_mov_12_25,
+	alpha_instr_mov_13_25,
+	alpha_instr_mov_14_25,
+	alpha_instr_mov_15_25,
+	alpha_instr_mov_16_25,
+	alpha_instr_mov_17_25,
+	alpha_instr_mov_18_25,
+	alpha_instr_mov_19_25,
+	alpha_instr_mov_20_25,
+	alpha_instr_mov_21_25,
+	alpha_instr_mov_22_25,
+	alpha_instr_mov_23_25,
+	alpha_instr_mov_24_25,
+	alpha_instr_nop,
+	alpha_instr_mov_26_25,
+	alpha_instr_mov_27_25,
+	alpha_instr_mov_28_25,
+	alpha_instr_mov_29_25,
+	alpha_instr_mov_30_25,
+	alpha_instr_mov_31_25,
+	alpha_instr_mov_0_26,
+	alpha_instr_mov_1_26,
+	alpha_instr_mov_2_26,
+	alpha_instr_mov_3_26,
+	alpha_instr_mov_4_26,
+	alpha_instr_mov_5_26,
+	alpha_instr_mov_6_26,
+	alpha_instr_mov_7_26,
+	alpha_instr_mov_8_26,
+	alpha_instr_mov_9_26,
+	alpha_instr_mov_10_26,
+	alpha_instr_mov_11_26,
+	alpha_instr_mov_12_26,
+	alpha_instr_mov_13_26,
+	alpha_instr_mov_14_26,
+	alpha_instr_mov_15_26,
+	alpha_instr_mov_16_26,
+	alpha_instr_mov_17_26,
+	alpha_instr_mov_18_26,
+	alpha_instr_mov_19_26,
+	alpha_instr_mov_20_26,
+	alpha_instr_mov_21_26,
+	alpha_instr_mov_22_26,
+	alpha_instr_mov_23_26,
+	alpha_instr_mov_24_26,
+	alpha_instr_mov_25_26,
+	alpha_instr_nop,
+	alpha_instr_mov_27_26,
+	alpha_instr_mov_28_26,
+	alpha_instr_mov_29_26,
+	alpha_instr_mov_30_26,
+	alpha_instr_mov_31_26,
+	alpha_instr_mov_0_27,
+	alpha_instr_mov_1_27,
+	alpha_instr_mov_2_27,
+	alpha_instr_mov_3_27,
+	alpha_instr_mov_4_27,
+	alpha_instr_mov_5_27,
+	alpha_instr_mov_6_27,
+	alpha_instr_mov_7_27,
+	alpha_instr_mov_8_27,
+	alpha_instr_mov_9_27,
+	alpha_instr_mov_10_27,
+	alpha_instr_mov_11_27,
+	alpha_instr_mov_12_27,
+	alpha_instr_mov_13_27,
+	alpha_instr_mov_14_27,
+	alpha_instr_mov_15_27,
+	alpha_instr_mov_16_27,
+	alpha_instr_mov_17_27,
+	alpha_instr_mov_18_27,
+	alpha_instr_mov_19_27,
+	alpha_instr_mov_20_27,
+	alpha_instr_mov_21_27,
+	alpha_instr_mov_22_27,
+	alpha_instr_mov_23_27,
+	alpha_instr_mov_24_27,
+	alpha_instr_mov_25_27,
+	alpha_instr_mov_26_27,
+	alpha_instr_nop,
+	alpha_instr_mov_28_27,
+	alpha_instr_mov_29_27,
+	alpha_instr_mov_30_27,
+	alpha_instr_mov_31_27,
+	alpha_instr_mov_0_28,
+	alpha_instr_mov_1_28,
+	alpha_instr_mov_2_28,
+	alpha_instr_mov_3_28,
+	alpha_instr_mov_4_28,
+	alpha_instr_mov_5_28,
+	alpha_instr_mov_6_28,
+	alpha_instr_mov_7_28,
+	alpha_instr_mov_8_28,
+	alpha_instr_mov_9_28,
+	alpha_instr_mov_10_28,
+	alpha_instr_mov_11_28,
+	alpha_instr_mov_12_28,
+	alpha_instr_mov_13_28,
+	alpha_instr_mov_14_28,
+	alpha_instr_mov_15_28,
+	alpha_instr_mov_16_28,
+	alpha_instr_mov_17_28,
+	alpha_instr_mov_18_28,
+	alpha_instr_mov_19_28,
+	alpha_instr_mov_20_28,
+	alpha_instr_mov_21_28,
+	alpha_instr_mov_22_28,
+	alpha_instr_mov_23_28,
+	alpha_instr_mov_24_28,
+	alpha_instr_mov_25_28,
+	alpha_instr_mov_26_28,
+	alpha_instr_mov_27_28,
+	alpha_instr_nop,
+	alpha_instr_mov_29_28,
+	alpha_instr_mov_30_28,
+	alpha_instr_mov_31_28,
+	alpha_instr_mov_0_29,
+	alpha_instr_mov_1_29,
+	alpha_instr_mov_2_29,
+	alpha_instr_mov_3_29,
+	alpha_instr_mov_4_29,
+	alpha_instr_mov_5_29,
+	alpha_instr_mov_6_29,
+	alpha_instr_mov_7_29,
+	alpha_instr_mov_8_29,
+	alpha_instr_mov_9_29,
+	alpha_instr_mov_10_29,
+	alpha_instr_mov_11_29,
+	alpha_instr_mov_12_29,
+	alpha_instr_mov_13_29,
+	alpha_instr_mov_14_29,
+	alpha_instr_mov_15_29,
+	alpha_instr_mov_16_29,
+	alpha_instr_mov_17_29,
+	alpha_instr_mov_18_29,
+	alpha_instr_mov_19_29,
+	alpha_instr_mov_20_29,
+	alpha_instr_mov_21_29,
+	alpha_instr_mov_22_29,
+	alpha_instr_mov_23_29,
+	alpha_instr_mov_24_29,
+	alpha_instr_mov_25_29,
+	alpha_instr_mov_26_29,
+	alpha_instr_mov_27_29,
+	alpha_instr_mov_28_29,
+	alpha_instr_nop,
+	alpha_instr_mov_30_29,
+	alpha_instr_mov_31_29,
+	alpha_instr_mov_0_30,
+	alpha_instr_mov_1_30,
+	alpha_instr_mov_2_30,
+	alpha_instr_mov_3_30,
+	alpha_instr_mov_4_30,
+	alpha_instr_mov_5_30,
+	alpha_instr_mov_6_30,
+	alpha_instr_mov_7_30,
+	alpha_instr_mov_8_30,
+	alpha_instr_mov_9_30,
+	alpha_instr_mov_10_30,
+	alpha_instr_mov_11_30,
+	alpha_instr_mov_12_30,
+	alpha_instr_mov_13_30,
+	alpha_instr_mov_14_30,
+	alpha_instr_mov_15_30,
+	alpha_instr_mov_16_30,
+	alpha_instr_mov_17_30,
+	alpha_instr_mov_18_30,
+	alpha_instr_mov_19_30,
+	alpha_instr_mov_20_30,
+	alpha_instr_mov_21_30,
+	alpha_instr_mov_22_30,
+	alpha_instr_mov_23_30,
+	alpha_instr_mov_24_30,
+	alpha_instr_mov_25_30,
+	alpha_instr_mov_26_30,
+	alpha_instr_mov_27_30,
+	alpha_instr_mov_28_30,
+	alpha_instr_mov_29_30,
+	alpha_instr_nop,
+	alpha_instr_mov_31_30
+};
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_alpha_tail.c gxemul-0.7.0/src/cpus/tmp_alpha_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_alpha_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_alpha_tail.c	2022-10-18 16:37:22.075737100 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF alpha_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES alpha_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF alpha_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC alpha_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE alpha_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE alpha_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW alpha_memory_rw
+#define MEM_ALPHA
+#include "memory_rw.c"
+#undef MEM_ALPHA
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC alpha_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC alpha_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS alpha_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) alpha_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_alpha_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF alpha_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS alpha32_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void alpha32_instr_ ## n(struct cpu *cpu, \
+	struct alpha_instr_call *ic)
+#define instr(n) alpha32_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY alpha32_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC alpha32_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE alpha32_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE alpha32_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC alpha32_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC alpha32_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS alpha32_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) alpha32_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_alpha_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS alpha_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 alpha32_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF alpha32_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(alpha,"Alpha")
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_dpi.c gxemul-0.7.0/src/cpus/tmp_arm_dpi.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_dpi.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_dpi.c	2022-10-18 16:37:22.076738100 +0000
@@ -0,0 +1,7643 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME arm_instr_and
+#define A__NAME__eq arm_instr_and__eq
+#define A__NAME__ne arm_instr_and__ne
+#define A__NAME__cs arm_instr_and__cs
+#define A__NAME__cc arm_instr_and__cc
+#define A__NAME__mi arm_instr_and__mi
+#define A__NAME__pl arm_instr_and__pl
+#define A__NAME__vs arm_instr_and__vs
+#define A__NAME__vc arm_instr_and__vc
+#define A__NAME__hi arm_instr_and__hi
+#define A__NAME__ls arm_instr_and__ls
+#define A__NAME__ge arm_instr_and__ge
+#define A__NAME__lt arm_instr_and__lt
+#define A__NAME__gt arm_instr_and__gt
+#define A__NAME__le arm_instr_and__le
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eor
+#define A__NAME__eq arm_instr_eor__eq
+#define A__NAME__ne arm_instr_eor__ne
+#define A__NAME__cs arm_instr_eor__cs
+#define A__NAME__cc arm_instr_eor__cc
+#define A__NAME__mi arm_instr_eor__mi
+#define A__NAME__pl arm_instr_eor__pl
+#define A__NAME__vs arm_instr_eor__vs
+#define A__NAME__vc arm_instr_eor__vc
+#define A__NAME__hi arm_instr_eor__hi
+#define A__NAME__ls arm_instr_eor__ls
+#define A__NAME__ge arm_instr_eor__ge
+#define A__NAME__lt arm_instr_eor__lt
+#define A__NAME__gt arm_instr_eor__gt
+#define A__NAME__le arm_instr_eor__le
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sub
+#define A__NAME__eq arm_instr_sub__eq
+#define A__NAME__ne arm_instr_sub__ne
+#define A__NAME__cs arm_instr_sub__cs
+#define A__NAME__cc arm_instr_sub__cc
+#define A__NAME__mi arm_instr_sub__mi
+#define A__NAME__pl arm_instr_sub__pl
+#define A__NAME__vs arm_instr_sub__vs
+#define A__NAME__vc arm_instr_sub__vc
+#define A__NAME__hi arm_instr_sub__hi
+#define A__NAME__ls arm_instr_sub__ls
+#define A__NAME__ge arm_instr_sub__ge
+#define A__NAME__lt arm_instr_sub__lt
+#define A__NAME__gt arm_instr_sub__gt
+#define A__NAME__le arm_instr_sub__le
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsb
+#define A__NAME__eq arm_instr_rsb__eq
+#define A__NAME__ne arm_instr_rsb__ne
+#define A__NAME__cs arm_instr_rsb__cs
+#define A__NAME__cc arm_instr_rsb__cc
+#define A__NAME__mi arm_instr_rsb__mi
+#define A__NAME__pl arm_instr_rsb__pl
+#define A__NAME__vs arm_instr_rsb__vs
+#define A__NAME__vc arm_instr_rsb__vc
+#define A__NAME__hi arm_instr_rsb__hi
+#define A__NAME__ls arm_instr_rsb__ls
+#define A__NAME__ge arm_instr_rsb__ge
+#define A__NAME__lt arm_instr_rsb__lt
+#define A__NAME__gt arm_instr_rsb__gt
+#define A__NAME__le arm_instr_rsb__le
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_add
+#define A__NAME__eq arm_instr_add__eq
+#define A__NAME__ne arm_instr_add__ne
+#define A__NAME__cs arm_instr_add__cs
+#define A__NAME__cc arm_instr_add__cc
+#define A__NAME__mi arm_instr_add__mi
+#define A__NAME__pl arm_instr_add__pl
+#define A__NAME__vs arm_instr_add__vs
+#define A__NAME__vc arm_instr_add__vc
+#define A__NAME__hi arm_instr_add__hi
+#define A__NAME__ls arm_instr_add__ls
+#define A__NAME__ge arm_instr_add__ge
+#define A__NAME__lt arm_instr_add__lt
+#define A__NAME__gt arm_instr_add__gt
+#define A__NAME__le arm_instr_add__le
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adc
+#define A__NAME__eq arm_instr_adc__eq
+#define A__NAME__ne arm_instr_adc__ne
+#define A__NAME__cs arm_instr_adc__cs
+#define A__NAME__cc arm_instr_adc__cc
+#define A__NAME__mi arm_instr_adc__mi
+#define A__NAME__pl arm_instr_adc__pl
+#define A__NAME__vs arm_instr_adc__vs
+#define A__NAME__vc arm_instr_adc__vc
+#define A__NAME__hi arm_instr_adc__hi
+#define A__NAME__ls arm_instr_adc__ls
+#define A__NAME__ge arm_instr_adc__ge
+#define A__NAME__lt arm_instr_adc__lt
+#define A__NAME__gt arm_instr_adc__gt
+#define A__NAME__le arm_instr_adc__le
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbc
+#define A__NAME__eq arm_instr_sbc__eq
+#define A__NAME__ne arm_instr_sbc__ne
+#define A__NAME__cs arm_instr_sbc__cs
+#define A__NAME__cc arm_instr_sbc__cc
+#define A__NAME__mi arm_instr_sbc__mi
+#define A__NAME__pl arm_instr_sbc__pl
+#define A__NAME__vs arm_instr_sbc__vs
+#define A__NAME__vc arm_instr_sbc__vc
+#define A__NAME__hi arm_instr_sbc__hi
+#define A__NAME__ls arm_instr_sbc__ls
+#define A__NAME__ge arm_instr_sbc__ge
+#define A__NAME__lt arm_instr_sbc__lt
+#define A__NAME__gt arm_instr_sbc__gt
+#define A__NAME__le arm_instr_sbc__le
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsc
+#define A__NAME__eq arm_instr_rsc__eq
+#define A__NAME__ne arm_instr_rsc__ne
+#define A__NAME__cs arm_instr_rsc__cs
+#define A__NAME__cc arm_instr_rsc__cc
+#define A__NAME__mi arm_instr_rsc__mi
+#define A__NAME__pl arm_instr_rsc__pl
+#define A__NAME__vs arm_instr_rsc__vs
+#define A__NAME__vc arm_instr_rsc__vc
+#define A__NAME__hi arm_instr_rsc__hi
+#define A__NAME__ls arm_instr_rsc__ls
+#define A__NAME__ge arm_instr_rsc__ge
+#define A__NAME__lt arm_instr_rsc__lt
+#define A__NAME__gt arm_instr_rsc__gt
+#define A__NAME__le arm_instr_rsc__le
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orr
+#define A__NAME__eq arm_instr_orr__eq
+#define A__NAME__ne arm_instr_orr__ne
+#define A__NAME__cs arm_instr_orr__cs
+#define A__NAME__cc arm_instr_orr__cc
+#define A__NAME__mi arm_instr_orr__mi
+#define A__NAME__pl arm_instr_orr__pl
+#define A__NAME__vs arm_instr_orr__vs
+#define A__NAME__vc arm_instr_orr__vc
+#define A__NAME__hi arm_instr_orr__hi
+#define A__NAME__ls arm_instr_orr__ls
+#define A__NAME__ge arm_instr_orr__ge
+#define A__NAME__lt arm_instr_orr__lt
+#define A__NAME__gt arm_instr_orr__gt
+#define A__NAME__le arm_instr_orr__le
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mov
+#define A__NAME__eq arm_instr_mov__eq
+#define A__NAME__ne arm_instr_mov__ne
+#define A__NAME__cs arm_instr_mov__cs
+#define A__NAME__cc arm_instr_mov__cc
+#define A__NAME__mi arm_instr_mov__mi
+#define A__NAME__pl arm_instr_mov__pl
+#define A__NAME__vs arm_instr_mov__vs
+#define A__NAME__vc arm_instr_mov__vc
+#define A__NAME__hi arm_instr_mov__hi
+#define A__NAME__ls arm_instr_mov__ls
+#define A__NAME__ge arm_instr_mov__ge
+#define A__NAME__lt arm_instr_mov__lt
+#define A__NAME__gt arm_instr_mov__gt
+#define A__NAME__le arm_instr_mov__le
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bic
+#define A__NAME__eq arm_instr_bic__eq
+#define A__NAME__ne arm_instr_bic__ne
+#define A__NAME__cs arm_instr_bic__cs
+#define A__NAME__cc arm_instr_bic__cc
+#define A__NAME__mi arm_instr_bic__mi
+#define A__NAME__pl arm_instr_bic__pl
+#define A__NAME__vs arm_instr_bic__vs
+#define A__NAME__vc arm_instr_bic__vc
+#define A__NAME__hi arm_instr_bic__hi
+#define A__NAME__ls arm_instr_bic__ls
+#define A__NAME__ge arm_instr_bic__ge
+#define A__NAME__lt arm_instr_bic__lt
+#define A__NAME__gt arm_instr_bic__gt
+#define A__NAME__le arm_instr_bic__le
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvn
+#define A__NAME__eq arm_instr_mvn__eq
+#define A__NAME__ne arm_instr_mvn__ne
+#define A__NAME__cs arm_instr_mvn__cs
+#define A__NAME__cc arm_instr_mvn__cc
+#define A__NAME__mi arm_instr_mvn__mi
+#define A__NAME__pl arm_instr_mvn__pl
+#define A__NAME__vs arm_instr_mvn__vs
+#define A__NAME__vc arm_instr_mvn__vc
+#define A__NAME__hi arm_instr_mvn__hi
+#define A__NAME__ls arm_instr_mvn__ls
+#define A__NAME__ge arm_instr_mvn__ge
+#define A__NAME__lt arm_instr_mvn__lt
+#define A__NAME__gt arm_instr_mvn__gt
+#define A__NAME__le arm_instr_mvn__le
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_ands
+#define A__NAME__eq arm_instr_ands__eq
+#define A__NAME__ne arm_instr_ands__ne
+#define A__NAME__cs arm_instr_ands__cs
+#define A__NAME__cc arm_instr_ands__cc
+#define A__NAME__mi arm_instr_ands__mi
+#define A__NAME__pl arm_instr_ands__pl
+#define A__NAME__vs arm_instr_ands__vs
+#define A__NAME__vc arm_instr_ands__vc
+#define A__NAME__hi arm_instr_ands__hi
+#define A__NAME__ls arm_instr_ands__ls
+#define A__NAME__ge arm_instr_ands__ge
+#define A__NAME__lt arm_instr_ands__lt
+#define A__NAME__gt arm_instr_ands__gt
+#define A__NAME__le arm_instr_ands__le
+#define A__S
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eors
+#define A__NAME__eq arm_instr_eors__eq
+#define A__NAME__ne arm_instr_eors__ne
+#define A__NAME__cs arm_instr_eors__cs
+#define A__NAME__cc arm_instr_eors__cc
+#define A__NAME__mi arm_instr_eors__mi
+#define A__NAME__pl arm_instr_eors__pl
+#define A__NAME__vs arm_instr_eors__vs
+#define A__NAME__vc arm_instr_eors__vc
+#define A__NAME__hi arm_instr_eors__hi
+#define A__NAME__ls arm_instr_eors__ls
+#define A__NAME__ge arm_instr_eors__ge
+#define A__NAME__lt arm_instr_eors__lt
+#define A__NAME__gt arm_instr_eors__gt
+#define A__NAME__le arm_instr_eors__le
+#define A__S
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_subs
+#define A__NAME__eq arm_instr_subs__eq
+#define A__NAME__ne arm_instr_subs__ne
+#define A__NAME__cs arm_instr_subs__cs
+#define A__NAME__cc arm_instr_subs__cc
+#define A__NAME__mi arm_instr_subs__mi
+#define A__NAME__pl arm_instr_subs__pl
+#define A__NAME__vs arm_instr_subs__vs
+#define A__NAME__vc arm_instr_subs__vc
+#define A__NAME__hi arm_instr_subs__hi
+#define A__NAME__ls arm_instr_subs__ls
+#define A__NAME__ge arm_instr_subs__ge
+#define A__NAME__lt arm_instr_subs__lt
+#define A__NAME__gt arm_instr_subs__gt
+#define A__NAME__le arm_instr_subs__le
+#define A__S
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsbs
+#define A__NAME__eq arm_instr_rsbs__eq
+#define A__NAME__ne arm_instr_rsbs__ne
+#define A__NAME__cs arm_instr_rsbs__cs
+#define A__NAME__cc arm_instr_rsbs__cc
+#define A__NAME__mi arm_instr_rsbs__mi
+#define A__NAME__pl arm_instr_rsbs__pl
+#define A__NAME__vs arm_instr_rsbs__vs
+#define A__NAME__vc arm_instr_rsbs__vc
+#define A__NAME__hi arm_instr_rsbs__hi
+#define A__NAME__ls arm_instr_rsbs__ls
+#define A__NAME__ge arm_instr_rsbs__ge
+#define A__NAME__lt arm_instr_rsbs__lt
+#define A__NAME__gt arm_instr_rsbs__gt
+#define A__NAME__le arm_instr_rsbs__le
+#define A__S
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adds
+#define A__NAME__eq arm_instr_adds__eq
+#define A__NAME__ne arm_instr_adds__ne
+#define A__NAME__cs arm_instr_adds__cs
+#define A__NAME__cc arm_instr_adds__cc
+#define A__NAME__mi arm_instr_adds__mi
+#define A__NAME__pl arm_instr_adds__pl
+#define A__NAME__vs arm_instr_adds__vs
+#define A__NAME__vc arm_instr_adds__vc
+#define A__NAME__hi arm_instr_adds__hi
+#define A__NAME__ls arm_instr_adds__ls
+#define A__NAME__ge arm_instr_adds__ge
+#define A__NAME__lt arm_instr_adds__lt
+#define A__NAME__gt arm_instr_adds__gt
+#define A__NAME__le arm_instr_adds__le
+#define A__S
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adcs
+#define A__NAME__eq arm_instr_adcs__eq
+#define A__NAME__ne arm_instr_adcs__ne
+#define A__NAME__cs arm_instr_adcs__cs
+#define A__NAME__cc arm_instr_adcs__cc
+#define A__NAME__mi arm_instr_adcs__mi
+#define A__NAME__pl arm_instr_adcs__pl
+#define A__NAME__vs arm_instr_adcs__vs
+#define A__NAME__vc arm_instr_adcs__vc
+#define A__NAME__hi arm_instr_adcs__hi
+#define A__NAME__ls arm_instr_adcs__ls
+#define A__NAME__ge arm_instr_adcs__ge
+#define A__NAME__lt arm_instr_adcs__lt
+#define A__NAME__gt arm_instr_adcs__gt
+#define A__NAME__le arm_instr_adcs__le
+#define A__S
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbcs
+#define A__NAME__eq arm_instr_sbcs__eq
+#define A__NAME__ne arm_instr_sbcs__ne
+#define A__NAME__cs arm_instr_sbcs__cs
+#define A__NAME__cc arm_instr_sbcs__cc
+#define A__NAME__mi arm_instr_sbcs__mi
+#define A__NAME__pl arm_instr_sbcs__pl
+#define A__NAME__vs arm_instr_sbcs__vs
+#define A__NAME__vc arm_instr_sbcs__vc
+#define A__NAME__hi arm_instr_sbcs__hi
+#define A__NAME__ls arm_instr_sbcs__ls
+#define A__NAME__ge arm_instr_sbcs__ge
+#define A__NAME__lt arm_instr_sbcs__lt
+#define A__NAME__gt arm_instr_sbcs__gt
+#define A__NAME__le arm_instr_sbcs__le
+#define A__S
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rscs
+#define A__NAME__eq arm_instr_rscs__eq
+#define A__NAME__ne arm_instr_rscs__ne
+#define A__NAME__cs arm_instr_rscs__cs
+#define A__NAME__cc arm_instr_rscs__cc
+#define A__NAME__mi arm_instr_rscs__mi
+#define A__NAME__pl arm_instr_rscs__pl
+#define A__NAME__vs arm_instr_rscs__vs
+#define A__NAME__vc arm_instr_rscs__vc
+#define A__NAME__hi arm_instr_rscs__hi
+#define A__NAME__ls arm_instr_rscs__ls
+#define A__NAME__ge arm_instr_rscs__ge
+#define A__NAME__lt arm_instr_rscs__lt
+#define A__NAME__gt arm_instr_rscs__gt
+#define A__NAME__le arm_instr_rscs__le
+#define A__S
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_tsts
+#define A__NAME__eq arm_instr_tsts__eq
+#define A__NAME__ne arm_instr_tsts__ne
+#define A__NAME__cs arm_instr_tsts__cs
+#define A__NAME__cc arm_instr_tsts__cc
+#define A__NAME__mi arm_instr_tsts__mi
+#define A__NAME__pl arm_instr_tsts__pl
+#define A__NAME__vs arm_instr_tsts__vs
+#define A__NAME__vc arm_instr_tsts__vc
+#define A__NAME__hi arm_instr_tsts__hi
+#define A__NAME__ls arm_instr_tsts__ls
+#define A__NAME__ge arm_instr_tsts__ge
+#define A__NAME__lt arm_instr_tsts__lt
+#define A__NAME__gt arm_instr_tsts__gt
+#define A__NAME__le arm_instr_tsts__le
+#define A__S
+#define A__TST
+#include "cpu_arm_instr_dpi.c"
+#undef A__TST
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_teqs
+#define A__NAME__eq arm_instr_teqs__eq
+#define A__NAME__ne arm_instr_teqs__ne
+#define A__NAME__cs arm_instr_teqs__cs
+#define A__NAME__cc arm_instr_teqs__cc
+#define A__NAME__mi arm_instr_teqs__mi
+#define A__NAME__pl arm_instr_teqs__pl
+#define A__NAME__vs arm_instr_teqs__vs
+#define A__NAME__vc arm_instr_teqs__vc
+#define A__NAME__hi arm_instr_teqs__hi
+#define A__NAME__ls arm_instr_teqs__ls
+#define A__NAME__ge arm_instr_teqs__ge
+#define A__NAME__lt arm_instr_teqs__lt
+#define A__NAME__gt arm_instr_teqs__gt
+#define A__NAME__le arm_instr_teqs__le
+#define A__S
+#define A__TEQ
+#include "cpu_arm_instr_dpi.c"
+#undef A__TEQ
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmps
+#define A__NAME__eq arm_instr_cmps__eq
+#define A__NAME__ne arm_instr_cmps__ne
+#define A__NAME__cs arm_instr_cmps__cs
+#define A__NAME__cc arm_instr_cmps__cc
+#define A__NAME__mi arm_instr_cmps__mi
+#define A__NAME__pl arm_instr_cmps__pl
+#define A__NAME__vs arm_instr_cmps__vs
+#define A__NAME__vc arm_instr_cmps__vc
+#define A__NAME__hi arm_instr_cmps__hi
+#define A__NAME__ls arm_instr_cmps__ls
+#define A__NAME__ge arm_instr_cmps__ge
+#define A__NAME__lt arm_instr_cmps__lt
+#define A__NAME__gt arm_instr_cmps__gt
+#define A__NAME__le arm_instr_cmps__le
+#define A__S
+#define A__CMP
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMP
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmns
+#define A__NAME__eq arm_instr_cmns__eq
+#define A__NAME__ne arm_instr_cmns__ne
+#define A__NAME__cs arm_instr_cmns__cs
+#define A__NAME__cc arm_instr_cmns__cc
+#define A__NAME__mi arm_instr_cmns__mi
+#define A__NAME__pl arm_instr_cmns__pl
+#define A__NAME__vs arm_instr_cmns__vs
+#define A__NAME__vc arm_instr_cmns__vc
+#define A__NAME__hi arm_instr_cmns__hi
+#define A__NAME__ls arm_instr_cmns__ls
+#define A__NAME__ge arm_instr_cmns__ge
+#define A__NAME__lt arm_instr_cmns__lt
+#define A__NAME__gt arm_instr_cmns__gt
+#define A__NAME__le arm_instr_cmns__le
+#define A__S
+#define A__CMN
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMN
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orrs
+#define A__NAME__eq arm_instr_orrs__eq
+#define A__NAME__ne arm_instr_orrs__ne
+#define A__NAME__cs arm_instr_orrs__cs
+#define A__NAME__cc arm_instr_orrs__cc
+#define A__NAME__mi arm_instr_orrs__mi
+#define A__NAME__pl arm_instr_orrs__pl
+#define A__NAME__vs arm_instr_orrs__vs
+#define A__NAME__vc arm_instr_orrs__vc
+#define A__NAME__hi arm_instr_orrs__hi
+#define A__NAME__ls arm_instr_orrs__ls
+#define A__NAME__ge arm_instr_orrs__ge
+#define A__NAME__lt arm_instr_orrs__lt
+#define A__NAME__gt arm_instr_orrs__gt
+#define A__NAME__le arm_instr_orrs__le
+#define A__S
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_movs
+#define A__NAME__eq arm_instr_movs__eq
+#define A__NAME__ne arm_instr_movs__ne
+#define A__NAME__cs arm_instr_movs__cs
+#define A__NAME__cc arm_instr_movs__cc
+#define A__NAME__mi arm_instr_movs__mi
+#define A__NAME__pl arm_instr_movs__pl
+#define A__NAME__vs arm_instr_movs__vs
+#define A__NAME__vc arm_instr_movs__vc
+#define A__NAME__hi arm_instr_movs__hi
+#define A__NAME__ls arm_instr_movs__ls
+#define A__NAME__ge arm_instr_movs__ge
+#define A__NAME__lt arm_instr_movs__lt
+#define A__NAME__gt arm_instr_movs__gt
+#define A__NAME__le arm_instr_movs__le
+#define A__S
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bics
+#define A__NAME__eq arm_instr_bics__eq
+#define A__NAME__ne arm_instr_bics__ne
+#define A__NAME__cs arm_instr_bics__cs
+#define A__NAME__cc arm_instr_bics__cc
+#define A__NAME__mi arm_instr_bics__mi
+#define A__NAME__pl arm_instr_bics__pl
+#define A__NAME__vs arm_instr_bics__vs
+#define A__NAME__vc arm_instr_bics__vc
+#define A__NAME__hi arm_instr_bics__hi
+#define A__NAME__ls arm_instr_bics__ls
+#define A__NAME__ge arm_instr_bics__ge
+#define A__NAME__lt arm_instr_bics__lt
+#define A__NAME__gt arm_instr_bics__gt
+#define A__NAME__le arm_instr_bics__le
+#define A__S
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvns
+#define A__NAME__eq arm_instr_mvns__eq
+#define A__NAME__ne arm_instr_mvns__ne
+#define A__NAME__cs arm_instr_mvns__cs
+#define A__NAME__cc arm_instr_mvns__cc
+#define A__NAME__mi arm_instr_mvns__mi
+#define A__NAME__pl arm_instr_mvns__pl
+#define A__NAME__vs arm_instr_mvns__vs
+#define A__NAME__vc arm_instr_mvns__vc
+#define A__NAME__hi arm_instr_mvns__hi
+#define A__NAME__ls arm_instr_mvns__ls
+#define A__NAME__ge arm_instr_mvns__ge
+#define A__NAME__lt arm_instr_mvns__lt
+#define A__NAME__gt arm_instr_mvns__gt
+#define A__NAME__le arm_instr_mvns__le
+#define A__S
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__S
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_and_pc
+#define A__NAME__eq arm_instr_and_pc__eq
+#define A__NAME__ne arm_instr_and_pc__ne
+#define A__NAME__cs arm_instr_and_pc__cs
+#define A__NAME__cc arm_instr_and_pc__cc
+#define A__NAME__mi arm_instr_and_pc__mi
+#define A__NAME__pl arm_instr_and_pc__pl
+#define A__NAME__vs arm_instr_and_pc__vs
+#define A__NAME__vc arm_instr_and_pc__vc
+#define A__NAME__hi arm_instr_and_pc__hi
+#define A__NAME__ls arm_instr_and_pc__ls
+#define A__NAME__ge arm_instr_and_pc__ge
+#define A__NAME__lt arm_instr_and_pc__lt
+#define A__NAME__gt arm_instr_and_pc__gt
+#define A__NAME__le arm_instr_and_pc__le
+#define A__PC
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eor_pc
+#define A__NAME__eq arm_instr_eor_pc__eq
+#define A__NAME__ne arm_instr_eor_pc__ne
+#define A__NAME__cs arm_instr_eor_pc__cs
+#define A__NAME__cc arm_instr_eor_pc__cc
+#define A__NAME__mi arm_instr_eor_pc__mi
+#define A__NAME__pl arm_instr_eor_pc__pl
+#define A__NAME__vs arm_instr_eor_pc__vs
+#define A__NAME__vc arm_instr_eor_pc__vc
+#define A__NAME__hi arm_instr_eor_pc__hi
+#define A__NAME__ls arm_instr_eor_pc__ls
+#define A__NAME__ge arm_instr_eor_pc__ge
+#define A__NAME__lt arm_instr_eor_pc__lt
+#define A__NAME__gt arm_instr_eor_pc__gt
+#define A__NAME__le arm_instr_eor_pc__le
+#define A__PC
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sub_pc
+#define A__NAME__eq arm_instr_sub_pc__eq
+#define A__NAME__ne arm_instr_sub_pc__ne
+#define A__NAME__cs arm_instr_sub_pc__cs
+#define A__NAME__cc arm_instr_sub_pc__cc
+#define A__NAME__mi arm_instr_sub_pc__mi
+#define A__NAME__pl arm_instr_sub_pc__pl
+#define A__NAME__vs arm_instr_sub_pc__vs
+#define A__NAME__vc arm_instr_sub_pc__vc
+#define A__NAME__hi arm_instr_sub_pc__hi
+#define A__NAME__ls arm_instr_sub_pc__ls
+#define A__NAME__ge arm_instr_sub_pc__ge
+#define A__NAME__lt arm_instr_sub_pc__lt
+#define A__NAME__gt arm_instr_sub_pc__gt
+#define A__NAME__le arm_instr_sub_pc__le
+#define A__PC
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsb_pc
+#define A__NAME__eq arm_instr_rsb_pc__eq
+#define A__NAME__ne arm_instr_rsb_pc__ne
+#define A__NAME__cs arm_instr_rsb_pc__cs
+#define A__NAME__cc arm_instr_rsb_pc__cc
+#define A__NAME__mi arm_instr_rsb_pc__mi
+#define A__NAME__pl arm_instr_rsb_pc__pl
+#define A__NAME__vs arm_instr_rsb_pc__vs
+#define A__NAME__vc arm_instr_rsb_pc__vc
+#define A__NAME__hi arm_instr_rsb_pc__hi
+#define A__NAME__ls arm_instr_rsb_pc__ls
+#define A__NAME__ge arm_instr_rsb_pc__ge
+#define A__NAME__lt arm_instr_rsb_pc__lt
+#define A__NAME__gt arm_instr_rsb_pc__gt
+#define A__NAME__le arm_instr_rsb_pc__le
+#define A__PC
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_add_pc
+#define A__NAME__eq arm_instr_add_pc__eq
+#define A__NAME__ne arm_instr_add_pc__ne
+#define A__NAME__cs arm_instr_add_pc__cs
+#define A__NAME__cc arm_instr_add_pc__cc
+#define A__NAME__mi arm_instr_add_pc__mi
+#define A__NAME__pl arm_instr_add_pc__pl
+#define A__NAME__vs arm_instr_add_pc__vs
+#define A__NAME__vc arm_instr_add_pc__vc
+#define A__NAME__hi arm_instr_add_pc__hi
+#define A__NAME__ls arm_instr_add_pc__ls
+#define A__NAME__ge arm_instr_add_pc__ge
+#define A__NAME__lt arm_instr_add_pc__lt
+#define A__NAME__gt arm_instr_add_pc__gt
+#define A__NAME__le arm_instr_add_pc__le
+#define A__PC
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adc_pc
+#define A__NAME__eq arm_instr_adc_pc__eq
+#define A__NAME__ne arm_instr_adc_pc__ne
+#define A__NAME__cs arm_instr_adc_pc__cs
+#define A__NAME__cc arm_instr_adc_pc__cc
+#define A__NAME__mi arm_instr_adc_pc__mi
+#define A__NAME__pl arm_instr_adc_pc__pl
+#define A__NAME__vs arm_instr_adc_pc__vs
+#define A__NAME__vc arm_instr_adc_pc__vc
+#define A__NAME__hi arm_instr_adc_pc__hi
+#define A__NAME__ls arm_instr_adc_pc__ls
+#define A__NAME__ge arm_instr_adc_pc__ge
+#define A__NAME__lt arm_instr_adc_pc__lt
+#define A__NAME__gt arm_instr_adc_pc__gt
+#define A__NAME__le arm_instr_adc_pc__le
+#define A__PC
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbc_pc
+#define A__NAME__eq arm_instr_sbc_pc__eq
+#define A__NAME__ne arm_instr_sbc_pc__ne
+#define A__NAME__cs arm_instr_sbc_pc__cs
+#define A__NAME__cc arm_instr_sbc_pc__cc
+#define A__NAME__mi arm_instr_sbc_pc__mi
+#define A__NAME__pl arm_instr_sbc_pc__pl
+#define A__NAME__vs arm_instr_sbc_pc__vs
+#define A__NAME__vc arm_instr_sbc_pc__vc
+#define A__NAME__hi arm_instr_sbc_pc__hi
+#define A__NAME__ls arm_instr_sbc_pc__ls
+#define A__NAME__ge arm_instr_sbc_pc__ge
+#define A__NAME__lt arm_instr_sbc_pc__lt
+#define A__NAME__gt arm_instr_sbc_pc__gt
+#define A__NAME__le arm_instr_sbc_pc__le
+#define A__PC
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsc_pc
+#define A__NAME__eq arm_instr_rsc_pc__eq
+#define A__NAME__ne arm_instr_rsc_pc__ne
+#define A__NAME__cs arm_instr_rsc_pc__cs
+#define A__NAME__cc arm_instr_rsc_pc__cc
+#define A__NAME__mi arm_instr_rsc_pc__mi
+#define A__NAME__pl arm_instr_rsc_pc__pl
+#define A__NAME__vs arm_instr_rsc_pc__vs
+#define A__NAME__vc arm_instr_rsc_pc__vc
+#define A__NAME__hi arm_instr_rsc_pc__hi
+#define A__NAME__ls arm_instr_rsc_pc__ls
+#define A__NAME__ge arm_instr_rsc_pc__ge
+#define A__NAME__lt arm_instr_rsc_pc__lt
+#define A__NAME__gt arm_instr_rsc_pc__gt
+#define A__NAME__le arm_instr_rsc_pc__le
+#define A__PC
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orr_pc
+#define A__NAME__eq arm_instr_orr_pc__eq
+#define A__NAME__ne arm_instr_orr_pc__ne
+#define A__NAME__cs arm_instr_orr_pc__cs
+#define A__NAME__cc arm_instr_orr_pc__cc
+#define A__NAME__mi arm_instr_orr_pc__mi
+#define A__NAME__pl arm_instr_orr_pc__pl
+#define A__NAME__vs arm_instr_orr_pc__vs
+#define A__NAME__vc arm_instr_orr_pc__vc
+#define A__NAME__hi arm_instr_orr_pc__hi
+#define A__NAME__ls arm_instr_orr_pc__ls
+#define A__NAME__ge arm_instr_orr_pc__ge
+#define A__NAME__lt arm_instr_orr_pc__lt
+#define A__NAME__gt arm_instr_orr_pc__gt
+#define A__NAME__le arm_instr_orr_pc__le
+#define A__PC
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mov_pc
+#define A__NAME__eq arm_instr_mov_pc__eq
+#define A__NAME__ne arm_instr_mov_pc__ne
+#define A__NAME__cs arm_instr_mov_pc__cs
+#define A__NAME__cc arm_instr_mov_pc__cc
+#define A__NAME__mi arm_instr_mov_pc__mi
+#define A__NAME__pl arm_instr_mov_pc__pl
+#define A__NAME__vs arm_instr_mov_pc__vs
+#define A__NAME__vc arm_instr_mov_pc__vc
+#define A__NAME__hi arm_instr_mov_pc__hi
+#define A__NAME__ls arm_instr_mov_pc__ls
+#define A__NAME__ge arm_instr_mov_pc__ge
+#define A__NAME__lt arm_instr_mov_pc__lt
+#define A__NAME__gt arm_instr_mov_pc__gt
+#define A__NAME__le arm_instr_mov_pc__le
+#define A__PC
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bic_pc
+#define A__NAME__eq arm_instr_bic_pc__eq
+#define A__NAME__ne arm_instr_bic_pc__ne
+#define A__NAME__cs arm_instr_bic_pc__cs
+#define A__NAME__cc arm_instr_bic_pc__cc
+#define A__NAME__mi arm_instr_bic_pc__mi
+#define A__NAME__pl arm_instr_bic_pc__pl
+#define A__NAME__vs arm_instr_bic_pc__vs
+#define A__NAME__vc arm_instr_bic_pc__vc
+#define A__NAME__hi arm_instr_bic_pc__hi
+#define A__NAME__ls arm_instr_bic_pc__ls
+#define A__NAME__ge arm_instr_bic_pc__ge
+#define A__NAME__lt arm_instr_bic_pc__lt
+#define A__NAME__gt arm_instr_bic_pc__gt
+#define A__NAME__le arm_instr_bic_pc__le
+#define A__PC
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvn_pc
+#define A__NAME__eq arm_instr_mvn_pc__eq
+#define A__NAME__ne arm_instr_mvn_pc__ne
+#define A__NAME__cs arm_instr_mvn_pc__cs
+#define A__NAME__cc arm_instr_mvn_pc__cc
+#define A__NAME__mi arm_instr_mvn_pc__mi
+#define A__NAME__pl arm_instr_mvn_pc__pl
+#define A__NAME__vs arm_instr_mvn_pc__vs
+#define A__NAME__vc arm_instr_mvn_pc__vc
+#define A__NAME__hi arm_instr_mvn_pc__hi
+#define A__NAME__ls arm_instr_mvn_pc__ls
+#define A__NAME__ge arm_instr_mvn_pc__ge
+#define A__NAME__lt arm_instr_mvn_pc__lt
+#define A__NAME__gt arm_instr_mvn_pc__gt
+#define A__NAME__le arm_instr_mvn_pc__le
+#define A__PC
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_ands_pc
+#define A__NAME__eq arm_instr_ands_pc__eq
+#define A__NAME__ne arm_instr_ands_pc__ne
+#define A__NAME__cs arm_instr_ands_pc__cs
+#define A__NAME__cc arm_instr_ands_pc__cc
+#define A__NAME__mi arm_instr_ands_pc__mi
+#define A__NAME__pl arm_instr_ands_pc__pl
+#define A__NAME__vs arm_instr_ands_pc__vs
+#define A__NAME__vc arm_instr_ands_pc__vc
+#define A__NAME__hi arm_instr_ands_pc__hi
+#define A__NAME__ls arm_instr_ands_pc__ls
+#define A__NAME__ge arm_instr_ands_pc__ge
+#define A__NAME__lt arm_instr_ands_pc__lt
+#define A__NAME__gt arm_instr_ands_pc__gt
+#define A__NAME__le arm_instr_ands_pc__le
+#define A__S
+#define A__PC
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eors_pc
+#define A__NAME__eq arm_instr_eors_pc__eq
+#define A__NAME__ne arm_instr_eors_pc__ne
+#define A__NAME__cs arm_instr_eors_pc__cs
+#define A__NAME__cc arm_instr_eors_pc__cc
+#define A__NAME__mi arm_instr_eors_pc__mi
+#define A__NAME__pl arm_instr_eors_pc__pl
+#define A__NAME__vs arm_instr_eors_pc__vs
+#define A__NAME__vc arm_instr_eors_pc__vc
+#define A__NAME__hi arm_instr_eors_pc__hi
+#define A__NAME__ls arm_instr_eors_pc__ls
+#define A__NAME__ge arm_instr_eors_pc__ge
+#define A__NAME__lt arm_instr_eors_pc__lt
+#define A__NAME__gt arm_instr_eors_pc__gt
+#define A__NAME__le arm_instr_eors_pc__le
+#define A__S
+#define A__PC
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_subs_pc
+#define A__NAME__eq arm_instr_subs_pc__eq
+#define A__NAME__ne arm_instr_subs_pc__ne
+#define A__NAME__cs arm_instr_subs_pc__cs
+#define A__NAME__cc arm_instr_subs_pc__cc
+#define A__NAME__mi arm_instr_subs_pc__mi
+#define A__NAME__pl arm_instr_subs_pc__pl
+#define A__NAME__vs arm_instr_subs_pc__vs
+#define A__NAME__vc arm_instr_subs_pc__vc
+#define A__NAME__hi arm_instr_subs_pc__hi
+#define A__NAME__ls arm_instr_subs_pc__ls
+#define A__NAME__ge arm_instr_subs_pc__ge
+#define A__NAME__lt arm_instr_subs_pc__lt
+#define A__NAME__gt arm_instr_subs_pc__gt
+#define A__NAME__le arm_instr_subs_pc__le
+#define A__S
+#define A__PC
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsbs_pc
+#define A__NAME__eq arm_instr_rsbs_pc__eq
+#define A__NAME__ne arm_instr_rsbs_pc__ne
+#define A__NAME__cs arm_instr_rsbs_pc__cs
+#define A__NAME__cc arm_instr_rsbs_pc__cc
+#define A__NAME__mi arm_instr_rsbs_pc__mi
+#define A__NAME__pl arm_instr_rsbs_pc__pl
+#define A__NAME__vs arm_instr_rsbs_pc__vs
+#define A__NAME__vc arm_instr_rsbs_pc__vc
+#define A__NAME__hi arm_instr_rsbs_pc__hi
+#define A__NAME__ls arm_instr_rsbs_pc__ls
+#define A__NAME__ge arm_instr_rsbs_pc__ge
+#define A__NAME__lt arm_instr_rsbs_pc__lt
+#define A__NAME__gt arm_instr_rsbs_pc__gt
+#define A__NAME__le arm_instr_rsbs_pc__le
+#define A__S
+#define A__PC
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adds_pc
+#define A__NAME__eq arm_instr_adds_pc__eq
+#define A__NAME__ne arm_instr_adds_pc__ne
+#define A__NAME__cs arm_instr_adds_pc__cs
+#define A__NAME__cc arm_instr_adds_pc__cc
+#define A__NAME__mi arm_instr_adds_pc__mi
+#define A__NAME__pl arm_instr_adds_pc__pl
+#define A__NAME__vs arm_instr_adds_pc__vs
+#define A__NAME__vc arm_instr_adds_pc__vc
+#define A__NAME__hi arm_instr_adds_pc__hi
+#define A__NAME__ls arm_instr_adds_pc__ls
+#define A__NAME__ge arm_instr_adds_pc__ge
+#define A__NAME__lt arm_instr_adds_pc__lt
+#define A__NAME__gt arm_instr_adds_pc__gt
+#define A__NAME__le arm_instr_adds_pc__le
+#define A__S
+#define A__PC
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adcs_pc
+#define A__NAME__eq arm_instr_adcs_pc__eq
+#define A__NAME__ne arm_instr_adcs_pc__ne
+#define A__NAME__cs arm_instr_adcs_pc__cs
+#define A__NAME__cc arm_instr_adcs_pc__cc
+#define A__NAME__mi arm_instr_adcs_pc__mi
+#define A__NAME__pl arm_instr_adcs_pc__pl
+#define A__NAME__vs arm_instr_adcs_pc__vs
+#define A__NAME__vc arm_instr_adcs_pc__vc
+#define A__NAME__hi arm_instr_adcs_pc__hi
+#define A__NAME__ls arm_instr_adcs_pc__ls
+#define A__NAME__ge arm_instr_adcs_pc__ge
+#define A__NAME__lt arm_instr_adcs_pc__lt
+#define A__NAME__gt arm_instr_adcs_pc__gt
+#define A__NAME__le arm_instr_adcs_pc__le
+#define A__S
+#define A__PC
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbcs_pc
+#define A__NAME__eq arm_instr_sbcs_pc__eq
+#define A__NAME__ne arm_instr_sbcs_pc__ne
+#define A__NAME__cs arm_instr_sbcs_pc__cs
+#define A__NAME__cc arm_instr_sbcs_pc__cc
+#define A__NAME__mi arm_instr_sbcs_pc__mi
+#define A__NAME__pl arm_instr_sbcs_pc__pl
+#define A__NAME__vs arm_instr_sbcs_pc__vs
+#define A__NAME__vc arm_instr_sbcs_pc__vc
+#define A__NAME__hi arm_instr_sbcs_pc__hi
+#define A__NAME__ls arm_instr_sbcs_pc__ls
+#define A__NAME__ge arm_instr_sbcs_pc__ge
+#define A__NAME__lt arm_instr_sbcs_pc__lt
+#define A__NAME__gt arm_instr_sbcs_pc__gt
+#define A__NAME__le arm_instr_sbcs_pc__le
+#define A__S
+#define A__PC
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rscs_pc
+#define A__NAME__eq arm_instr_rscs_pc__eq
+#define A__NAME__ne arm_instr_rscs_pc__ne
+#define A__NAME__cs arm_instr_rscs_pc__cs
+#define A__NAME__cc arm_instr_rscs_pc__cc
+#define A__NAME__mi arm_instr_rscs_pc__mi
+#define A__NAME__pl arm_instr_rscs_pc__pl
+#define A__NAME__vs arm_instr_rscs_pc__vs
+#define A__NAME__vc arm_instr_rscs_pc__vc
+#define A__NAME__hi arm_instr_rscs_pc__hi
+#define A__NAME__ls arm_instr_rscs_pc__ls
+#define A__NAME__ge arm_instr_rscs_pc__ge
+#define A__NAME__lt arm_instr_rscs_pc__lt
+#define A__NAME__gt arm_instr_rscs_pc__gt
+#define A__NAME__le arm_instr_rscs_pc__le
+#define A__S
+#define A__PC
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_tsts_pc
+#define A__NAME__eq arm_instr_tsts_pc__eq
+#define A__NAME__ne arm_instr_tsts_pc__ne
+#define A__NAME__cs arm_instr_tsts_pc__cs
+#define A__NAME__cc arm_instr_tsts_pc__cc
+#define A__NAME__mi arm_instr_tsts_pc__mi
+#define A__NAME__pl arm_instr_tsts_pc__pl
+#define A__NAME__vs arm_instr_tsts_pc__vs
+#define A__NAME__vc arm_instr_tsts_pc__vc
+#define A__NAME__hi arm_instr_tsts_pc__hi
+#define A__NAME__ls arm_instr_tsts_pc__ls
+#define A__NAME__ge arm_instr_tsts_pc__ge
+#define A__NAME__lt arm_instr_tsts_pc__lt
+#define A__NAME__gt arm_instr_tsts_pc__gt
+#define A__NAME__le arm_instr_tsts_pc__le
+#define A__S
+#define A__PC
+#define A__TST
+#include "cpu_arm_instr_dpi.c"
+#undef A__TST
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_teqs_pc
+#define A__NAME__eq arm_instr_teqs_pc__eq
+#define A__NAME__ne arm_instr_teqs_pc__ne
+#define A__NAME__cs arm_instr_teqs_pc__cs
+#define A__NAME__cc arm_instr_teqs_pc__cc
+#define A__NAME__mi arm_instr_teqs_pc__mi
+#define A__NAME__pl arm_instr_teqs_pc__pl
+#define A__NAME__vs arm_instr_teqs_pc__vs
+#define A__NAME__vc arm_instr_teqs_pc__vc
+#define A__NAME__hi arm_instr_teqs_pc__hi
+#define A__NAME__ls arm_instr_teqs_pc__ls
+#define A__NAME__ge arm_instr_teqs_pc__ge
+#define A__NAME__lt arm_instr_teqs_pc__lt
+#define A__NAME__gt arm_instr_teqs_pc__gt
+#define A__NAME__le arm_instr_teqs_pc__le
+#define A__S
+#define A__PC
+#define A__TEQ
+#include "cpu_arm_instr_dpi.c"
+#undef A__TEQ
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmps_pc
+#define A__NAME__eq arm_instr_cmps_pc__eq
+#define A__NAME__ne arm_instr_cmps_pc__ne
+#define A__NAME__cs arm_instr_cmps_pc__cs
+#define A__NAME__cc arm_instr_cmps_pc__cc
+#define A__NAME__mi arm_instr_cmps_pc__mi
+#define A__NAME__pl arm_instr_cmps_pc__pl
+#define A__NAME__vs arm_instr_cmps_pc__vs
+#define A__NAME__vc arm_instr_cmps_pc__vc
+#define A__NAME__hi arm_instr_cmps_pc__hi
+#define A__NAME__ls arm_instr_cmps_pc__ls
+#define A__NAME__ge arm_instr_cmps_pc__ge
+#define A__NAME__lt arm_instr_cmps_pc__lt
+#define A__NAME__gt arm_instr_cmps_pc__gt
+#define A__NAME__le arm_instr_cmps_pc__le
+#define A__S
+#define A__PC
+#define A__CMP
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMP
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmns_pc
+#define A__NAME__eq arm_instr_cmns_pc__eq
+#define A__NAME__ne arm_instr_cmns_pc__ne
+#define A__NAME__cs arm_instr_cmns_pc__cs
+#define A__NAME__cc arm_instr_cmns_pc__cc
+#define A__NAME__mi arm_instr_cmns_pc__mi
+#define A__NAME__pl arm_instr_cmns_pc__pl
+#define A__NAME__vs arm_instr_cmns_pc__vs
+#define A__NAME__vc arm_instr_cmns_pc__vc
+#define A__NAME__hi arm_instr_cmns_pc__hi
+#define A__NAME__ls arm_instr_cmns_pc__ls
+#define A__NAME__ge arm_instr_cmns_pc__ge
+#define A__NAME__lt arm_instr_cmns_pc__lt
+#define A__NAME__gt arm_instr_cmns_pc__gt
+#define A__NAME__le arm_instr_cmns_pc__le
+#define A__S
+#define A__PC
+#define A__CMN
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMN
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orrs_pc
+#define A__NAME__eq arm_instr_orrs_pc__eq
+#define A__NAME__ne arm_instr_orrs_pc__ne
+#define A__NAME__cs arm_instr_orrs_pc__cs
+#define A__NAME__cc arm_instr_orrs_pc__cc
+#define A__NAME__mi arm_instr_orrs_pc__mi
+#define A__NAME__pl arm_instr_orrs_pc__pl
+#define A__NAME__vs arm_instr_orrs_pc__vs
+#define A__NAME__vc arm_instr_orrs_pc__vc
+#define A__NAME__hi arm_instr_orrs_pc__hi
+#define A__NAME__ls arm_instr_orrs_pc__ls
+#define A__NAME__ge arm_instr_orrs_pc__ge
+#define A__NAME__lt arm_instr_orrs_pc__lt
+#define A__NAME__gt arm_instr_orrs_pc__gt
+#define A__NAME__le arm_instr_orrs_pc__le
+#define A__S
+#define A__PC
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_movs_pc
+#define A__NAME__eq arm_instr_movs_pc__eq
+#define A__NAME__ne arm_instr_movs_pc__ne
+#define A__NAME__cs arm_instr_movs_pc__cs
+#define A__NAME__cc arm_instr_movs_pc__cc
+#define A__NAME__mi arm_instr_movs_pc__mi
+#define A__NAME__pl arm_instr_movs_pc__pl
+#define A__NAME__vs arm_instr_movs_pc__vs
+#define A__NAME__vc arm_instr_movs_pc__vc
+#define A__NAME__hi arm_instr_movs_pc__hi
+#define A__NAME__ls arm_instr_movs_pc__ls
+#define A__NAME__ge arm_instr_movs_pc__ge
+#define A__NAME__lt arm_instr_movs_pc__lt
+#define A__NAME__gt arm_instr_movs_pc__gt
+#define A__NAME__le arm_instr_movs_pc__le
+#define A__S
+#define A__PC
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bics_pc
+#define A__NAME__eq arm_instr_bics_pc__eq
+#define A__NAME__ne arm_instr_bics_pc__ne
+#define A__NAME__cs arm_instr_bics_pc__cs
+#define A__NAME__cc arm_instr_bics_pc__cc
+#define A__NAME__mi arm_instr_bics_pc__mi
+#define A__NAME__pl arm_instr_bics_pc__pl
+#define A__NAME__vs arm_instr_bics_pc__vs
+#define A__NAME__vc arm_instr_bics_pc__vc
+#define A__NAME__hi arm_instr_bics_pc__hi
+#define A__NAME__ls arm_instr_bics_pc__ls
+#define A__NAME__ge arm_instr_bics_pc__ge
+#define A__NAME__lt arm_instr_bics_pc__lt
+#define A__NAME__gt arm_instr_bics_pc__gt
+#define A__NAME__le arm_instr_bics_pc__le
+#define A__S
+#define A__PC
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvns_pc
+#define A__NAME__eq arm_instr_mvns_pc__eq
+#define A__NAME__ne arm_instr_mvns_pc__ne
+#define A__NAME__cs arm_instr_mvns_pc__cs
+#define A__NAME__cc arm_instr_mvns_pc__cc
+#define A__NAME__mi arm_instr_mvns_pc__mi
+#define A__NAME__pl arm_instr_mvns_pc__pl
+#define A__NAME__vs arm_instr_mvns_pc__vs
+#define A__NAME__vc arm_instr_mvns_pc__vc
+#define A__NAME__hi arm_instr_mvns_pc__hi
+#define A__NAME__ls arm_instr_mvns_pc__ls
+#define A__NAME__ge arm_instr_mvns_pc__ge
+#define A__NAME__lt arm_instr_mvns_pc__lt
+#define A__NAME__gt arm_instr_mvns_pc__gt
+#define A__NAME__le arm_instr_mvns_pc__le
+#define A__S
+#define A__PC
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__S
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_and_reg
+#define A__NAME__eq arm_instr_and_reg__eq
+#define A__NAME__ne arm_instr_and_reg__ne
+#define A__NAME__cs arm_instr_and_reg__cs
+#define A__NAME__cc arm_instr_and_reg__cc
+#define A__NAME__mi arm_instr_and_reg__mi
+#define A__NAME__pl arm_instr_and_reg__pl
+#define A__NAME__vs arm_instr_and_reg__vs
+#define A__NAME__vc arm_instr_and_reg__vc
+#define A__NAME__hi arm_instr_and_reg__hi
+#define A__NAME__ls arm_instr_and_reg__ls
+#define A__NAME__ge arm_instr_and_reg__ge
+#define A__NAME__lt arm_instr_and_reg__lt
+#define A__NAME__gt arm_instr_and_reg__gt
+#define A__NAME__le arm_instr_and_reg__le
+#define A__REG
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eor_reg
+#define A__NAME__eq arm_instr_eor_reg__eq
+#define A__NAME__ne arm_instr_eor_reg__ne
+#define A__NAME__cs arm_instr_eor_reg__cs
+#define A__NAME__cc arm_instr_eor_reg__cc
+#define A__NAME__mi arm_instr_eor_reg__mi
+#define A__NAME__pl arm_instr_eor_reg__pl
+#define A__NAME__vs arm_instr_eor_reg__vs
+#define A__NAME__vc arm_instr_eor_reg__vc
+#define A__NAME__hi arm_instr_eor_reg__hi
+#define A__NAME__ls arm_instr_eor_reg__ls
+#define A__NAME__ge arm_instr_eor_reg__ge
+#define A__NAME__lt arm_instr_eor_reg__lt
+#define A__NAME__gt arm_instr_eor_reg__gt
+#define A__NAME__le arm_instr_eor_reg__le
+#define A__REG
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sub_reg
+#define A__NAME__eq arm_instr_sub_reg__eq
+#define A__NAME__ne arm_instr_sub_reg__ne
+#define A__NAME__cs arm_instr_sub_reg__cs
+#define A__NAME__cc arm_instr_sub_reg__cc
+#define A__NAME__mi arm_instr_sub_reg__mi
+#define A__NAME__pl arm_instr_sub_reg__pl
+#define A__NAME__vs arm_instr_sub_reg__vs
+#define A__NAME__vc arm_instr_sub_reg__vc
+#define A__NAME__hi arm_instr_sub_reg__hi
+#define A__NAME__ls arm_instr_sub_reg__ls
+#define A__NAME__ge arm_instr_sub_reg__ge
+#define A__NAME__lt arm_instr_sub_reg__lt
+#define A__NAME__gt arm_instr_sub_reg__gt
+#define A__NAME__le arm_instr_sub_reg__le
+#define A__REG
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsb_reg
+#define A__NAME__eq arm_instr_rsb_reg__eq
+#define A__NAME__ne arm_instr_rsb_reg__ne
+#define A__NAME__cs arm_instr_rsb_reg__cs
+#define A__NAME__cc arm_instr_rsb_reg__cc
+#define A__NAME__mi arm_instr_rsb_reg__mi
+#define A__NAME__pl arm_instr_rsb_reg__pl
+#define A__NAME__vs arm_instr_rsb_reg__vs
+#define A__NAME__vc arm_instr_rsb_reg__vc
+#define A__NAME__hi arm_instr_rsb_reg__hi
+#define A__NAME__ls arm_instr_rsb_reg__ls
+#define A__NAME__ge arm_instr_rsb_reg__ge
+#define A__NAME__lt arm_instr_rsb_reg__lt
+#define A__NAME__gt arm_instr_rsb_reg__gt
+#define A__NAME__le arm_instr_rsb_reg__le
+#define A__REG
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_add_reg
+#define A__NAME__eq arm_instr_add_reg__eq
+#define A__NAME__ne arm_instr_add_reg__ne
+#define A__NAME__cs arm_instr_add_reg__cs
+#define A__NAME__cc arm_instr_add_reg__cc
+#define A__NAME__mi arm_instr_add_reg__mi
+#define A__NAME__pl arm_instr_add_reg__pl
+#define A__NAME__vs arm_instr_add_reg__vs
+#define A__NAME__vc arm_instr_add_reg__vc
+#define A__NAME__hi arm_instr_add_reg__hi
+#define A__NAME__ls arm_instr_add_reg__ls
+#define A__NAME__ge arm_instr_add_reg__ge
+#define A__NAME__lt arm_instr_add_reg__lt
+#define A__NAME__gt arm_instr_add_reg__gt
+#define A__NAME__le arm_instr_add_reg__le
+#define A__REG
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adc_reg
+#define A__NAME__eq arm_instr_adc_reg__eq
+#define A__NAME__ne arm_instr_adc_reg__ne
+#define A__NAME__cs arm_instr_adc_reg__cs
+#define A__NAME__cc arm_instr_adc_reg__cc
+#define A__NAME__mi arm_instr_adc_reg__mi
+#define A__NAME__pl arm_instr_adc_reg__pl
+#define A__NAME__vs arm_instr_adc_reg__vs
+#define A__NAME__vc arm_instr_adc_reg__vc
+#define A__NAME__hi arm_instr_adc_reg__hi
+#define A__NAME__ls arm_instr_adc_reg__ls
+#define A__NAME__ge arm_instr_adc_reg__ge
+#define A__NAME__lt arm_instr_adc_reg__lt
+#define A__NAME__gt arm_instr_adc_reg__gt
+#define A__NAME__le arm_instr_adc_reg__le
+#define A__REG
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbc_reg
+#define A__NAME__eq arm_instr_sbc_reg__eq
+#define A__NAME__ne arm_instr_sbc_reg__ne
+#define A__NAME__cs arm_instr_sbc_reg__cs
+#define A__NAME__cc arm_instr_sbc_reg__cc
+#define A__NAME__mi arm_instr_sbc_reg__mi
+#define A__NAME__pl arm_instr_sbc_reg__pl
+#define A__NAME__vs arm_instr_sbc_reg__vs
+#define A__NAME__vc arm_instr_sbc_reg__vc
+#define A__NAME__hi arm_instr_sbc_reg__hi
+#define A__NAME__ls arm_instr_sbc_reg__ls
+#define A__NAME__ge arm_instr_sbc_reg__ge
+#define A__NAME__lt arm_instr_sbc_reg__lt
+#define A__NAME__gt arm_instr_sbc_reg__gt
+#define A__NAME__le arm_instr_sbc_reg__le
+#define A__REG
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsc_reg
+#define A__NAME__eq arm_instr_rsc_reg__eq
+#define A__NAME__ne arm_instr_rsc_reg__ne
+#define A__NAME__cs arm_instr_rsc_reg__cs
+#define A__NAME__cc arm_instr_rsc_reg__cc
+#define A__NAME__mi arm_instr_rsc_reg__mi
+#define A__NAME__pl arm_instr_rsc_reg__pl
+#define A__NAME__vs arm_instr_rsc_reg__vs
+#define A__NAME__vc arm_instr_rsc_reg__vc
+#define A__NAME__hi arm_instr_rsc_reg__hi
+#define A__NAME__ls arm_instr_rsc_reg__ls
+#define A__NAME__ge arm_instr_rsc_reg__ge
+#define A__NAME__lt arm_instr_rsc_reg__lt
+#define A__NAME__gt arm_instr_rsc_reg__gt
+#define A__NAME__le arm_instr_rsc_reg__le
+#define A__REG
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orr_reg
+#define A__NAME__eq arm_instr_orr_reg__eq
+#define A__NAME__ne arm_instr_orr_reg__ne
+#define A__NAME__cs arm_instr_orr_reg__cs
+#define A__NAME__cc arm_instr_orr_reg__cc
+#define A__NAME__mi arm_instr_orr_reg__mi
+#define A__NAME__pl arm_instr_orr_reg__pl
+#define A__NAME__vs arm_instr_orr_reg__vs
+#define A__NAME__vc arm_instr_orr_reg__vc
+#define A__NAME__hi arm_instr_orr_reg__hi
+#define A__NAME__ls arm_instr_orr_reg__ls
+#define A__NAME__ge arm_instr_orr_reg__ge
+#define A__NAME__lt arm_instr_orr_reg__lt
+#define A__NAME__gt arm_instr_orr_reg__gt
+#define A__NAME__le arm_instr_orr_reg__le
+#define A__REG
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mov_reg
+#define A__NAME__eq arm_instr_mov_reg__eq
+#define A__NAME__ne arm_instr_mov_reg__ne
+#define A__NAME__cs arm_instr_mov_reg__cs
+#define A__NAME__cc arm_instr_mov_reg__cc
+#define A__NAME__mi arm_instr_mov_reg__mi
+#define A__NAME__pl arm_instr_mov_reg__pl
+#define A__NAME__vs arm_instr_mov_reg__vs
+#define A__NAME__vc arm_instr_mov_reg__vc
+#define A__NAME__hi arm_instr_mov_reg__hi
+#define A__NAME__ls arm_instr_mov_reg__ls
+#define A__NAME__ge arm_instr_mov_reg__ge
+#define A__NAME__lt arm_instr_mov_reg__lt
+#define A__NAME__gt arm_instr_mov_reg__gt
+#define A__NAME__le arm_instr_mov_reg__le
+#define A__REG
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bic_reg
+#define A__NAME__eq arm_instr_bic_reg__eq
+#define A__NAME__ne arm_instr_bic_reg__ne
+#define A__NAME__cs arm_instr_bic_reg__cs
+#define A__NAME__cc arm_instr_bic_reg__cc
+#define A__NAME__mi arm_instr_bic_reg__mi
+#define A__NAME__pl arm_instr_bic_reg__pl
+#define A__NAME__vs arm_instr_bic_reg__vs
+#define A__NAME__vc arm_instr_bic_reg__vc
+#define A__NAME__hi arm_instr_bic_reg__hi
+#define A__NAME__ls arm_instr_bic_reg__ls
+#define A__NAME__ge arm_instr_bic_reg__ge
+#define A__NAME__lt arm_instr_bic_reg__lt
+#define A__NAME__gt arm_instr_bic_reg__gt
+#define A__NAME__le arm_instr_bic_reg__le
+#define A__REG
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvn_reg
+#define A__NAME__eq arm_instr_mvn_reg__eq
+#define A__NAME__ne arm_instr_mvn_reg__ne
+#define A__NAME__cs arm_instr_mvn_reg__cs
+#define A__NAME__cc arm_instr_mvn_reg__cc
+#define A__NAME__mi arm_instr_mvn_reg__mi
+#define A__NAME__pl arm_instr_mvn_reg__pl
+#define A__NAME__vs arm_instr_mvn_reg__vs
+#define A__NAME__vc arm_instr_mvn_reg__vc
+#define A__NAME__hi arm_instr_mvn_reg__hi
+#define A__NAME__ls arm_instr_mvn_reg__ls
+#define A__NAME__ge arm_instr_mvn_reg__ge
+#define A__NAME__lt arm_instr_mvn_reg__lt
+#define A__NAME__gt arm_instr_mvn_reg__gt
+#define A__NAME__le arm_instr_mvn_reg__le
+#define A__REG
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_ands_reg
+#define A__NAME__eq arm_instr_ands_reg__eq
+#define A__NAME__ne arm_instr_ands_reg__ne
+#define A__NAME__cs arm_instr_ands_reg__cs
+#define A__NAME__cc arm_instr_ands_reg__cc
+#define A__NAME__mi arm_instr_ands_reg__mi
+#define A__NAME__pl arm_instr_ands_reg__pl
+#define A__NAME__vs arm_instr_ands_reg__vs
+#define A__NAME__vc arm_instr_ands_reg__vc
+#define A__NAME__hi arm_instr_ands_reg__hi
+#define A__NAME__ls arm_instr_ands_reg__ls
+#define A__NAME__ge arm_instr_ands_reg__ge
+#define A__NAME__lt arm_instr_ands_reg__lt
+#define A__NAME__gt arm_instr_ands_reg__gt
+#define A__NAME__le arm_instr_ands_reg__le
+#define A__S
+#define A__REG
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eors_reg
+#define A__NAME__eq arm_instr_eors_reg__eq
+#define A__NAME__ne arm_instr_eors_reg__ne
+#define A__NAME__cs arm_instr_eors_reg__cs
+#define A__NAME__cc arm_instr_eors_reg__cc
+#define A__NAME__mi arm_instr_eors_reg__mi
+#define A__NAME__pl arm_instr_eors_reg__pl
+#define A__NAME__vs arm_instr_eors_reg__vs
+#define A__NAME__vc arm_instr_eors_reg__vc
+#define A__NAME__hi arm_instr_eors_reg__hi
+#define A__NAME__ls arm_instr_eors_reg__ls
+#define A__NAME__ge arm_instr_eors_reg__ge
+#define A__NAME__lt arm_instr_eors_reg__lt
+#define A__NAME__gt arm_instr_eors_reg__gt
+#define A__NAME__le arm_instr_eors_reg__le
+#define A__S
+#define A__REG
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_subs_reg
+#define A__NAME__eq arm_instr_subs_reg__eq
+#define A__NAME__ne arm_instr_subs_reg__ne
+#define A__NAME__cs arm_instr_subs_reg__cs
+#define A__NAME__cc arm_instr_subs_reg__cc
+#define A__NAME__mi arm_instr_subs_reg__mi
+#define A__NAME__pl arm_instr_subs_reg__pl
+#define A__NAME__vs arm_instr_subs_reg__vs
+#define A__NAME__vc arm_instr_subs_reg__vc
+#define A__NAME__hi arm_instr_subs_reg__hi
+#define A__NAME__ls arm_instr_subs_reg__ls
+#define A__NAME__ge arm_instr_subs_reg__ge
+#define A__NAME__lt arm_instr_subs_reg__lt
+#define A__NAME__gt arm_instr_subs_reg__gt
+#define A__NAME__le arm_instr_subs_reg__le
+#define A__S
+#define A__REG
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsbs_reg
+#define A__NAME__eq arm_instr_rsbs_reg__eq
+#define A__NAME__ne arm_instr_rsbs_reg__ne
+#define A__NAME__cs arm_instr_rsbs_reg__cs
+#define A__NAME__cc arm_instr_rsbs_reg__cc
+#define A__NAME__mi arm_instr_rsbs_reg__mi
+#define A__NAME__pl arm_instr_rsbs_reg__pl
+#define A__NAME__vs arm_instr_rsbs_reg__vs
+#define A__NAME__vc arm_instr_rsbs_reg__vc
+#define A__NAME__hi arm_instr_rsbs_reg__hi
+#define A__NAME__ls arm_instr_rsbs_reg__ls
+#define A__NAME__ge arm_instr_rsbs_reg__ge
+#define A__NAME__lt arm_instr_rsbs_reg__lt
+#define A__NAME__gt arm_instr_rsbs_reg__gt
+#define A__NAME__le arm_instr_rsbs_reg__le
+#define A__S
+#define A__REG
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adds_reg
+#define A__NAME__eq arm_instr_adds_reg__eq
+#define A__NAME__ne arm_instr_adds_reg__ne
+#define A__NAME__cs arm_instr_adds_reg__cs
+#define A__NAME__cc arm_instr_adds_reg__cc
+#define A__NAME__mi arm_instr_adds_reg__mi
+#define A__NAME__pl arm_instr_adds_reg__pl
+#define A__NAME__vs arm_instr_adds_reg__vs
+#define A__NAME__vc arm_instr_adds_reg__vc
+#define A__NAME__hi arm_instr_adds_reg__hi
+#define A__NAME__ls arm_instr_adds_reg__ls
+#define A__NAME__ge arm_instr_adds_reg__ge
+#define A__NAME__lt arm_instr_adds_reg__lt
+#define A__NAME__gt arm_instr_adds_reg__gt
+#define A__NAME__le arm_instr_adds_reg__le
+#define A__S
+#define A__REG
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adcs_reg
+#define A__NAME__eq arm_instr_adcs_reg__eq
+#define A__NAME__ne arm_instr_adcs_reg__ne
+#define A__NAME__cs arm_instr_adcs_reg__cs
+#define A__NAME__cc arm_instr_adcs_reg__cc
+#define A__NAME__mi arm_instr_adcs_reg__mi
+#define A__NAME__pl arm_instr_adcs_reg__pl
+#define A__NAME__vs arm_instr_adcs_reg__vs
+#define A__NAME__vc arm_instr_adcs_reg__vc
+#define A__NAME__hi arm_instr_adcs_reg__hi
+#define A__NAME__ls arm_instr_adcs_reg__ls
+#define A__NAME__ge arm_instr_adcs_reg__ge
+#define A__NAME__lt arm_instr_adcs_reg__lt
+#define A__NAME__gt arm_instr_adcs_reg__gt
+#define A__NAME__le arm_instr_adcs_reg__le
+#define A__S
+#define A__REG
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbcs_reg
+#define A__NAME__eq arm_instr_sbcs_reg__eq
+#define A__NAME__ne arm_instr_sbcs_reg__ne
+#define A__NAME__cs arm_instr_sbcs_reg__cs
+#define A__NAME__cc arm_instr_sbcs_reg__cc
+#define A__NAME__mi arm_instr_sbcs_reg__mi
+#define A__NAME__pl arm_instr_sbcs_reg__pl
+#define A__NAME__vs arm_instr_sbcs_reg__vs
+#define A__NAME__vc arm_instr_sbcs_reg__vc
+#define A__NAME__hi arm_instr_sbcs_reg__hi
+#define A__NAME__ls arm_instr_sbcs_reg__ls
+#define A__NAME__ge arm_instr_sbcs_reg__ge
+#define A__NAME__lt arm_instr_sbcs_reg__lt
+#define A__NAME__gt arm_instr_sbcs_reg__gt
+#define A__NAME__le arm_instr_sbcs_reg__le
+#define A__S
+#define A__REG
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rscs_reg
+#define A__NAME__eq arm_instr_rscs_reg__eq
+#define A__NAME__ne arm_instr_rscs_reg__ne
+#define A__NAME__cs arm_instr_rscs_reg__cs
+#define A__NAME__cc arm_instr_rscs_reg__cc
+#define A__NAME__mi arm_instr_rscs_reg__mi
+#define A__NAME__pl arm_instr_rscs_reg__pl
+#define A__NAME__vs arm_instr_rscs_reg__vs
+#define A__NAME__vc arm_instr_rscs_reg__vc
+#define A__NAME__hi arm_instr_rscs_reg__hi
+#define A__NAME__ls arm_instr_rscs_reg__ls
+#define A__NAME__ge arm_instr_rscs_reg__ge
+#define A__NAME__lt arm_instr_rscs_reg__lt
+#define A__NAME__gt arm_instr_rscs_reg__gt
+#define A__NAME__le arm_instr_rscs_reg__le
+#define A__S
+#define A__REG
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_tsts_reg
+#define A__NAME__eq arm_instr_tsts_reg__eq
+#define A__NAME__ne arm_instr_tsts_reg__ne
+#define A__NAME__cs arm_instr_tsts_reg__cs
+#define A__NAME__cc arm_instr_tsts_reg__cc
+#define A__NAME__mi arm_instr_tsts_reg__mi
+#define A__NAME__pl arm_instr_tsts_reg__pl
+#define A__NAME__vs arm_instr_tsts_reg__vs
+#define A__NAME__vc arm_instr_tsts_reg__vc
+#define A__NAME__hi arm_instr_tsts_reg__hi
+#define A__NAME__ls arm_instr_tsts_reg__ls
+#define A__NAME__ge arm_instr_tsts_reg__ge
+#define A__NAME__lt arm_instr_tsts_reg__lt
+#define A__NAME__gt arm_instr_tsts_reg__gt
+#define A__NAME__le arm_instr_tsts_reg__le
+#define A__S
+#define A__REG
+#define A__TST
+#include "cpu_arm_instr_dpi.c"
+#undef A__TST
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_teqs_reg
+#define A__NAME__eq arm_instr_teqs_reg__eq
+#define A__NAME__ne arm_instr_teqs_reg__ne
+#define A__NAME__cs arm_instr_teqs_reg__cs
+#define A__NAME__cc arm_instr_teqs_reg__cc
+#define A__NAME__mi arm_instr_teqs_reg__mi
+#define A__NAME__pl arm_instr_teqs_reg__pl
+#define A__NAME__vs arm_instr_teqs_reg__vs
+#define A__NAME__vc arm_instr_teqs_reg__vc
+#define A__NAME__hi arm_instr_teqs_reg__hi
+#define A__NAME__ls arm_instr_teqs_reg__ls
+#define A__NAME__ge arm_instr_teqs_reg__ge
+#define A__NAME__lt arm_instr_teqs_reg__lt
+#define A__NAME__gt arm_instr_teqs_reg__gt
+#define A__NAME__le arm_instr_teqs_reg__le
+#define A__S
+#define A__REG
+#define A__TEQ
+#include "cpu_arm_instr_dpi.c"
+#undef A__TEQ
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmps_reg
+#define A__NAME__eq arm_instr_cmps_reg__eq
+#define A__NAME__ne arm_instr_cmps_reg__ne
+#define A__NAME__cs arm_instr_cmps_reg__cs
+#define A__NAME__cc arm_instr_cmps_reg__cc
+#define A__NAME__mi arm_instr_cmps_reg__mi
+#define A__NAME__pl arm_instr_cmps_reg__pl
+#define A__NAME__vs arm_instr_cmps_reg__vs
+#define A__NAME__vc arm_instr_cmps_reg__vc
+#define A__NAME__hi arm_instr_cmps_reg__hi
+#define A__NAME__ls arm_instr_cmps_reg__ls
+#define A__NAME__ge arm_instr_cmps_reg__ge
+#define A__NAME__lt arm_instr_cmps_reg__lt
+#define A__NAME__gt arm_instr_cmps_reg__gt
+#define A__NAME__le arm_instr_cmps_reg__le
+#define A__S
+#define A__REG
+#define A__CMP
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMP
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmns_reg
+#define A__NAME__eq arm_instr_cmns_reg__eq
+#define A__NAME__ne arm_instr_cmns_reg__ne
+#define A__NAME__cs arm_instr_cmns_reg__cs
+#define A__NAME__cc arm_instr_cmns_reg__cc
+#define A__NAME__mi arm_instr_cmns_reg__mi
+#define A__NAME__pl arm_instr_cmns_reg__pl
+#define A__NAME__vs arm_instr_cmns_reg__vs
+#define A__NAME__vc arm_instr_cmns_reg__vc
+#define A__NAME__hi arm_instr_cmns_reg__hi
+#define A__NAME__ls arm_instr_cmns_reg__ls
+#define A__NAME__ge arm_instr_cmns_reg__ge
+#define A__NAME__lt arm_instr_cmns_reg__lt
+#define A__NAME__gt arm_instr_cmns_reg__gt
+#define A__NAME__le arm_instr_cmns_reg__le
+#define A__S
+#define A__REG
+#define A__CMN
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMN
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orrs_reg
+#define A__NAME__eq arm_instr_orrs_reg__eq
+#define A__NAME__ne arm_instr_orrs_reg__ne
+#define A__NAME__cs arm_instr_orrs_reg__cs
+#define A__NAME__cc arm_instr_orrs_reg__cc
+#define A__NAME__mi arm_instr_orrs_reg__mi
+#define A__NAME__pl arm_instr_orrs_reg__pl
+#define A__NAME__vs arm_instr_orrs_reg__vs
+#define A__NAME__vc arm_instr_orrs_reg__vc
+#define A__NAME__hi arm_instr_orrs_reg__hi
+#define A__NAME__ls arm_instr_orrs_reg__ls
+#define A__NAME__ge arm_instr_orrs_reg__ge
+#define A__NAME__lt arm_instr_orrs_reg__lt
+#define A__NAME__gt arm_instr_orrs_reg__gt
+#define A__NAME__le arm_instr_orrs_reg__le
+#define A__S
+#define A__REG
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_movs_reg
+#define A__NAME__eq arm_instr_movs_reg__eq
+#define A__NAME__ne arm_instr_movs_reg__ne
+#define A__NAME__cs arm_instr_movs_reg__cs
+#define A__NAME__cc arm_instr_movs_reg__cc
+#define A__NAME__mi arm_instr_movs_reg__mi
+#define A__NAME__pl arm_instr_movs_reg__pl
+#define A__NAME__vs arm_instr_movs_reg__vs
+#define A__NAME__vc arm_instr_movs_reg__vc
+#define A__NAME__hi arm_instr_movs_reg__hi
+#define A__NAME__ls arm_instr_movs_reg__ls
+#define A__NAME__ge arm_instr_movs_reg__ge
+#define A__NAME__lt arm_instr_movs_reg__lt
+#define A__NAME__gt arm_instr_movs_reg__gt
+#define A__NAME__le arm_instr_movs_reg__le
+#define A__S
+#define A__REG
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bics_reg
+#define A__NAME__eq arm_instr_bics_reg__eq
+#define A__NAME__ne arm_instr_bics_reg__ne
+#define A__NAME__cs arm_instr_bics_reg__cs
+#define A__NAME__cc arm_instr_bics_reg__cc
+#define A__NAME__mi arm_instr_bics_reg__mi
+#define A__NAME__pl arm_instr_bics_reg__pl
+#define A__NAME__vs arm_instr_bics_reg__vs
+#define A__NAME__vc arm_instr_bics_reg__vc
+#define A__NAME__hi arm_instr_bics_reg__hi
+#define A__NAME__ls arm_instr_bics_reg__ls
+#define A__NAME__ge arm_instr_bics_reg__ge
+#define A__NAME__lt arm_instr_bics_reg__lt
+#define A__NAME__gt arm_instr_bics_reg__gt
+#define A__NAME__le arm_instr_bics_reg__le
+#define A__S
+#define A__REG
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvns_reg
+#define A__NAME__eq arm_instr_mvns_reg__eq
+#define A__NAME__ne arm_instr_mvns_reg__ne
+#define A__NAME__cs arm_instr_mvns_reg__cs
+#define A__NAME__cc arm_instr_mvns_reg__cc
+#define A__NAME__mi arm_instr_mvns_reg__mi
+#define A__NAME__pl arm_instr_mvns_reg__pl
+#define A__NAME__vs arm_instr_mvns_reg__vs
+#define A__NAME__vc arm_instr_mvns_reg__vc
+#define A__NAME__hi arm_instr_mvns_reg__hi
+#define A__NAME__ls arm_instr_mvns_reg__ls
+#define A__NAME__ge arm_instr_mvns_reg__ge
+#define A__NAME__lt arm_instr_mvns_reg__lt
+#define A__NAME__gt arm_instr_mvns_reg__gt
+#define A__NAME__le arm_instr_mvns_reg__le
+#define A__S
+#define A__REG
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__S
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_and_pc_reg
+#define A__NAME__eq arm_instr_and_pc_reg__eq
+#define A__NAME__ne arm_instr_and_pc_reg__ne
+#define A__NAME__cs arm_instr_and_pc_reg__cs
+#define A__NAME__cc arm_instr_and_pc_reg__cc
+#define A__NAME__mi arm_instr_and_pc_reg__mi
+#define A__NAME__pl arm_instr_and_pc_reg__pl
+#define A__NAME__vs arm_instr_and_pc_reg__vs
+#define A__NAME__vc arm_instr_and_pc_reg__vc
+#define A__NAME__hi arm_instr_and_pc_reg__hi
+#define A__NAME__ls arm_instr_and_pc_reg__ls
+#define A__NAME__ge arm_instr_and_pc_reg__ge
+#define A__NAME__lt arm_instr_and_pc_reg__lt
+#define A__NAME__gt arm_instr_and_pc_reg__gt
+#define A__NAME__le arm_instr_and_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eor_pc_reg
+#define A__NAME__eq arm_instr_eor_pc_reg__eq
+#define A__NAME__ne arm_instr_eor_pc_reg__ne
+#define A__NAME__cs arm_instr_eor_pc_reg__cs
+#define A__NAME__cc arm_instr_eor_pc_reg__cc
+#define A__NAME__mi arm_instr_eor_pc_reg__mi
+#define A__NAME__pl arm_instr_eor_pc_reg__pl
+#define A__NAME__vs arm_instr_eor_pc_reg__vs
+#define A__NAME__vc arm_instr_eor_pc_reg__vc
+#define A__NAME__hi arm_instr_eor_pc_reg__hi
+#define A__NAME__ls arm_instr_eor_pc_reg__ls
+#define A__NAME__ge arm_instr_eor_pc_reg__ge
+#define A__NAME__lt arm_instr_eor_pc_reg__lt
+#define A__NAME__gt arm_instr_eor_pc_reg__gt
+#define A__NAME__le arm_instr_eor_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sub_pc_reg
+#define A__NAME__eq arm_instr_sub_pc_reg__eq
+#define A__NAME__ne arm_instr_sub_pc_reg__ne
+#define A__NAME__cs arm_instr_sub_pc_reg__cs
+#define A__NAME__cc arm_instr_sub_pc_reg__cc
+#define A__NAME__mi arm_instr_sub_pc_reg__mi
+#define A__NAME__pl arm_instr_sub_pc_reg__pl
+#define A__NAME__vs arm_instr_sub_pc_reg__vs
+#define A__NAME__vc arm_instr_sub_pc_reg__vc
+#define A__NAME__hi arm_instr_sub_pc_reg__hi
+#define A__NAME__ls arm_instr_sub_pc_reg__ls
+#define A__NAME__ge arm_instr_sub_pc_reg__ge
+#define A__NAME__lt arm_instr_sub_pc_reg__lt
+#define A__NAME__gt arm_instr_sub_pc_reg__gt
+#define A__NAME__le arm_instr_sub_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsb_pc_reg
+#define A__NAME__eq arm_instr_rsb_pc_reg__eq
+#define A__NAME__ne arm_instr_rsb_pc_reg__ne
+#define A__NAME__cs arm_instr_rsb_pc_reg__cs
+#define A__NAME__cc arm_instr_rsb_pc_reg__cc
+#define A__NAME__mi arm_instr_rsb_pc_reg__mi
+#define A__NAME__pl arm_instr_rsb_pc_reg__pl
+#define A__NAME__vs arm_instr_rsb_pc_reg__vs
+#define A__NAME__vc arm_instr_rsb_pc_reg__vc
+#define A__NAME__hi arm_instr_rsb_pc_reg__hi
+#define A__NAME__ls arm_instr_rsb_pc_reg__ls
+#define A__NAME__ge arm_instr_rsb_pc_reg__ge
+#define A__NAME__lt arm_instr_rsb_pc_reg__lt
+#define A__NAME__gt arm_instr_rsb_pc_reg__gt
+#define A__NAME__le arm_instr_rsb_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_add_pc_reg
+#define A__NAME__eq arm_instr_add_pc_reg__eq
+#define A__NAME__ne arm_instr_add_pc_reg__ne
+#define A__NAME__cs arm_instr_add_pc_reg__cs
+#define A__NAME__cc arm_instr_add_pc_reg__cc
+#define A__NAME__mi arm_instr_add_pc_reg__mi
+#define A__NAME__pl arm_instr_add_pc_reg__pl
+#define A__NAME__vs arm_instr_add_pc_reg__vs
+#define A__NAME__vc arm_instr_add_pc_reg__vc
+#define A__NAME__hi arm_instr_add_pc_reg__hi
+#define A__NAME__ls arm_instr_add_pc_reg__ls
+#define A__NAME__ge arm_instr_add_pc_reg__ge
+#define A__NAME__lt arm_instr_add_pc_reg__lt
+#define A__NAME__gt arm_instr_add_pc_reg__gt
+#define A__NAME__le arm_instr_add_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adc_pc_reg
+#define A__NAME__eq arm_instr_adc_pc_reg__eq
+#define A__NAME__ne arm_instr_adc_pc_reg__ne
+#define A__NAME__cs arm_instr_adc_pc_reg__cs
+#define A__NAME__cc arm_instr_adc_pc_reg__cc
+#define A__NAME__mi arm_instr_adc_pc_reg__mi
+#define A__NAME__pl arm_instr_adc_pc_reg__pl
+#define A__NAME__vs arm_instr_adc_pc_reg__vs
+#define A__NAME__vc arm_instr_adc_pc_reg__vc
+#define A__NAME__hi arm_instr_adc_pc_reg__hi
+#define A__NAME__ls arm_instr_adc_pc_reg__ls
+#define A__NAME__ge arm_instr_adc_pc_reg__ge
+#define A__NAME__lt arm_instr_adc_pc_reg__lt
+#define A__NAME__gt arm_instr_adc_pc_reg__gt
+#define A__NAME__le arm_instr_adc_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbc_pc_reg
+#define A__NAME__eq arm_instr_sbc_pc_reg__eq
+#define A__NAME__ne arm_instr_sbc_pc_reg__ne
+#define A__NAME__cs arm_instr_sbc_pc_reg__cs
+#define A__NAME__cc arm_instr_sbc_pc_reg__cc
+#define A__NAME__mi arm_instr_sbc_pc_reg__mi
+#define A__NAME__pl arm_instr_sbc_pc_reg__pl
+#define A__NAME__vs arm_instr_sbc_pc_reg__vs
+#define A__NAME__vc arm_instr_sbc_pc_reg__vc
+#define A__NAME__hi arm_instr_sbc_pc_reg__hi
+#define A__NAME__ls arm_instr_sbc_pc_reg__ls
+#define A__NAME__ge arm_instr_sbc_pc_reg__ge
+#define A__NAME__lt arm_instr_sbc_pc_reg__lt
+#define A__NAME__gt arm_instr_sbc_pc_reg__gt
+#define A__NAME__le arm_instr_sbc_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsc_pc_reg
+#define A__NAME__eq arm_instr_rsc_pc_reg__eq
+#define A__NAME__ne arm_instr_rsc_pc_reg__ne
+#define A__NAME__cs arm_instr_rsc_pc_reg__cs
+#define A__NAME__cc arm_instr_rsc_pc_reg__cc
+#define A__NAME__mi arm_instr_rsc_pc_reg__mi
+#define A__NAME__pl arm_instr_rsc_pc_reg__pl
+#define A__NAME__vs arm_instr_rsc_pc_reg__vs
+#define A__NAME__vc arm_instr_rsc_pc_reg__vc
+#define A__NAME__hi arm_instr_rsc_pc_reg__hi
+#define A__NAME__ls arm_instr_rsc_pc_reg__ls
+#define A__NAME__ge arm_instr_rsc_pc_reg__ge
+#define A__NAME__lt arm_instr_rsc_pc_reg__lt
+#define A__NAME__gt arm_instr_rsc_pc_reg__gt
+#define A__NAME__le arm_instr_rsc_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orr_pc_reg
+#define A__NAME__eq arm_instr_orr_pc_reg__eq
+#define A__NAME__ne arm_instr_orr_pc_reg__ne
+#define A__NAME__cs arm_instr_orr_pc_reg__cs
+#define A__NAME__cc arm_instr_orr_pc_reg__cc
+#define A__NAME__mi arm_instr_orr_pc_reg__mi
+#define A__NAME__pl arm_instr_orr_pc_reg__pl
+#define A__NAME__vs arm_instr_orr_pc_reg__vs
+#define A__NAME__vc arm_instr_orr_pc_reg__vc
+#define A__NAME__hi arm_instr_orr_pc_reg__hi
+#define A__NAME__ls arm_instr_orr_pc_reg__ls
+#define A__NAME__ge arm_instr_orr_pc_reg__ge
+#define A__NAME__lt arm_instr_orr_pc_reg__lt
+#define A__NAME__gt arm_instr_orr_pc_reg__gt
+#define A__NAME__le arm_instr_orr_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mov_pc_reg
+#define A__NAME__eq arm_instr_mov_pc_reg__eq
+#define A__NAME__ne arm_instr_mov_pc_reg__ne
+#define A__NAME__cs arm_instr_mov_pc_reg__cs
+#define A__NAME__cc arm_instr_mov_pc_reg__cc
+#define A__NAME__mi arm_instr_mov_pc_reg__mi
+#define A__NAME__pl arm_instr_mov_pc_reg__pl
+#define A__NAME__vs arm_instr_mov_pc_reg__vs
+#define A__NAME__vc arm_instr_mov_pc_reg__vc
+#define A__NAME__hi arm_instr_mov_pc_reg__hi
+#define A__NAME__ls arm_instr_mov_pc_reg__ls
+#define A__NAME__ge arm_instr_mov_pc_reg__ge
+#define A__NAME__lt arm_instr_mov_pc_reg__lt
+#define A__NAME__gt arm_instr_mov_pc_reg__gt
+#define A__NAME__le arm_instr_mov_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bic_pc_reg
+#define A__NAME__eq arm_instr_bic_pc_reg__eq
+#define A__NAME__ne arm_instr_bic_pc_reg__ne
+#define A__NAME__cs arm_instr_bic_pc_reg__cs
+#define A__NAME__cc arm_instr_bic_pc_reg__cc
+#define A__NAME__mi arm_instr_bic_pc_reg__mi
+#define A__NAME__pl arm_instr_bic_pc_reg__pl
+#define A__NAME__vs arm_instr_bic_pc_reg__vs
+#define A__NAME__vc arm_instr_bic_pc_reg__vc
+#define A__NAME__hi arm_instr_bic_pc_reg__hi
+#define A__NAME__ls arm_instr_bic_pc_reg__ls
+#define A__NAME__ge arm_instr_bic_pc_reg__ge
+#define A__NAME__lt arm_instr_bic_pc_reg__lt
+#define A__NAME__gt arm_instr_bic_pc_reg__gt
+#define A__NAME__le arm_instr_bic_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvn_pc_reg
+#define A__NAME__eq arm_instr_mvn_pc_reg__eq
+#define A__NAME__ne arm_instr_mvn_pc_reg__ne
+#define A__NAME__cs arm_instr_mvn_pc_reg__cs
+#define A__NAME__cc arm_instr_mvn_pc_reg__cc
+#define A__NAME__mi arm_instr_mvn_pc_reg__mi
+#define A__NAME__pl arm_instr_mvn_pc_reg__pl
+#define A__NAME__vs arm_instr_mvn_pc_reg__vs
+#define A__NAME__vc arm_instr_mvn_pc_reg__vc
+#define A__NAME__hi arm_instr_mvn_pc_reg__hi
+#define A__NAME__ls arm_instr_mvn_pc_reg__ls
+#define A__NAME__ge arm_instr_mvn_pc_reg__ge
+#define A__NAME__lt arm_instr_mvn_pc_reg__lt
+#define A__NAME__gt arm_instr_mvn_pc_reg__gt
+#define A__NAME__le arm_instr_mvn_pc_reg__le
+#define A__REG
+#define A__PC
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_ands_pc_reg
+#define A__NAME__eq arm_instr_ands_pc_reg__eq
+#define A__NAME__ne arm_instr_ands_pc_reg__ne
+#define A__NAME__cs arm_instr_ands_pc_reg__cs
+#define A__NAME__cc arm_instr_ands_pc_reg__cc
+#define A__NAME__mi arm_instr_ands_pc_reg__mi
+#define A__NAME__pl arm_instr_ands_pc_reg__pl
+#define A__NAME__vs arm_instr_ands_pc_reg__vs
+#define A__NAME__vc arm_instr_ands_pc_reg__vc
+#define A__NAME__hi arm_instr_ands_pc_reg__hi
+#define A__NAME__ls arm_instr_ands_pc_reg__ls
+#define A__NAME__ge arm_instr_ands_pc_reg__ge
+#define A__NAME__lt arm_instr_ands_pc_reg__lt
+#define A__NAME__gt arm_instr_ands_pc_reg__gt
+#define A__NAME__le arm_instr_ands_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eors_pc_reg
+#define A__NAME__eq arm_instr_eors_pc_reg__eq
+#define A__NAME__ne arm_instr_eors_pc_reg__ne
+#define A__NAME__cs arm_instr_eors_pc_reg__cs
+#define A__NAME__cc arm_instr_eors_pc_reg__cc
+#define A__NAME__mi arm_instr_eors_pc_reg__mi
+#define A__NAME__pl arm_instr_eors_pc_reg__pl
+#define A__NAME__vs arm_instr_eors_pc_reg__vs
+#define A__NAME__vc arm_instr_eors_pc_reg__vc
+#define A__NAME__hi arm_instr_eors_pc_reg__hi
+#define A__NAME__ls arm_instr_eors_pc_reg__ls
+#define A__NAME__ge arm_instr_eors_pc_reg__ge
+#define A__NAME__lt arm_instr_eors_pc_reg__lt
+#define A__NAME__gt arm_instr_eors_pc_reg__gt
+#define A__NAME__le arm_instr_eors_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_subs_pc_reg
+#define A__NAME__eq arm_instr_subs_pc_reg__eq
+#define A__NAME__ne arm_instr_subs_pc_reg__ne
+#define A__NAME__cs arm_instr_subs_pc_reg__cs
+#define A__NAME__cc arm_instr_subs_pc_reg__cc
+#define A__NAME__mi arm_instr_subs_pc_reg__mi
+#define A__NAME__pl arm_instr_subs_pc_reg__pl
+#define A__NAME__vs arm_instr_subs_pc_reg__vs
+#define A__NAME__vc arm_instr_subs_pc_reg__vc
+#define A__NAME__hi arm_instr_subs_pc_reg__hi
+#define A__NAME__ls arm_instr_subs_pc_reg__ls
+#define A__NAME__ge arm_instr_subs_pc_reg__ge
+#define A__NAME__lt arm_instr_subs_pc_reg__lt
+#define A__NAME__gt arm_instr_subs_pc_reg__gt
+#define A__NAME__le arm_instr_subs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsbs_pc_reg
+#define A__NAME__eq arm_instr_rsbs_pc_reg__eq
+#define A__NAME__ne arm_instr_rsbs_pc_reg__ne
+#define A__NAME__cs arm_instr_rsbs_pc_reg__cs
+#define A__NAME__cc arm_instr_rsbs_pc_reg__cc
+#define A__NAME__mi arm_instr_rsbs_pc_reg__mi
+#define A__NAME__pl arm_instr_rsbs_pc_reg__pl
+#define A__NAME__vs arm_instr_rsbs_pc_reg__vs
+#define A__NAME__vc arm_instr_rsbs_pc_reg__vc
+#define A__NAME__hi arm_instr_rsbs_pc_reg__hi
+#define A__NAME__ls arm_instr_rsbs_pc_reg__ls
+#define A__NAME__ge arm_instr_rsbs_pc_reg__ge
+#define A__NAME__lt arm_instr_rsbs_pc_reg__lt
+#define A__NAME__gt arm_instr_rsbs_pc_reg__gt
+#define A__NAME__le arm_instr_rsbs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adds_pc_reg
+#define A__NAME__eq arm_instr_adds_pc_reg__eq
+#define A__NAME__ne arm_instr_adds_pc_reg__ne
+#define A__NAME__cs arm_instr_adds_pc_reg__cs
+#define A__NAME__cc arm_instr_adds_pc_reg__cc
+#define A__NAME__mi arm_instr_adds_pc_reg__mi
+#define A__NAME__pl arm_instr_adds_pc_reg__pl
+#define A__NAME__vs arm_instr_adds_pc_reg__vs
+#define A__NAME__vc arm_instr_adds_pc_reg__vc
+#define A__NAME__hi arm_instr_adds_pc_reg__hi
+#define A__NAME__ls arm_instr_adds_pc_reg__ls
+#define A__NAME__ge arm_instr_adds_pc_reg__ge
+#define A__NAME__lt arm_instr_adds_pc_reg__lt
+#define A__NAME__gt arm_instr_adds_pc_reg__gt
+#define A__NAME__le arm_instr_adds_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adcs_pc_reg
+#define A__NAME__eq arm_instr_adcs_pc_reg__eq
+#define A__NAME__ne arm_instr_adcs_pc_reg__ne
+#define A__NAME__cs arm_instr_adcs_pc_reg__cs
+#define A__NAME__cc arm_instr_adcs_pc_reg__cc
+#define A__NAME__mi arm_instr_adcs_pc_reg__mi
+#define A__NAME__pl arm_instr_adcs_pc_reg__pl
+#define A__NAME__vs arm_instr_adcs_pc_reg__vs
+#define A__NAME__vc arm_instr_adcs_pc_reg__vc
+#define A__NAME__hi arm_instr_adcs_pc_reg__hi
+#define A__NAME__ls arm_instr_adcs_pc_reg__ls
+#define A__NAME__ge arm_instr_adcs_pc_reg__ge
+#define A__NAME__lt arm_instr_adcs_pc_reg__lt
+#define A__NAME__gt arm_instr_adcs_pc_reg__gt
+#define A__NAME__le arm_instr_adcs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbcs_pc_reg
+#define A__NAME__eq arm_instr_sbcs_pc_reg__eq
+#define A__NAME__ne arm_instr_sbcs_pc_reg__ne
+#define A__NAME__cs arm_instr_sbcs_pc_reg__cs
+#define A__NAME__cc arm_instr_sbcs_pc_reg__cc
+#define A__NAME__mi arm_instr_sbcs_pc_reg__mi
+#define A__NAME__pl arm_instr_sbcs_pc_reg__pl
+#define A__NAME__vs arm_instr_sbcs_pc_reg__vs
+#define A__NAME__vc arm_instr_sbcs_pc_reg__vc
+#define A__NAME__hi arm_instr_sbcs_pc_reg__hi
+#define A__NAME__ls arm_instr_sbcs_pc_reg__ls
+#define A__NAME__ge arm_instr_sbcs_pc_reg__ge
+#define A__NAME__lt arm_instr_sbcs_pc_reg__lt
+#define A__NAME__gt arm_instr_sbcs_pc_reg__gt
+#define A__NAME__le arm_instr_sbcs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rscs_pc_reg
+#define A__NAME__eq arm_instr_rscs_pc_reg__eq
+#define A__NAME__ne arm_instr_rscs_pc_reg__ne
+#define A__NAME__cs arm_instr_rscs_pc_reg__cs
+#define A__NAME__cc arm_instr_rscs_pc_reg__cc
+#define A__NAME__mi arm_instr_rscs_pc_reg__mi
+#define A__NAME__pl arm_instr_rscs_pc_reg__pl
+#define A__NAME__vs arm_instr_rscs_pc_reg__vs
+#define A__NAME__vc arm_instr_rscs_pc_reg__vc
+#define A__NAME__hi arm_instr_rscs_pc_reg__hi
+#define A__NAME__ls arm_instr_rscs_pc_reg__ls
+#define A__NAME__ge arm_instr_rscs_pc_reg__ge
+#define A__NAME__lt arm_instr_rscs_pc_reg__lt
+#define A__NAME__gt arm_instr_rscs_pc_reg__gt
+#define A__NAME__le arm_instr_rscs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_tsts_pc_reg
+#define A__NAME__eq arm_instr_tsts_pc_reg__eq
+#define A__NAME__ne arm_instr_tsts_pc_reg__ne
+#define A__NAME__cs arm_instr_tsts_pc_reg__cs
+#define A__NAME__cc arm_instr_tsts_pc_reg__cc
+#define A__NAME__mi arm_instr_tsts_pc_reg__mi
+#define A__NAME__pl arm_instr_tsts_pc_reg__pl
+#define A__NAME__vs arm_instr_tsts_pc_reg__vs
+#define A__NAME__vc arm_instr_tsts_pc_reg__vc
+#define A__NAME__hi arm_instr_tsts_pc_reg__hi
+#define A__NAME__ls arm_instr_tsts_pc_reg__ls
+#define A__NAME__ge arm_instr_tsts_pc_reg__ge
+#define A__NAME__lt arm_instr_tsts_pc_reg__lt
+#define A__NAME__gt arm_instr_tsts_pc_reg__gt
+#define A__NAME__le arm_instr_tsts_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__TST
+#include "cpu_arm_instr_dpi.c"
+#undef A__TST
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_teqs_pc_reg
+#define A__NAME__eq arm_instr_teqs_pc_reg__eq
+#define A__NAME__ne arm_instr_teqs_pc_reg__ne
+#define A__NAME__cs arm_instr_teqs_pc_reg__cs
+#define A__NAME__cc arm_instr_teqs_pc_reg__cc
+#define A__NAME__mi arm_instr_teqs_pc_reg__mi
+#define A__NAME__pl arm_instr_teqs_pc_reg__pl
+#define A__NAME__vs arm_instr_teqs_pc_reg__vs
+#define A__NAME__vc arm_instr_teqs_pc_reg__vc
+#define A__NAME__hi arm_instr_teqs_pc_reg__hi
+#define A__NAME__ls arm_instr_teqs_pc_reg__ls
+#define A__NAME__ge arm_instr_teqs_pc_reg__ge
+#define A__NAME__lt arm_instr_teqs_pc_reg__lt
+#define A__NAME__gt arm_instr_teqs_pc_reg__gt
+#define A__NAME__le arm_instr_teqs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__TEQ
+#include "cpu_arm_instr_dpi.c"
+#undef A__TEQ
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmps_pc_reg
+#define A__NAME__eq arm_instr_cmps_pc_reg__eq
+#define A__NAME__ne arm_instr_cmps_pc_reg__ne
+#define A__NAME__cs arm_instr_cmps_pc_reg__cs
+#define A__NAME__cc arm_instr_cmps_pc_reg__cc
+#define A__NAME__mi arm_instr_cmps_pc_reg__mi
+#define A__NAME__pl arm_instr_cmps_pc_reg__pl
+#define A__NAME__vs arm_instr_cmps_pc_reg__vs
+#define A__NAME__vc arm_instr_cmps_pc_reg__vc
+#define A__NAME__hi arm_instr_cmps_pc_reg__hi
+#define A__NAME__ls arm_instr_cmps_pc_reg__ls
+#define A__NAME__ge arm_instr_cmps_pc_reg__ge
+#define A__NAME__lt arm_instr_cmps_pc_reg__lt
+#define A__NAME__gt arm_instr_cmps_pc_reg__gt
+#define A__NAME__le arm_instr_cmps_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__CMP
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMP
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmns_pc_reg
+#define A__NAME__eq arm_instr_cmns_pc_reg__eq
+#define A__NAME__ne arm_instr_cmns_pc_reg__ne
+#define A__NAME__cs arm_instr_cmns_pc_reg__cs
+#define A__NAME__cc arm_instr_cmns_pc_reg__cc
+#define A__NAME__mi arm_instr_cmns_pc_reg__mi
+#define A__NAME__pl arm_instr_cmns_pc_reg__pl
+#define A__NAME__vs arm_instr_cmns_pc_reg__vs
+#define A__NAME__vc arm_instr_cmns_pc_reg__vc
+#define A__NAME__hi arm_instr_cmns_pc_reg__hi
+#define A__NAME__ls arm_instr_cmns_pc_reg__ls
+#define A__NAME__ge arm_instr_cmns_pc_reg__ge
+#define A__NAME__lt arm_instr_cmns_pc_reg__lt
+#define A__NAME__gt arm_instr_cmns_pc_reg__gt
+#define A__NAME__le arm_instr_cmns_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__CMN
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMN
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orrs_pc_reg
+#define A__NAME__eq arm_instr_orrs_pc_reg__eq
+#define A__NAME__ne arm_instr_orrs_pc_reg__ne
+#define A__NAME__cs arm_instr_orrs_pc_reg__cs
+#define A__NAME__cc arm_instr_orrs_pc_reg__cc
+#define A__NAME__mi arm_instr_orrs_pc_reg__mi
+#define A__NAME__pl arm_instr_orrs_pc_reg__pl
+#define A__NAME__vs arm_instr_orrs_pc_reg__vs
+#define A__NAME__vc arm_instr_orrs_pc_reg__vc
+#define A__NAME__hi arm_instr_orrs_pc_reg__hi
+#define A__NAME__ls arm_instr_orrs_pc_reg__ls
+#define A__NAME__ge arm_instr_orrs_pc_reg__ge
+#define A__NAME__lt arm_instr_orrs_pc_reg__lt
+#define A__NAME__gt arm_instr_orrs_pc_reg__gt
+#define A__NAME__le arm_instr_orrs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_movs_pc_reg
+#define A__NAME__eq arm_instr_movs_pc_reg__eq
+#define A__NAME__ne arm_instr_movs_pc_reg__ne
+#define A__NAME__cs arm_instr_movs_pc_reg__cs
+#define A__NAME__cc arm_instr_movs_pc_reg__cc
+#define A__NAME__mi arm_instr_movs_pc_reg__mi
+#define A__NAME__pl arm_instr_movs_pc_reg__pl
+#define A__NAME__vs arm_instr_movs_pc_reg__vs
+#define A__NAME__vc arm_instr_movs_pc_reg__vc
+#define A__NAME__hi arm_instr_movs_pc_reg__hi
+#define A__NAME__ls arm_instr_movs_pc_reg__ls
+#define A__NAME__ge arm_instr_movs_pc_reg__ge
+#define A__NAME__lt arm_instr_movs_pc_reg__lt
+#define A__NAME__gt arm_instr_movs_pc_reg__gt
+#define A__NAME__le arm_instr_movs_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bics_pc_reg
+#define A__NAME__eq arm_instr_bics_pc_reg__eq
+#define A__NAME__ne arm_instr_bics_pc_reg__ne
+#define A__NAME__cs arm_instr_bics_pc_reg__cs
+#define A__NAME__cc arm_instr_bics_pc_reg__cc
+#define A__NAME__mi arm_instr_bics_pc_reg__mi
+#define A__NAME__pl arm_instr_bics_pc_reg__pl
+#define A__NAME__vs arm_instr_bics_pc_reg__vs
+#define A__NAME__vc arm_instr_bics_pc_reg__vc
+#define A__NAME__hi arm_instr_bics_pc_reg__hi
+#define A__NAME__ls arm_instr_bics_pc_reg__ls
+#define A__NAME__ge arm_instr_bics_pc_reg__ge
+#define A__NAME__lt arm_instr_bics_pc_reg__lt
+#define A__NAME__gt arm_instr_bics_pc_reg__gt
+#define A__NAME__le arm_instr_bics_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvns_pc_reg
+#define A__NAME__eq arm_instr_mvns_pc_reg__eq
+#define A__NAME__ne arm_instr_mvns_pc_reg__ne
+#define A__NAME__cs arm_instr_mvns_pc_reg__cs
+#define A__NAME__cc arm_instr_mvns_pc_reg__cc
+#define A__NAME__mi arm_instr_mvns_pc_reg__mi
+#define A__NAME__pl arm_instr_mvns_pc_reg__pl
+#define A__NAME__vs arm_instr_mvns_pc_reg__vs
+#define A__NAME__vc arm_instr_mvns_pc_reg__vc
+#define A__NAME__hi arm_instr_mvns_pc_reg__hi
+#define A__NAME__ls arm_instr_mvns_pc_reg__ls
+#define A__NAME__ge arm_instr_mvns_pc_reg__ge
+#define A__NAME__lt arm_instr_mvns_pc_reg__lt
+#define A__NAME__gt arm_instr_mvns_pc_reg__gt
+#define A__NAME__le arm_instr_mvns_pc_reg__le
+#define A__S
+#define A__REG
+#define A__PC
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__S
+#undef A__REG
+#undef A__PC
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_and_regshort
+#define A__NAME__eq arm_instr_and_regshort__eq
+#define A__NAME__ne arm_instr_and_regshort__ne
+#define A__NAME__cs arm_instr_and_regshort__cs
+#define A__NAME__cc arm_instr_and_regshort__cc
+#define A__NAME__mi arm_instr_and_regshort__mi
+#define A__NAME__pl arm_instr_and_regshort__pl
+#define A__NAME__vs arm_instr_and_regshort__vs
+#define A__NAME__vc arm_instr_and_regshort__vc
+#define A__NAME__hi arm_instr_and_regshort__hi
+#define A__NAME__ls arm_instr_and_regshort__ls
+#define A__NAME__ge arm_instr_and_regshort__ge
+#define A__NAME__lt arm_instr_and_regshort__lt
+#define A__NAME__gt arm_instr_and_regshort__gt
+#define A__NAME__le arm_instr_and_regshort__le
+#define A__REGSHORT
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eor_regshort
+#define A__NAME__eq arm_instr_eor_regshort__eq
+#define A__NAME__ne arm_instr_eor_regshort__ne
+#define A__NAME__cs arm_instr_eor_regshort__cs
+#define A__NAME__cc arm_instr_eor_regshort__cc
+#define A__NAME__mi arm_instr_eor_regshort__mi
+#define A__NAME__pl arm_instr_eor_regshort__pl
+#define A__NAME__vs arm_instr_eor_regshort__vs
+#define A__NAME__vc arm_instr_eor_regshort__vc
+#define A__NAME__hi arm_instr_eor_regshort__hi
+#define A__NAME__ls arm_instr_eor_regshort__ls
+#define A__NAME__ge arm_instr_eor_regshort__ge
+#define A__NAME__lt arm_instr_eor_regshort__lt
+#define A__NAME__gt arm_instr_eor_regshort__gt
+#define A__NAME__le arm_instr_eor_regshort__le
+#define A__REGSHORT
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sub_regshort
+#define A__NAME__eq arm_instr_sub_regshort__eq
+#define A__NAME__ne arm_instr_sub_regshort__ne
+#define A__NAME__cs arm_instr_sub_regshort__cs
+#define A__NAME__cc arm_instr_sub_regshort__cc
+#define A__NAME__mi arm_instr_sub_regshort__mi
+#define A__NAME__pl arm_instr_sub_regshort__pl
+#define A__NAME__vs arm_instr_sub_regshort__vs
+#define A__NAME__vc arm_instr_sub_regshort__vc
+#define A__NAME__hi arm_instr_sub_regshort__hi
+#define A__NAME__ls arm_instr_sub_regshort__ls
+#define A__NAME__ge arm_instr_sub_regshort__ge
+#define A__NAME__lt arm_instr_sub_regshort__lt
+#define A__NAME__gt arm_instr_sub_regshort__gt
+#define A__NAME__le arm_instr_sub_regshort__le
+#define A__REGSHORT
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsb_regshort
+#define A__NAME__eq arm_instr_rsb_regshort__eq
+#define A__NAME__ne arm_instr_rsb_regshort__ne
+#define A__NAME__cs arm_instr_rsb_regshort__cs
+#define A__NAME__cc arm_instr_rsb_regshort__cc
+#define A__NAME__mi arm_instr_rsb_regshort__mi
+#define A__NAME__pl arm_instr_rsb_regshort__pl
+#define A__NAME__vs arm_instr_rsb_regshort__vs
+#define A__NAME__vc arm_instr_rsb_regshort__vc
+#define A__NAME__hi arm_instr_rsb_regshort__hi
+#define A__NAME__ls arm_instr_rsb_regshort__ls
+#define A__NAME__ge arm_instr_rsb_regshort__ge
+#define A__NAME__lt arm_instr_rsb_regshort__lt
+#define A__NAME__gt arm_instr_rsb_regshort__gt
+#define A__NAME__le arm_instr_rsb_regshort__le
+#define A__REGSHORT
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_add_regshort
+#define A__NAME__eq arm_instr_add_regshort__eq
+#define A__NAME__ne arm_instr_add_regshort__ne
+#define A__NAME__cs arm_instr_add_regshort__cs
+#define A__NAME__cc arm_instr_add_regshort__cc
+#define A__NAME__mi arm_instr_add_regshort__mi
+#define A__NAME__pl arm_instr_add_regshort__pl
+#define A__NAME__vs arm_instr_add_regshort__vs
+#define A__NAME__vc arm_instr_add_regshort__vc
+#define A__NAME__hi arm_instr_add_regshort__hi
+#define A__NAME__ls arm_instr_add_regshort__ls
+#define A__NAME__ge arm_instr_add_regshort__ge
+#define A__NAME__lt arm_instr_add_regshort__lt
+#define A__NAME__gt arm_instr_add_regshort__gt
+#define A__NAME__le arm_instr_add_regshort__le
+#define A__REGSHORT
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adc_regshort
+#define A__NAME__eq arm_instr_adc_regshort__eq
+#define A__NAME__ne arm_instr_adc_regshort__ne
+#define A__NAME__cs arm_instr_adc_regshort__cs
+#define A__NAME__cc arm_instr_adc_regshort__cc
+#define A__NAME__mi arm_instr_adc_regshort__mi
+#define A__NAME__pl arm_instr_adc_regshort__pl
+#define A__NAME__vs arm_instr_adc_regshort__vs
+#define A__NAME__vc arm_instr_adc_regshort__vc
+#define A__NAME__hi arm_instr_adc_regshort__hi
+#define A__NAME__ls arm_instr_adc_regshort__ls
+#define A__NAME__ge arm_instr_adc_regshort__ge
+#define A__NAME__lt arm_instr_adc_regshort__lt
+#define A__NAME__gt arm_instr_adc_regshort__gt
+#define A__NAME__le arm_instr_adc_regshort__le
+#define A__REGSHORT
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbc_regshort
+#define A__NAME__eq arm_instr_sbc_regshort__eq
+#define A__NAME__ne arm_instr_sbc_regshort__ne
+#define A__NAME__cs arm_instr_sbc_regshort__cs
+#define A__NAME__cc arm_instr_sbc_regshort__cc
+#define A__NAME__mi arm_instr_sbc_regshort__mi
+#define A__NAME__pl arm_instr_sbc_regshort__pl
+#define A__NAME__vs arm_instr_sbc_regshort__vs
+#define A__NAME__vc arm_instr_sbc_regshort__vc
+#define A__NAME__hi arm_instr_sbc_regshort__hi
+#define A__NAME__ls arm_instr_sbc_regshort__ls
+#define A__NAME__ge arm_instr_sbc_regshort__ge
+#define A__NAME__lt arm_instr_sbc_regshort__lt
+#define A__NAME__gt arm_instr_sbc_regshort__gt
+#define A__NAME__le arm_instr_sbc_regshort__le
+#define A__REGSHORT
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsc_regshort
+#define A__NAME__eq arm_instr_rsc_regshort__eq
+#define A__NAME__ne arm_instr_rsc_regshort__ne
+#define A__NAME__cs arm_instr_rsc_regshort__cs
+#define A__NAME__cc arm_instr_rsc_regshort__cc
+#define A__NAME__mi arm_instr_rsc_regshort__mi
+#define A__NAME__pl arm_instr_rsc_regshort__pl
+#define A__NAME__vs arm_instr_rsc_regshort__vs
+#define A__NAME__vc arm_instr_rsc_regshort__vc
+#define A__NAME__hi arm_instr_rsc_regshort__hi
+#define A__NAME__ls arm_instr_rsc_regshort__ls
+#define A__NAME__ge arm_instr_rsc_regshort__ge
+#define A__NAME__lt arm_instr_rsc_regshort__lt
+#define A__NAME__gt arm_instr_rsc_regshort__gt
+#define A__NAME__le arm_instr_rsc_regshort__le
+#define A__REGSHORT
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orr_regshort
+#define A__NAME__eq arm_instr_orr_regshort__eq
+#define A__NAME__ne arm_instr_orr_regshort__ne
+#define A__NAME__cs arm_instr_orr_regshort__cs
+#define A__NAME__cc arm_instr_orr_regshort__cc
+#define A__NAME__mi arm_instr_orr_regshort__mi
+#define A__NAME__pl arm_instr_orr_regshort__pl
+#define A__NAME__vs arm_instr_orr_regshort__vs
+#define A__NAME__vc arm_instr_orr_regshort__vc
+#define A__NAME__hi arm_instr_orr_regshort__hi
+#define A__NAME__ls arm_instr_orr_regshort__ls
+#define A__NAME__ge arm_instr_orr_regshort__ge
+#define A__NAME__lt arm_instr_orr_regshort__lt
+#define A__NAME__gt arm_instr_orr_regshort__gt
+#define A__NAME__le arm_instr_orr_regshort__le
+#define A__REGSHORT
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mov_regshort
+#define A__NAME__eq arm_instr_mov_regshort__eq
+#define A__NAME__ne arm_instr_mov_regshort__ne
+#define A__NAME__cs arm_instr_mov_regshort__cs
+#define A__NAME__cc arm_instr_mov_regshort__cc
+#define A__NAME__mi arm_instr_mov_regshort__mi
+#define A__NAME__pl arm_instr_mov_regshort__pl
+#define A__NAME__vs arm_instr_mov_regshort__vs
+#define A__NAME__vc arm_instr_mov_regshort__vc
+#define A__NAME__hi arm_instr_mov_regshort__hi
+#define A__NAME__ls arm_instr_mov_regshort__ls
+#define A__NAME__ge arm_instr_mov_regshort__ge
+#define A__NAME__lt arm_instr_mov_regshort__lt
+#define A__NAME__gt arm_instr_mov_regshort__gt
+#define A__NAME__le arm_instr_mov_regshort__le
+#define A__REGSHORT
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bic_regshort
+#define A__NAME__eq arm_instr_bic_regshort__eq
+#define A__NAME__ne arm_instr_bic_regshort__ne
+#define A__NAME__cs arm_instr_bic_regshort__cs
+#define A__NAME__cc arm_instr_bic_regshort__cc
+#define A__NAME__mi arm_instr_bic_regshort__mi
+#define A__NAME__pl arm_instr_bic_regshort__pl
+#define A__NAME__vs arm_instr_bic_regshort__vs
+#define A__NAME__vc arm_instr_bic_regshort__vc
+#define A__NAME__hi arm_instr_bic_regshort__hi
+#define A__NAME__ls arm_instr_bic_regshort__ls
+#define A__NAME__ge arm_instr_bic_regshort__ge
+#define A__NAME__lt arm_instr_bic_regshort__lt
+#define A__NAME__gt arm_instr_bic_regshort__gt
+#define A__NAME__le arm_instr_bic_regshort__le
+#define A__REGSHORT
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvn_regshort
+#define A__NAME__eq arm_instr_mvn_regshort__eq
+#define A__NAME__ne arm_instr_mvn_regshort__ne
+#define A__NAME__cs arm_instr_mvn_regshort__cs
+#define A__NAME__cc arm_instr_mvn_regshort__cc
+#define A__NAME__mi arm_instr_mvn_regshort__mi
+#define A__NAME__pl arm_instr_mvn_regshort__pl
+#define A__NAME__vs arm_instr_mvn_regshort__vs
+#define A__NAME__vc arm_instr_mvn_regshort__vc
+#define A__NAME__hi arm_instr_mvn_regshort__hi
+#define A__NAME__ls arm_instr_mvn_regshort__ls
+#define A__NAME__ge arm_instr_mvn_regshort__ge
+#define A__NAME__lt arm_instr_mvn_regshort__lt
+#define A__NAME__gt arm_instr_mvn_regshort__gt
+#define A__NAME__le arm_instr_mvn_regshort__le
+#define A__REGSHORT
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_ands_regshort
+#define A__NAME__eq arm_instr_ands_regshort__eq
+#define A__NAME__ne arm_instr_ands_regshort__ne
+#define A__NAME__cs arm_instr_ands_regshort__cs
+#define A__NAME__cc arm_instr_ands_regshort__cc
+#define A__NAME__mi arm_instr_ands_regshort__mi
+#define A__NAME__pl arm_instr_ands_regshort__pl
+#define A__NAME__vs arm_instr_ands_regshort__vs
+#define A__NAME__vc arm_instr_ands_regshort__vc
+#define A__NAME__hi arm_instr_ands_regshort__hi
+#define A__NAME__ls arm_instr_ands_regshort__ls
+#define A__NAME__ge arm_instr_ands_regshort__ge
+#define A__NAME__lt arm_instr_ands_regshort__lt
+#define A__NAME__gt arm_instr_ands_regshort__gt
+#define A__NAME__le arm_instr_ands_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__AND
+#include "cpu_arm_instr_dpi.c"
+#undef A__AND
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_eors_regshort
+#define A__NAME__eq arm_instr_eors_regshort__eq
+#define A__NAME__ne arm_instr_eors_regshort__ne
+#define A__NAME__cs arm_instr_eors_regshort__cs
+#define A__NAME__cc arm_instr_eors_regshort__cc
+#define A__NAME__mi arm_instr_eors_regshort__mi
+#define A__NAME__pl arm_instr_eors_regshort__pl
+#define A__NAME__vs arm_instr_eors_regshort__vs
+#define A__NAME__vc arm_instr_eors_regshort__vc
+#define A__NAME__hi arm_instr_eors_regshort__hi
+#define A__NAME__ls arm_instr_eors_regshort__ls
+#define A__NAME__ge arm_instr_eors_regshort__ge
+#define A__NAME__lt arm_instr_eors_regshort__lt
+#define A__NAME__gt arm_instr_eors_regshort__gt
+#define A__NAME__le arm_instr_eors_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__EOR
+#include "cpu_arm_instr_dpi.c"
+#undef A__EOR
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_subs_regshort
+#define A__NAME__eq arm_instr_subs_regshort__eq
+#define A__NAME__ne arm_instr_subs_regshort__ne
+#define A__NAME__cs arm_instr_subs_regshort__cs
+#define A__NAME__cc arm_instr_subs_regshort__cc
+#define A__NAME__mi arm_instr_subs_regshort__mi
+#define A__NAME__pl arm_instr_subs_regshort__pl
+#define A__NAME__vs arm_instr_subs_regshort__vs
+#define A__NAME__vc arm_instr_subs_regshort__vc
+#define A__NAME__hi arm_instr_subs_regshort__hi
+#define A__NAME__ls arm_instr_subs_regshort__ls
+#define A__NAME__ge arm_instr_subs_regshort__ge
+#define A__NAME__lt arm_instr_subs_regshort__lt
+#define A__NAME__gt arm_instr_subs_regshort__gt
+#define A__NAME__le arm_instr_subs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__SUB
+#include "cpu_arm_instr_dpi.c"
+#undef A__SUB
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rsbs_regshort
+#define A__NAME__eq arm_instr_rsbs_regshort__eq
+#define A__NAME__ne arm_instr_rsbs_regshort__ne
+#define A__NAME__cs arm_instr_rsbs_regshort__cs
+#define A__NAME__cc arm_instr_rsbs_regshort__cc
+#define A__NAME__mi arm_instr_rsbs_regshort__mi
+#define A__NAME__pl arm_instr_rsbs_regshort__pl
+#define A__NAME__vs arm_instr_rsbs_regshort__vs
+#define A__NAME__vc arm_instr_rsbs_regshort__vc
+#define A__NAME__hi arm_instr_rsbs_regshort__hi
+#define A__NAME__ls arm_instr_rsbs_regshort__ls
+#define A__NAME__ge arm_instr_rsbs_regshort__ge
+#define A__NAME__lt arm_instr_rsbs_regshort__lt
+#define A__NAME__gt arm_instr_rsbs_regshort__gt
+#define A__NAME__le arm_instr_rsbs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__RSB
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSB
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adds_regshort
+#define A__NAME__eq arm_instr_adds_regshort__eq
+#define A__NAME__ne arm_instr_adds_regshort__ne
+#define A__NAME__cs arm_instr_adds_regshort__cs
+#define A__NAME__cc arm_instr_adds_regshort__cc
+#define A__NAME__mi arm_instr_adds_regshort__mi
+#define A__NAME__pl arm_instr_adds_regshort__pl
+#define A__NAME__vs arm_instr_adds_regshort__vs
+#define A__NAME__vc arm_instr_adds_regshort__vc
+#define A__NAME__hi arm_instr_adds_regshort__hi
+#define A__NAME__ls arm_instr_adds_regshort__ls
+#define A__NAME__ge arm_instr_adds_regshort__ge
+#define A__NAME__lt arm_instr_adds_regshort__lt
+#define A__NAME__gt arm_instr_adds_regshort__gt
+#define A__NAME__le arm_instr_adds_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__ADD
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADD
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_adcs_regshort
+#define A__NAME__eq arm_instr_adcs_regshort__eq
+#define A__NAME__ne arm_instr_adcs_regshort__ne
+#define A__NAME__cs arm_instr_adcs_regshort__cs
+#define A__NAME__cc arm_instr_adcs_regshort__cc
+#define A__NAME__mi arm_instr_adcs_regshort__mi
+#define A__NAME__pl arm_instr_adcs_regshort__pl
+#define A__NAME__vs arm_instr_adcs_regshort__vs
+#define A__NAME__vc arm_instr_adcs_regshort__vc
+#define A__NAME__hi arm_instr_adcs_regshort__hi
+#define A__NAME__ls arm_instr_adcs_regshort__ls
+#define A__NAME__ge arm_instr_adcs_regshort__ge
+#define A__NAME__lt arm_instr_adcs_regshort__lt
+#define A__NAME__gt arm_instr_adcs_regshort__gt
+#define A__NAME__le arm_instr_adcs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__ADC
+#include "cpu_arm_instr_dpi.c"
+#undef A__ADC
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_sbcs_regshort
+#define A__NAME__eq arm_instr_sbcs_regshort__eq
+#define A__NAME__ne arm_instr_sbcs_regshort__ne
+#define A__NAME__cs arm_instr_sbcs_regshort__cs
+#define A__NAME__cc arm_instr_sbcs_regshort__cc
+#define A__NAME__mi arm_instr_sbcs_regshort__mi
+#define A__NAME__pl arm_instr_sbcs_regshort__pl
+#define A__NAME__vs arm_instr_sbcs_regshort__vs
+#define A__NAME__vc arm_instr_sbcs_regshort__vc
+#define A__NAME__hi arm_instr_sbcs_regshort__hi
+#define A__NAME__ls arm_instr_sbcs_regshort__ls
+#define A__NAME__ge arm_instr_sbcs_regshort__ge
+#define A__NAME__lt arm_instr_sbcs_regshort__lt
+#define A__NAME__gt arm_instr_sbcs_regshort__gt
+#define A__NAME__le arm_instr_sbcs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__SBC
+#include "cpu_arm_instr_dpi.c"
+#undef A__SBC
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_rscs_regshort
+#define A__NAME__eq arm_instr_rscs_regshort__eq
+#define A__NAME__ne arm_instr_rscs_regshort__ne
+#define A__NAME__cs arm_instr_rscs_regshort__cs
+#define A__NAME__cc arm_instr_rscs_regshort__cc
+#define A__NAME__mi arm_instr_rscs_regshort__mi
+#define A__NAME__pl arm_instr_rscs_regshort__pl
+#define A__NAME__vs arm_instr_rscs_regshort__vs
+#define A__NAME__vc arm_instr_rscs_regshort__vc
+#define A__NAME__hi arm_instr_rscs_regshort__hi
+#define A__NAME__ls arm_instr_rscs_regshort__ls
+#define A__NAME__ge arm_instr_rscs_regshort__ge
+#define A__NAME__lt arm_instr_rscs_regshort__lt
+#define A__NAME__gt arm_instr_rscs_regshort__gt
+#define A__NAME__le arm_instr_rscs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__RSC
+#include "cpu_arm_instr_dpi.c"
+#undef A__RSC
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_tsts_regshort
+#define A__NAME__eq arm_instr_tsts_regshort__eq
+#define A__NAME__ne arm_instr_tsts_regshort__ne
+#define A__NAME__cs arm_instr_tsts_regshort__cs
+#define A__NAME__cc arm_instr_tsts_regshort__cc
+#define A__NAME__mi arm_instr_tsts_regshort__mi
+#define A__NAME__pl arm_instr_tsts_regshort__pl
+#define A__NAME__vs arm_instr_tsts_regshort__vs
+#define A__NAME__vc arm_instr_tsts_regshort__vc
+#define A__NAME__hi arm_instr_tsts_regshort__hi
+#define A__NAME__ls arm_instr_tsts_regshort__ls
+#define A__NAME__ge arm_instr_tsts_regshort__ge
+#define A__NAME__lt arm_instr_tsts_regshort__lt
+#define A__NAME__gt arm_instr_tsts_regshort__gt
+#define A__NAME__le arm_instr_tsts_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__TST
+#include "cpu_arm_instr_dpi.c"
+#undef A__TST
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_teqs_regshort
+#define A__NAME__eq arm_instr_teqs_regshort__eq
+#define A__NAME__ne arm_instr_teqs_regshort__ne
+#define A__NAME__cs arm_instr_teqs_regshort__cs
+#define A__NAME__cc arm_instr_teqs_regshort__cc
+#define A__NAME__mi arm_instr_teqs_regshort__mi
+#define A__NAME__pl arm_instr_teqs_regshort__pl
+#define A__NAME__vs arm_instr_teqs_regshort__vs
+#define A__NAME__vc arm_instr_teqs_regshort__vc
+#define A__NAME__hi arm_instr_teqs_regshort__hi
+#define A__NAME__ls arm_instr_teqs_regshort__ls
+#define A__NAME__ge arm_instr_teqs_regshort__ge
+#define A__NAME__lt arm_instr_teqs_regshort__lt
+#define A__NAME__gt arm_instr_teqs_regshort__gt
+#define A__NAME__le arm_instr_teqs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__TEQ
+#include "cpu_arm_instr_dpi.c"
+#undef A__TEQ
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmps_regshort
+#define A__NAME__eq arm_instr_cmps_regshort__eq
+#define A__NAME__ne arm_instr_cmps_regshort__ne
+#define A__NAME__cs arm_instr_cmps_regshort__cs
+#define A__NAME__cc arm_instr_cmps_regshort__cc
+#define A__NAME__mi arm_instr_cmps_regshort__mi
+#define A__NAME__pl arm_instr_cmps_regshort__pl
+#define A__NAME__vs arm_instr_cmps_regshort__vs
+#define A__NAME__vc arm_instr_cmps_regshort__vc
+#define A__NAME__hi arm_instr_cmps_regshort__hi
+#define A__NAME__ls arm_instr_cmps_regshort__ls
+#define A__NAME__ge arm_instr_cmps_regshort__ge
+#define A__NAME__lt arm_instr_cmps_regshort__lt
+#define A__NAME__gt arm_instr_cmps_regshort__gt
+#define A__NAME__le arm_instr_cmps_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__CMP
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMP
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_cmns_regshort
+#define A__NAME__eq arm_instr_cmns_regshort__eq
+#define A__NAME__ne arm_instr_cmns_regshort__ne
+#define A__NAME__cs arm_instr_cmns_regshort__cs
+#define A__NAME__cc arm_instr_cmns_regshort__cc
+#define A__NAME__mi arm_instr_cmns_regshort__mi
+#define A__NAME__pl arm_instr_cmns_regshort__pl
+#define A__NAME__vs arm_instr_cmns_regshort__vs
+#define A__NAME__vc arm_instr_cmns_regshort__vc
+#define A__NAME__hi arm_instr_cmns_regshort__hi
+#define A__NAME__ls arm_instr_cmns_regshort__ls
+#define A__NAME__ge arm_instr_cmns_regshort__ge
+#define A__NAME__lt arm_instr_cmns_regshort__lt
+#define A__NAME__gt arm_instr_cmns_regshort__gt
+#define A__NAME__le arm_instr_cmns_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__CMN
+#include "cpu_arm_instr_dpi.c"
+#undef A__CMN
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_orrs_regshort
+#define A__NAME__eq arm_instr_orrs_regshort__eq
+#define A__NAME__ne arm_instr_orrs_regshort__ne
+#define A__NAME__cs arm_instr_orrs_regshort__cs
+#define A__NAME__cc arm_instr_orrs_regshort__cc
+#define A__NAME__mi arm_instr_orrs_regshort__mi
+#define A__NAME__pl arm_instr_orrs_regshort__pl
+#define A__NAME__vs arm_instr_orrs_regshort__vs
+#define A__NAME__vc arm_instr_orrs_regshort__vc
+#define A__NAME__hi arm_instr_orrs_regshort__hi
+#define A__NAME__ls arm_instr_orrs_regshort__ls
+#define A__NAME__ge arm_instr_orrs_regshort__ge
+#define A__NAME__lt arm_instr_orrs_regshort__lt
+#define A__NAME__gt arm_instr_orrs_regshort__gt
+#define A__NAME__le arm_instr_orrs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__ORR
+#include "cpu_arm_instr_dpi.c"
+#undef A__ORR
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_movs_regshort
+#define A__NAME__eq arm_instr_movs_regshort__eq
+#define A__NAME__ne arm_instr_movs_regshort__ne
+#define A__NAME__cs arm_instr_movs_regshort__cs
+#define A__NAME__cc arm_instr_movs_regshort__cc
+#define A__NAME__mi arm_instr_movs_regshort__mi
+#define A__NAME__pl arm_instr_movs_regshort__pl
+#define A__NAME__vs arm_instr_movs_regshort__vs
+#define A__NAME__vc arm_instr_movs_regshort__vc
+#define A__NAME__hi arm_instr_movs_regshort__hi
+#define A__NAME__ls arm_instr_movs_regshort__ls
+#define A__NAME__ge arm_instr_movs_regshort__ge
+#define A__NAME__lt arm_instr_movs_regshort__lt
+#define A__NAME__gt arm_instr_movs_regshort__gt
+#define A__NAME__le arm_instr_movs_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__MOV
+#include "cpu_arm_instr_dpi.c"
+#undef A__MOV
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_bics_regshort
+#define A__NAME__eq arm_instr_bics_regshort__eq
+#define A__NAME__ne arm_instr_bics_regshort__ne
+#define A__NAME__cs arm_instr_bics_regshort__cs
+#define A__NAME__cc arm_instr_bics_regshort__cc
+#define A__NAME__mi arm_instr_bics_regshort__mi
+#define A__NAME__pl arm_instr_bics_regshort__pl
+#define A__NAME__vs arm_instr_bics_regshort__vs
+#define A__NAME__vc arm_instr_bics_regshort__vc
+#define A__NAME__hi arm_instr_bics_regshort__hi
+#define A__NAME__ls arm_instr_bics_regshort__ls
+#define A__NAME__ge arm_instr_bics_regshort__ge
+#define A__NAME__lt arm_instr_bics_regshort__lt
+#define A__NAME__gt arm_instr_bics_regshort__gt
+#define A__NAME__le arm_instr_bics_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__BIC
+#include "cpu_arm_instr_dpi.c"
+#undef A__BIC
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+#define A__NAME arm_instr_mvns_regshort
+#define A__NAME__eq arm_instr_mvns_regshort__eq
+#define A__NAME__ne arm_instr_mvns_regshort__ne
+#define A__NAME__cs arm_instr_mvns_regshort__cs
+#define A__NAME__cc arm_instr_mvns_regshort__cc
+#define A__NAME__mi arm_instr_mvns_regshort__mi
+#define A__NAME__pl arm_instr_mvns_regshort__pl
+#define A__NAME__vs arm_instr_mvns_regshort__vs
+#define A__NAME__vc arm_instr_mvns_regshort__vc
+#define A__NAME__hi arm_instr_mvns_regshort__hi
+#define A__NAME__ls arm_instr_mvns_regshort__ls
+#define A__NAME__ge arm_instr_mvns_regshort__ge
+#define A__NAME__lt arm_instr_mvns_regshort__lt
+#define A__NAME__gt arm_instr_mvns_regshort__gt
+#define A__NAME__le arm_instr_mvns_regshort__le
+#define A__S
+#define A__REGSHORT
+#define A__MVN
+#include "cpu_arm_instr_dpi.c"
+#undef A__MVN
+#undef A__S
+#undef A__REGSHORT
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME
+
+	void (*arm_dpi_instr[2 * 2 * 2 * 16 * 16])(struct cpu *,
+		struct arm_instr_call *) = {
+	arm_instr_and__eq,
+	arm_instr_and__ne,
+	arm_instr_and__cs,
+	arm_instr_and__cc,
+	arm_instr_and__mi,
+	arm_instr_and__pl,
+	arm_instr_and__vs,
+	arm_instr_and__vc,
+	arm_instr_and__hi,
+	arm_instr_and__ls,
+	arm_instr_and__ge,
+	arm_instr_and__lt,
+	arm_instr_and__gt,
+	arm_instr_and__le,
+	arm_instr_and,
+	arm_instr_nop,
+	arm_instr_eor__eq,
+	arm_instr_eor__ne,
+	arm_instr_eor__cs,
+	arm_instr_eor__cc,
+	arm_instr_eor__mi,
+	arm_instr_eor__pl,
+	arm_instr_eor__vs,
+	arm_instr_eor__vc,
+	arm_instr_eor__hi,
+	arm_instr_eor__ls,
+	arm_instr_eor__ge,
+	arm_instr_eor__lt,
+	arm_instr_eor__gt,
+	arm_instr_eor__le,
+	arm_instr_eor,
+	arm_instr_nop,
+	arm_instr_sub__eq,
+	arm_instr_sub__ne,
+	arm_instr_sub__cs,
+	arm_instr_sub__cc,
+	arm_instr_sub__mi,
+	arm_instr_sub__pl,
+	arm_instr_sub__vs,
+	arm_instr_sub__vc,
+	arm_instr_sub__hi,
+	arm_instr_sub__ls,
+	arm_instr_sub__ge,
+	arm_instr_sub__lt,
+	arm_instr_sub__gt,
+	arm_instr_sub__le,
+	arm_instr_sub,
+	arm_instr_nop,
+	arm_instr_rsb__eq,
+	arm_instr_rsb__ne,
+	arm_instr_rsb__cs,
+	arm_instr_rsb__cc,
+	arm_instr_rsb__mi,
+	arm_instr_rsb__pl,
+	arm_instr_rsb__vs,
+	arm_instr_rsb__vc,
+	arm_instr_rsb__hi,
+	arm_instr_rsb__ls,
+	arm_instr_rsb__ge,
+	arm_instr_rsb__lt,
+	arm_instr_rsb__gt,
+	arm_instr_rsb__le,
+	arm_instr_rsb,
+	arm_instr_nop,
+	arm_instr_add__eq,
+	arm_instr_add__ne,
+	arm_instr_add__cs,
+	arm_instr_add__cc,
+	arm_instr_add__mi,
+	arm_instr_add__pl,
+	arm_instr_add__vs,
+	arm_instr_add__vc,
+	arm_instr_add__hi,
+	arm_instr_add__ls,
+	arm_instr_add__ge,
+	arm_instr_add__lt,
+	arm_instr_add__gt,
+	arm_instr_add__le,
+	arm_instr_add,
+	arm_instr_nop,
+	arm_instr_adc__eq,
+	arm_instr_adc__ne,
+	arm_instr_adc__cs,
+	arm_instr_adc__cc,
+	arm_instr_adc__mi,
+	arm_instr_adc__pl,
+	arm_instr_adc__vs,
+	arm_instr_adc__vc,
+	arm_instr_adc__hi,
+	arm_instr_adc__ls,
+	arm_instr_adc__ge,
+	arm_instr_adc__lt,
+	arm_instr_adc__gt,
+	arm_instr_adc__le,
+	arm_instr_adc,
+	arm_instr_nop,
+	arm_instr_sbc__eq,
+	arm_instr_sbc__ne,
+	arm_instr_sbc__cs,
+	arm_instr_sbc__cc,
+	arm_instr_sbc__mi,
+	arm_instr_sbc__pl,
+	arm_instr_sbc__vs,
+	arm_instr_sbc__vc,
+	arm_instr_sbc__hi,
+	arm_instr_sbc__ls,
+	arm_instr_sbc__ge,
+	arm_instr_sbc__lt,
+	arm_instr_sbc__gt,
+	arm_instr_sbc__le,
+	arm_instr_sbc,
+	arm_instr_nop,
+	arm_instr_rsc__eq,
+	arm_instr_rsc__ne,
+	arm_instr_rsc__cs,
+	arm_instr_rsc__cc,
+	arm_instr_rsc__mi,
+	arm_instr_rsc__pl,
+	arm_instr_rsc__vs,
+	arm_instr_rsc__vc,
+	arm_instr_rsc__hi,
+	arm_instr_rsc__ls,
+	arm_instr_rsc__ge,
+	arm_instr_rsc__lt,
+	arm_instr_rsc__gt,
+	arm_instr_rsc__le,
+	arm_instr_rsc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_orr__eq,
+	arm_instr_orr__ne,
+	arm_instr_orr__cs,
+	arm_instr_orr__cc,
+	arm_instr_orr__mi,
+	arm_instr_orr__pl,
+	arm_instr_orr__vs,
+	arm_instr_orr__vc,
+	arm_instr_orr__hi,
+	arm_instr_orr__ls,
+	arm_instr_orr__ge,
+	arm_instr_orr__lt,
+	arm_instr_orr__gt,
+	arm_instr_orr__le,
+	arm_instr_orr,
+	arm_instr_nop,
+	arm_instr_mov__eq,
+	arm_instr_mov__ne,
+	arm_instr_mov__cs,
+	arm_instr_mov__cc,
+	arm_instr_mov__mi,
+	arm_instr_mov__pl,
+	arm_instr_mov__vs,
+	arm_instr_mov__vc,
+	arm_instr_mov__hi,
+	arm_instr_mov__ls,
+	arm_instr_mov__ge,
+	arm_instr_mov__lt,
+	arm_instr_mov__gt,
+	arm_instr_mov__le,
+	arm_instr_mov,
+	arm_instr_nop,
+	arm_instr_bic__eq,
+	arm_instr_bic__ne,
+	arm_instr_bic__cs,
+	arm_instr_bic__cc,
+	arm_instr_bic__mi,
+	arm_instr_bic__pl,
+	arm_instr_bic__vs,
+	arm_instr_bic__vc,
+	arm_instr_bic__hi,
+	arm_instr_bic__ls,
+	arm_instr_bic__ge,
+	arm_instr_bic__lt,
+	arm_instr_bic__gt,
+	arm_instr_bic__le,
+	arm_instr_bic,
+	arm_instr_nop,
+	arm_instr_mvn__eq,
+	arm_instr_mvn__ne,
+	arm_instr_mvn__cs,
+	arm_instr_mvn__cc,
+	arm_instr_mvn__mi,
+	arm_instr_mvn__pl,
+	arm_instr_mvn__vs,
+	arm_instr_mvn__vc,
+	arm_instr_mvn__hi,
+	arm_instr_mvn__ls,
+	arm_instr_mvn__ge,
+	arm_instr_mvn__lt,
+	arm_instr_mvn__gt,
+	arm_instr_mvn__le,
+	arm_instr_mvn,
+	arm_instr_nop,
+	arm_instr_ands__eq,
+	arm_instr_ands__ne,
+	arm_instr_ands__cs,
+	arm_instr_ands__cc,
+	arm_instr_ands__mi,
+	arm_instr_ands__pl,
+	arm_instr_ands__vs,
+	arm_instr_ands__vc,
+	arm_instr_ands__hi,
+	arm_instr_ands__ls,
+	arm_instr_ands__ge,
+	arm_instr_ands__lt,
+	arm_instr_ands__gt,
+	arm_instr_ands__le,
+	arm_instr_ands,
+	arm_instr_nop,
+	arm_instr_eors__eq,
+	arm_instr_eors__ne,
+	arm_instr_eors__cs,
+	arm_instr_eors__cc,
+	arm_instr_eors__mi,
+	arm_instr_eors__pl,
+	arm_instr_eors__vs,
+	arm_instr_eors__vc,
+	arm_instr_eors__hi,
+	arm_instr_eors__ls,
+	arm_instr_eors__ge,
+	arm_instr_eors__lt,
+	arm_instr_eors__gt,
+	arm_instr_eors__le,
+	arm_instr_eors,
+	arm_instr_nop,
+	arm_instr_subs__eq,
+	arm_instr_subs__ne,
+	arm_instr_subs__cs,
+	arm_instr_subs__cc,
+	arm_instr_subs__mi,
+	arm_instr_subs__pl,
+	arm_instr_subs__vs,
+	arm_instr_subs__vc,
+	arm_instr_subs__hi,
+	arm_instr_subs__ls,
+	arm_instr_subs__ge,
+	arm_instr_subs__lt,
+	arm_instr_subs__gt,
+	arm_instr_subs__le,
+	arm_instr_subs,
+	arm_instr_nop,
+	arm_instr_rsbs__eq,
+	arm_instr_rsbs__ne,
+	arm_instr_rsbs__cs,
+	arm_instr_rsbs__cc,
+	arm_instr_rsbs__mi,
+	arm_instr_rsbs__pl,
+	arm_instr_rsbs__vs,
+	arm_instr_rsbs__vc,
+	arm_instr_rsbs__hi,
+	arm_instr_rsbs__ls,
+	arm_instr_rsbs__ge,
+	arm_instr_rsbs__lt,
+	arm_instr_rsbs__gt,
+	arm_instr_rsbs__le,
+	arm_instr_rsbs,
+	arm_instr_nop,
+	arm_instr_adds__eq,
+	arm_instr_adds__ne,
+	arm_instr_adds__cs,
+	arm_instr_adds__cc,
+	arm_instr_adds__mi,
+	arm_instr_adds__pl,
+	arm_instr_adds__vs,
+	arm_instr_adds__vc,
+	arm_instr_adds__hi,
+	arm_instr_adds__ls,
+	arm_instr_adds__ge,
+	arm_instr_adds__lt,
+	arm_instr_adds__gt,
+	arm_instr_adds__le,
+	arm_instr_adds,
+	arm_instr_nop,
+	arm_instr_adcs__eq,
+	arm_instr_adcs__ne,
+	arm_instr_adcs__cs,
+	arm_instr_adcs__cc,
+	arm_instr_adcs__mi,
+	arm_instr_adcs__pl,
+	arm_instr_adcs__vs,
+	arm_instr_adcs__vc,
+	arm_instr_adcs__hi,
+	arm_instr_adcs__ls,
+	arm_instr_adcs__ge,
+	arm_instr_adcs__lt,
+	arm_instr_adcs__gt,
+	arm_instr_adcs__le,
+	arm_instr_adcs,
+	arm_instr_nop,
+	arm_instr_sbcs__eq,
+	arm_instr_sbcs__ne,
+	arm_instr_sbcs__cs,
+	arm_instr_sbcs__cc,
+	arm_instr_sbcs__mi,
+	arm_instr_sbcs__pl,
+	arm_instr_sbcs__vs,
+	arm_instr_sbcs__vc,
+	arm_instr_sbcs__hi,
+	arm_instr_sbcs__ls,
+	arm_instr_sbcs__ge,
+	arm_instr_sbcs__lt,
+	arm_instr_sbcs__gt,
+	arm_instr_sbcs__le,
+	arm_instr_sbcs,
+	arm_instr_nop,
+	arm_instr_rscs__eq,
+	arm_instr_rscs__ne,
+	arm_instr_rscs__cs,
+	arm_instr_rscs__cc,
+	arm_instr_rscs__mi,
+	arm_instr_rscs__pl,
+	arm_instr_rscs__vs,
+	arm_instr_rscs__vc,
+	arm_instr_rscs__hi,
+	arm_instr_rscs__ls,
+	arm_instr_rscs__ge,
+	arm_instr_rscs__lt,
+	arm_instr_rscs__gt,
+	arm_instr_rscs__le,
+	arm_instr_rscs,
+	arm_instr_nop,
+	arm_instr_tsts__eq,
+	arm_instr_tsts__ne,
+	arm_instr_tsts__cs,
+	arm_instr_tsts__cc,
+	arm_instr_tsts__mi,
+	arm_instr_tsts__pl,
+	arm_instr_tsts__vs,
+	arm_instr_tsts__vc,
+	arm_instr_tsts__hi,
+	arm_instr_tsts__ls,
+	arm_instr_tsts__ge,
+	arm_instr_tsts__lt,
+	arm_instr_tsts__gt,
+	arm_instr_tsts__le,
+	arm_instr_tsts,
+	arm_instr_nop,
+	arm_instr_teqs__eq,
+	arm_instr_teqs__ne,
+	arm_instr_teqs__cs,
+	arm_instr_teqs__cc,
+	arm_instr_teqs__mi,
+	arm_instr_teqs__pl,
+	arm_instr_teqs__vs,
+	arm_instr_teqs__vc,
+	arm_instr_teqs__hi,
+	arm_instr_teqs__ls,
+	arm_instr_teqs__ge,
+	arm_instr_teqs__lt,
+	arm_instr_teqs__gt,
+	arm_instr_teqs__le,
+	arm_instr_teqs,
+	arm_instr_nop,
+	arm_instr_cmps__eq,
+	arm_instr_cmps__ne,
+	arm_instr_cmps__cs,
+	arm_instr_cmps__cc,
+	arm_instr_cmps__mi,
+	arm_instr_cmps__pl,
+	arm_instr_cmps__vs,
+	arm_instr_cmps__vc,
+	arm_instr_cmps__hi,
+	arm_instr_cmps__ls,
+	arm_instr_cmps__ge,
+	arm_instr_cmps__lt,
+	arm_instr_cmps__gt,
+	arm_instr_cmps__le,
+	arm_instr_cmps,
+	arm_instr_nop,
+	arm_instr_cmns__eq,
+	arm_instr_cmns__ne,
+	arm_instr_cmns__cs,
+	arm_instr_cmns__cc,
+	arm_instr_cmns__mi,
+	arm_instr_cmns__pl,
+	arm_instr_cmns__vs,
+	arm_instr_cmns__vc,
+	arm_instr_cmns__hi,
+	arm_instr_cmns__ls,
+	arm_instr_cmns__ge,
+	arm_instr_cmns__lt,
+	arm_instr_cmns__gt,
+	arm_instr_cmns__le,
+	arm_instr_cmns,
+	arm_instr_nop,
+	arm_instr_orrs__eq,
+	arm_instr_orrs__ne,
+	arm_instr_orrs__cs,
+	arm_instr_orrs__cc,
+	arm_instr_orrs__mi,
+	arm_instr_orrs__pl,
+	arm_instr_orrs__vs,
+	arm_instr_orrs__vc,
+	arm_instr_orrs__hi,
+	arm_instr_orrs__ls,
+	arm_instr_orrs__ge,
+	arm_instr_orrs__lt,
+	arm_instr_orrs__gt,
+	arm_instr_orrs__le,
+	arm_instr_orrs,
+	arm_instr_nop,
+	arm_instr_movs__eq,
+	arm_instr_movs__ne,
+	arm_instr_movs__cs,
+	arm_instr_movs__cc,
+	arm_instr_movs__mi,
+	arm_instr_movs__pl,
+	arm_instr_movs__vs,
+	arm_instr_movs__vc,
+	arm_instr_movs__hi,
+	arm_instr_movs__ls,
+	arm_instr_movs__ge,
+	arm_instr_movs__lt,
+	arm_instr_movs__gt,
+	arm_instr_movs__le,
+	arm_instr_movs,
+	arm_instr_nop,
+	arm_instr_bics__eq,
+	arm_instr_bics__ne,
+	arm_instr_bics__cs,
+	arm_instr_bics__cc,
+	arm_instr_bics__mi,
+	arm_instr_bics__pl,
+	arm_instr_bics__vs,
+	arm_instr_bics__vc,
+	arm_instr_bics__hi,
+	arm_instr_bics__ls,
+	arm_instr_bics__ge,
+	arm_instr_bics__lt,
+	arm_instr_bics__gt,
+	arm_instr_bics__le,
+	arm_instr_bics,
+	arm_instr_nop,
+	arm_instr_mvns__eq,
+	arm_instr_mvns__ne,
+	arm_instr_mvns__cs,
+	arm_instr_mvns__cc,
+	arm_instr_mvns__mi,
+	arm_instr_mvns__pl,
+	arm_instr_mvns__vs,
+	arm_instr_mvns__vc,
+	arm_instr_mvns__hi,
+	arm_instr_mvns__ls,
+	arm_instr_mvns__ge,
+	arm_instr_mvns__lt,
+	arm_instr_mvns__gt,
+	arm_instr_mvns__le,
+	arm_instr_mvns,
+	arm_instr_nop,
+	arm_instr_and_pc__eq,
+	arm_instr_and_pc__ne,
+	arm_instr_and_pc__cs,
+	arm_instr_and_pc__cc,
+	arm_instr_and_pc__mi,
+	arm_instr_and_pc__pl,
+	arm_instr_and_pc__vs,
+	arm_instr_and_pc__vc,
+	arm_instr_and_pc__hi,
+	arm_instr_and_pc__ls,
+	arm_instr_and_pc__ge,
+	arm_instr_and_pc__lt,
+	arm_instr_and_pc__gt,
+	arm_instr_and_pc__le,
+	arm_instr_and_pc,
+	arm_instr_nop,
+	arm_instr_eor_pc__eq,
+	arm_instr_eor_pc__ne,
+	arm_instr_eor_pc__cs,
+	arm_instr_eor_pc__cc,
+	arm_instr_eor_pc__mi,
+	arm_instr_eor_pc__pl,
+	arm_instr_eor_pc__vs,
+	arm_instr_eor_pc__vc,
+	arm_instr_eor_pc__hi,
+	arm_instr_eor_pc__ls,
+	arm_instr_eor_pc__ge,
+	arm_instr_eor_pc__lt,
+	arm_instr_eor_pc__gt,
+	arm_instr_eor_pc__le,
+	arm_instr_eor_pc,
+	arm_instr_nop,
+	arm_instr_sub_pc__eq,
+	arm_instr_sub_pc__ne,
+	arm_instr_sub_pc__cs,
+	arm_instr_sub_pc__cc,
+	arm_instr_sub_pc__mi,
+	arm_instr_sub_pc__pl,
+	arm_instr_sub_pc__vs,
+	arm_instr_sub_pc__vc,
+	arm_instr_sub_pc__hi,
+	arm_instr_sub_pc__ls,
+	arm_instr_sub_pc__ge,
+	arm_instr_sub_pc__lt,
+	arm_instr_sub_pc__gt,
+	arm_instr_sub_pc__le,
+	arm_instr_sub_pc,
+	arm_instr_nop,
+	arm_instr_rsb_pc__eq,
+	arm_instr_rsb_pc__ne,
+	arm_instr_rsb_pc__cs,
+	arm_instr_rsb_pc__cc,
+	arm_instr_rsb_pc__mi,
+	arm_instr_rsb_pc__pl,
+	arm_instr_rsb_pc__vs,
+	arm_instr_rsb_pc__vc,
+	arm_instr_rsb_pc__hi,
+	arm_instr_rsb_pc__ls,
+	arm_instr_rsb_pc__ge,
+	arm_instr_rsb_pc__lt,
+	arm_instr_rsb_pc__gt,
+	arm_instr_rsb_pc__le,
+	arm_instr_rsb_pc,
+	arm_instr_nop,
+	arm_instr_add_pc__eq,
+	arm_instr_add_pc__ne,
+	arm_instr_add_pc__cs,
+	arm_instr_add_pc__cc,
+	arm_instr_add_pc__mi,
+	arm_instr_add_pc__pl,
+	arm_instr_add_pc__vs,
+	arm_instr_add_pc__vc,
+	arm_instr_add_pc__hi,
+	arm_instr_add_pc__ls,
+	arm_instr_add_pc__ge,
+	arm_instr_add_pc__lt,
+	arm_instr_add_pc__gt,
+	arm_instr_add_pc__le,
+	arm_instr_add_pc,
+	arm_instr_nop,
+	arm_instr_adc_pc__eq,
+	arm_instr_adc_pc__ne,
+	arm_instr_adc_pc__cs,
+	arm_instr_adc_pc__cc,
+	arm_instr_adc_pc__mi,
+	arm_instr_adc_pc__pl,
+	arm_instr_adc_pc__vs,
+	arm_instr_adc_pc__vc,
+	arm_instr_adc_pc__hi,
+	arm_instr_adc_pc__ls,
+	arm_instr_adc_pc__ge,
+	arm_instr_adc_pc__lt,
+	arm_instr_adc_pc__gt,
+	arm_instr_adc_pc__le,
+	arm_instr_adc_pc,
+	arm_instr_nop,
+	arm_instr_sbc_pc__eq,
+	arm_instr_sbc_pc__ne,
+	arm_instr_sbc_pc__cs,
+	arm_instr_sbc_pc__cc,
+	arm_instr_sbc_pc__mi,
+	arm_instr_sbc_pc__pl,
+	arm_instr_sbc_pc__vs,
+	arm_instr_sbc_pc__vc,
+	arm_instr_sbc_pc__hi,
+	arm_instr_sbc_pc__ls,
+	arm_instr_sbc_pc__ge,
+	arm_instr_sbc_pc__lt,
+	arm_instr_sbc_pc__gt,
+	arm_instr_sbc_pc__le,
+	arm_instr_sbc_pc,
+	arm_instr_nop,
+	arm_instr_rsc_pc__eq,
+	arm_instr_rsc_pc__ne,
+	arm_instr_rsc_pc__cs,
+	arm_instr_rsc_pc__cc,
+	arm_instr_rsc_pc__mi,
+	arm_instr_rsc_pc__pl,
+	arm_instr_rsc_pc__vs,
+	arm_instr_rsc_pc__vc,
+	arm_instr_rsc_pc__hi,
+	arm_instr_rsc_pc__ls,
+	arm_instr_rsc_pc__ge,
+	arm_instr_rsc_pc__lt,
+	arm_instr_rsc_pc__gt,
+	arm_instr_rsc_pc__le,
+	arm_instr_rsc_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_orr_pc__eq,
+	arm_instr_orr_pc__ne,
+	arm_instr_orr_pc__cs,
+	arm_instr_orr_pc__cc,
+	arm_instr_orr_pc__mi,
+	arm_instr_orr_pc__pl,
+	arm_instr_orr_pc__vs,
+	arm_instr_orr_pc__vc,
+	arm_instr_orr_pc__hi,
+	arm_instr_orr_pc__ls,
+	arm_instr_orr_pc__ge,
+	arm_instr_orr_pc__lt,
+	arm_instr_orr_pc__gt,
+	arm_instr_orr_pc__le,
+	arm_instr_orr_pc,
+	arm_instr_nop,
+	arm_instr_mov_pc__eq,
+	arm_instr_mov_pc__ne,
+	arm_instr_mov_pc__cs,
+	arm_instr_mov_pc__cc,
+	arm_instr_mov_pc__mi,
+	arm_instr_mov_pc__pl,
+	arm_instr_mov_pc__vs,
+	arm_instr_mov_pc__vc,
+	arm_instr_mov_pc__hi,
+	arm_instr_mov_pc__ls,
+	arm_instr_mov_pc__ge,
+	arm_instr_mov_pc__lt,
+	arm_instr_mov_pc__gt,
+	arm_instr_mov_pc__le,
+	arm_instr_mov_pc,
+	arm_instr_nop,
+	arm_instr_bic_pc__eq,
+	arm_instr_bic_pc__ne,
+	arm_instr_bic_pc__cs,
+	arm_instr_bic_pc__cc,
+	arm_instr_bic_pc__mi,
+	arm_instr_bic_pc__pl,
+	arm_instr_bic_pc__vs,
+	arm_instr_bic_pc__vc,
+	arm_instr_bic_pc__hi,
+	arm_instr_bic_pc__ls,
+	arm_instr_bic_pc__ge,
+	arm_instr_bic_pc__lt,
+	arm_instr_bic_pc__gt,
+	arm_instr_bic_pc__le,
+	arm_instr_bic_pc,
+	arm_instr_nop,
+	arm_instr_mvn_pc__eq,
+	arm_instr_mvn_pc__ne,
+	arm_instr_mvn_pc__cs,
+	arm_instr_mvn_pc__cc,
+	arm_instr_mvn_pc__mi,
+	arm_instr_mvn_pc__pl,
+	arm_instr_mvn_pc__vs,
+	arm_instr_mvn_pc__vc,
+	arm_instr_mvn_pc__hi,
+	arm_instr_mvn_pc__ls,
+	arm_instr_mvn_pc__ge,
+	arm_instr_mvn_pc__lt,
+	arm_instr_mvn_pc__gt,
+	arm_instr_mvn_pc__le,
+	arm_instr_mvn_pc,
+	arm_instr_nop,
+	arm_instr_ands_pc__eq,
+	arm_instr_ands_pc__ne,
+	arm_instr_ands_pc__cs,
+	arm_instr_ands_pc__cc,
+	arm_instr_ands_pc__mi,
+	arm_instr_ands_pc__pl,
+	arm_instr_ands_pc__vs,
+	arm_instr_ands_pc__vc,
+	arm_instr_ands_pc__hi,
+	arm_instr_ands_pc__ls,
+	arm_instr_ands_pc__ge,
+	arm_instr_ands_pc__lt,
+	arm_instr_ands_pc__gt,
+	arm_instr_ands_pc__le,
+	arm_instr_ands_pc,
+	arm_instr_nop,
+	arm_instr_eors_pc__eq,
+	arm_instr_eors_pc__ne,
+	arm_instr_eors_pc__cs,
+	arm_instr_eors_pc__cc,
+	arm_instr_eors_pc__mi,
+	arm_instr_eors_pc__pl,
+	arm_instr_eors_pc__vs,
+	arm_instr_eors_pc__vc,
+	arm_instr_eors_pc__hi,
+	arm_instr_eors_pc__ls,
+	arm_instr_eors_pc__ge,
+	arm_instr_eors_pc__lt,
+	arm_instr_eors_pc__gt,
+	arm_instr_eors_pc__le,
+	arm_instr_eors_pc,
+	arm_instr_nop,
+	arm_instr_subs_pc__eq,
+	arm_instr_subs_pc__ne,
+	arm_instr_subs_pc__cs,
+	arm_instr_subs_pc__cc,
+	arm_instr_subs_pc__mi,
+	arm_instr_subs_pc__pl,
+	arm_instr_subs_pc__vs,
+	arm_instr_subs_pc__vc,
+	arm_instr_subs_pc__hi,
+	arm_instr_subs_pc__ls,
+	arm_instr_subs_pc__ge,
+	arm_instr_subs_pc__lt,
+	arm_instr_subs_pc__gt,
+	arm_instr_subs_pc__le,
+	arm_instr_subs_pc,
+	arm_instr_nop,
+	arm_instr_rsbs_pc__eq,
+	arm_instr_rsbs_pc__ne,
+	arm_instr_rsbs_pc__cs,
+	arm_instr_rsbs_pc__cc,
+	arm_instr_rsbs_pc__mi,
+	arm_instr_rsbs_pc__pl,
+	arm_instr_rsbs_pc__vs,
+	arm_instr_rsbs_pc__vc,
+	arm_instr_rsbs_pc__hi,
+	arm_instr_rsbs_pc__ls,
+	arm_instr_rsbs_pc__ge,
+	arm_instr_rsbs_pc__lt,
+	arm_instr_rsbs_pc__gt,
+	arm_instr_rsbs_pc__le,
+	arm_instr_rsbs_pc,
+	arm_instr_nop,
+	arm_instr_adds_pc__eq,
+	arm_instr_adds_pc__ne,
+	arm_instr_adds_pc__cs,
+	arm_instr_adds_pc__cc,
+	arm_instr_adds_pc__mi,
+	arm_instr_adds_pc__pl,
+	arm_instr_adds_pc__vs,
+	arm_instr_adds_pc__vc,
+	arm_instr_adds_pc__hi,
+	arm_instr_adds_pc__ls,
+	arm_instr_adds_pc__ge,
+	arm_instr_adds_pc__lt,
+	arm_instr_adds_pc__gt,
+	arm_instr_adds_pc__le,
+	arm_instr_adds_pc,
+	arm_instr_nop,
+	arm_instr_adcs_pc__eq,
+	arm_instr_adcs_pc__ne,
+	arm_instr_adcs_pc__cs,
+	arm_instr_adcs_pc__cc,
+	arm_instr_adcs_pc__mi,
+	arm_instr_adcs_pc__pl,
+	arm_instr_adcs_pc__vs,
+	arm_instr_adcs_pc__vc,
+	arm_instr_adcs_pc__hi,
+	arm_instr_adcs_pc__ls,
+	arm_instr_adcs_pc__ge,
+	arm_instr_adcs_pc__lt,
+	arm_instr_adcs_pc__gt,
+	arm_instr_adcs_pc__le,
+	arm_instr_adcs_pc,
+	arm_instr_nop,
+	arm_instr_sbcs_pc__eq,
+	arm_instr_sbcs_pc__ne,
+	arm_instr_sbcs_pc__cs,
+	arm_instr_sbcs_pc__cc,
+	arm_instr_sbcs_pc__mi,
+	arm_instr_sbcs_pc__pl,
+	arm_instr_sbcs_pc__vs,
+	arm_instr_sbcs_pc__vc,
+	arm_instr_sbcs_pc__hi,
+	arm_instr_sbcs_pc__ls,
+	arm_instr_sbcs_pc__ge,
+	arm_instr_sbcs_pc__lt,
+	arm_instr_sbcs_pc__gt,
+	arm_instr_sbcs_pc__le,
+	arm_instr_sbcs_pc,
+	arm_instr_nop,
+	arm_instr_rscs_pc__eq,
+	arm_instr_rscs_pc__ne,
+	arm_instr_rscs_pc__cs,
+	arm_instr_rscs_pc__cc,
+	arm_instr_rscs_pc__mi,
+	arm_instr_rscs_pc__pl,
+	arm_instr_rscs_pc__vs,
+	arm_instr_rscs_pc__vc,
+	arm_instr_rscs_pc__hi,
+	arm_instr_rscs_pc__ls,
+	arm_instr_rscs_pc__ge,
+	arm_instr_rscs_pc__lt,
+	arm_instr_rscs_pc__gt,
+	arm_instr_rscs_pc__le,
+	arm_instr_rscs_pc,
+	arm_instr_nop,
+	arm_instr_tsts_pc__eq,
+	arm_instr_tsts_pc__ne,
+	arm_instr_tsts_pc__cs,
+	arm_instr_tsts_pc__cc,
+	arm_instr_tsts_pc__mi,
+	arm_instr_tsts_pc__pl,
+	arm_instr_tsts_pc__vs,
+	arm_instr_tsts_pc__vc,
+	arm_instr_tsts_pc__hi,
+	arm_instr_tsts_pc__ls,
+	arm_instr_tsts_pc__ge,
+	arm_instr_tsts_pc__lt,
+	arm_instr_tsts_pc__gt,
+	arm_instr_tsts_pc__le,
+	arm_instr_tsts_pc,
+	arm_instr_nop,
+	arm_instr_teqs_pc__eq,
+	arm_instr_teqs_pc__ne,
+	arm_instr_teqs_pc__cs,
+	arm_instr_teqs_pc__cc,
+	arm_instr_teqs_pc__mi,
+	arm_instr_teqs_pc__pl,
+	arm_instr_teqs_pc__vs,
+	arm_instr_teqs_pc__vc,
+	arm_instr_teqs_pc__hi,
+	arm_instr_teqs_pc__ls,
+	arm_instr_teqs_pc__ge,
+	arm_instr_teqs_pc__lt,
+	arm_instr_teqs_pc__gt,
+	arm_instr_teqs_pc__le,
+	arm_instr_teqs_pc,
+	arm_instr_nop,
+	arm_instr_cmps_pc__eq,
+	arm_instr_cmps_pc__ne,
+	arm_instr_cmps_pc__cs,
+	arm_instr_cmps_pc__cc,
+	arm_instr_cmps_pc__mi,
+	arm_instr_cmps_pc__pl,
+	arm_instr_cmps_pc__vs,
+	arm_instr_cmps_pc__vc,
+	arm_instr_cmps_pc__hi,
+	arm_instr_cmps_pc__ls,
+	arm_instr_cmps_pc__ge,
+	arm_instr_cmps_pc__lt,
+	arm_instr_cmps_pc__gt,
+	arm_instr_cmps_pc__le,
+	arm_instr_cmps_pc,
+	arm_instr_nop,
+	arm_instr_cmns_pc__eq,
+	arm_instr_cmns_pc__ne,
+	arm_instr_cmns_pc__cs,
+	arm_instr_cmns_pc__cc,
+	arm_instr_cmns_pc__mi,
+	arm_instr_cmns_pc__pl,
+	arm_instr_cmns_pc__vs,
+	arm_instr_cmns_pc__vc,
+	arm_instr_cmns_pc__hi,
+	arm_instr_cmns_pc__ls,
+	arm_instr_cmns_pc__ge,
+	arm_instr_cmns_pc__lt,
+	arm_instr_cmns_pc__gt,
+	arm_instr_cmns_pc__le,
+	arm_instr_cmns_pc,
+	arm_instr_nop,
+	arm_instr_orrs_pc__eq,
+	arm_instr_orrs_pc__ne,
+	arm_instr_orrs_pc__cs,
+	arm_instr_orrs_pc__cc,
+	arm_instr_orrs_pc__mi,
+	arm_instr_orrs_pc__pl,
+	arm_instr_orrs_pc__vs,
+	arm_instr_orrs_pc__vc,
+	arm_instr_orrs_pc__hi,
+	arm_instr_orrs_pc__ls,
+	arm_instr_orrs_pc__ge,
+	arm_instr_orrs_pc__lt,
+	arm_instr_orrs_pc__gt,
+	arm_instr_orrs_pc__le,
+	arm_instr_orrs_pc,
+	arm_instr_nop,
+	arm_instr_movs_pc__eq,
+	arm_instr_movs_pc__ne,
+	arm_instr_movs_pc__cs,
+	arm_instr_movs_pc__cc,
+	arm_instr_movs_pc__mi,
+	arm_instr_movs_pc__pl,
+	arm_instr_movs_pc__vs,
+	arm_instr_movs_pc__vc,
+	arm_instr_movs_pc__hi,
+	arm_instr_movs_pc__ls,
+	arm_instr_movs_pc__ge,
+	arm_instr_movs_pc__lt,
+	arm_instr_movs_pc__gt,
+	arm_instr_movs_pc__le,
+	arm_instr_movs_pc,
+	arm_instr_nop,
+	arm_instr_bics_pc__eq,
+	arm_instr_bics_pc__ne,
+	arm_instr_bics_pc__cs,
+	arm_instr_bics_pc__cc,
+	arm_instr_bics_pc__mi,
+	arm_instr_bics_pc__pl,
+	arm_instr_bics_pc__vs,
+	arm_instr_bics_pc__vc,
+	arm_instr_bics_pc__hi,
+	arm_instr_bics_pc__ls,
+	arm_instr_bics_pc__ge,
+	arm_instr_bics_pc__lt,
+	arm_instr_bics_pc__gt,
+	arm_instr_bics_pc__le,
+	arm_instr_bics_pc,
+	arm_instr_nop,
+	arm_instr_mvns_pc__eq,
+	arm_instr_mvns_pc__ne,
+	arm_instr_mvns_pc__cs,
+	arm_instr_mvns_pc__cc,
+	arm_instr_mvns_pc__mi,
+	arm_instr_mvns_pc__pl,
+	arm_instr_mvns_pc__vs,
+	arm_instr_mvns_pc__vc,
+	arm_instr_mvns_pc__hi,
+	arm_instr_mvns_pc__ls,
+	arm_instr_mvns_pc__ge,
+	arm_instr_mvns_pc__lt,
+	arm_instr_mvns_pc__gt,
+	arm_instr_mvns_pc__le,
+	arm_instr_mvns_pc,
+	arm_instr_nop,
+	arm_instr_and_reg__eq,
+	arm_instr_and_reg__ne,
+	arm_instr_and_reg__cs,
+	arm_instr_and_reg__cc,
+	arm_instr_and_reg__mi,
+	arm_instr_and_reg__pl,
+	arm_instr_and_reg__vs,
+	arm_instr_and_reg__vc,
+	arm_instr_and_reg__hi,
+	arm_instr_and_reg__ls,
+	arm_instr_and_reg__ge,
+	arm_instr_and_reg__lt,
+	arm_instr_and_reg__gt,
+	arm_instr_and_reg__le,
+	arm_instr_and_reg,
+	arm_instr_nop,
+	arm_instr_eor_reg__eq,
+	arm_instr_eor_reg__ne,
+	arm_instr_eor_reg__cs,
+	arm_instr_eor_reg__cc,
+	arm_instr_eor_reg__mi,
+	arm_instr_eor_reg__pl,
+	arm_instr_eor_reg__vs,
+	arm_instr_eor_reg__vc,
+	arm_instr_eor_reg__hi,
+	arm_instr_eor_reg__ls,
+	arm_instr_eor_reg__ge,
+	arm_instr_eor_reg__lt,
+	arm_instr_eor_reg__gt,
+	arm_instr_eor_reg__le,
+	arm_instr_eor_reg,
+	arm_instr_nop,
+	arm_instr_sub_reg__eq,
+	arm_instr_sub_reg__ne,
+	arm_instr_sub_reg__cs,
+	arm_instr_sub_reg__cc,
+	arm_instr_sub_reg__mi,
+	arm_instr_sub_reg__pl,
+	arm_instr_sub_reg__vs,
+	arm_instr_sub_reg__vc,
+	arm_instr_sub_reg__hi,
+	arm_instr_sub_reg__ls,
+	arm_instr_sub_reg__ge,
+	arm_instr_sub_reg__lt,
+	arm_instr_sub_reg__gt,
+	arm_instr_sub_reg__le,
+	arm_instr_sub_reg,
+	arm_instr_nop,
+	arm_instr_rsb_reg__eq,
+	arm_instr_rsb_reg__ne,
+	arm_instr_rsb_reg__cs,
+	arm_instr_rsb_reg__cc,
+	arm_instr_rsb_reg__mi,
+	arm_instr_rsb_reg__pl,
+	arm_instr_rsb_reg__vs,
+	arm_instr_rsb_reg__vc,
+	arm_instr_rsb_reg__hi,
+	arm_instr_rsb_reg__ls,
+	arm_instr_rsb_reg__ge,
+	arm_instr_rsb_reg__lt,
+	arm_instr_rsb_reg__gt,
+	arm_instr_rsb_reg__le,
+	arm_instr_rsb_reg,
+	arm_instr_nop,
+	arm_instr_add_reg__eq,
+	arm_instr_add_reg__ne,
+	arm_instr_add_reg__cs,
+	arm_instr_add_reg__cc,
+	arm_instr_add_reg__mi,
+	arm_instr_add_reg__pl,
+	arm_instr_add_reg__vs,
+	arm_instr_add_reg__vc,
+	arm_instr_add_reg__hi,
+	arm_instr_add_reg__ls,
+	arm_instr_add_reg__ge,
+	arm_instr_add_reg__lt,
+	arm_instr_add_reg__gt,
+	arm_instr_add_reg__le,
+	arm_instr_add_reg,
+	arm_instr_nop,
+	arm_instr_adc_reg__eq,
+	arm_instr_adc_reg__ne,
+	arm_instr_adc_reg__cs,
+	arm_instr_adc_reg__cc,
+	arm_instr_adc_reg__mi,
+	arm_instr_adc_reg__pl,
+	arm_instr_adc_reg__vs,
+	arm_instr_adc_reg__vc,
+	arm_instr_adc_reg__hi,
+	arm_instr_adc_reg__ls,
+	arm_instr_adc_reg__ge,
+	arm_instr_adc_reg__lt,
+	arm_instr_adc_reg__gt,
+	arm_instr_adc_reg__le,
+	arm_instr_adc_reg,
+	arm_instr_nop,
+	arm_instr_sbc_reg__eq,
+	arm_instr_sbc_reg__ne,
+	arm_instr_sbc_reg__cs,
+	arm_instr_sbc_reg__cc,
+	arm_instr_sbc_reg__mi,
+	arm_instr_sbc_reg__pl,
+	arm_instr_sbc_reg__vs,
+	arm_instr_sbc_reg__vc,
+	arm_instr_sbc_reg__hi,
+	arm_instr_sbc_reg__ls,
+	arm_instr_sbc_reg__ge,
+	arm_instr_sbc_reg__lt,
+	arm_instr_sbc_reg__gt,
+	arm_instr_sbc_reg__le,
+	arm_instr_sbc_reg,
+	arm_instr_nop,
+	arm_instr_rsc_reg__eq,
+	arm_instr_rsc_reg__ne,
+	arm_instr_rsc_reg__cs,
+	arm_instr_rsc_reg__cc,
+	arm_instr_rsc_reg__mi,
+	arm_instr_rsc_reg__pl,
+	arm_instr_rsc_reg__vs,
+	arm_instr_rsc_reg__vc,
+	arm_instr_rsc_reg__hi,
+	arm_instr_rsc_reg__ls,
+	arm_instr_rsc_reg__ge,
+	arm_instr_rsc_reg__lt,
+	arm_instr_rsc_reg__gt,
+	arm_instr_rsc_reg__le,
+	arm_instr_rsc_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_orr_reg__eq,
+	arm_instr_orr_reg__ne,
+	arm_instr_orr_reg__cs,
+	arm_instr_orr_reg__cc,
+	arm_instr_orr_reg__mi,
+	arm_instr_orr_reg__pl,
+	arm_instr_orr_reg__vs,
+	arm_instr_orr_reg__vc,
+	arm_instr_orr_reg__hi,
+	arm_instr_orr_reg__ls,
+	arm_instr_orr_reg__ge,
+	arm_instr_orr_reg__lt,
+	arm_instr_orr_reg__gt,
+	arm_instr_orr_reg__le,
+	arm_instr_orr_reg,
+	arm_instr_nop,
+	arm_instr_mov_reg__eq,
+	arm_instr_mov_reg__ne,
+	arm_instr_mov_reg__cs,
+	arm_instr_mov_reg__cc,
+	arm_instr_mov_reg__mi,
+	arm_instr_mov_reg__pl,
+	arm_instr_mov_reg__vs,
+	arm_instr_mov_reg__vc,
+	arm_instr_mov_reg__hi,
+	arm_instr_mov_reg__ls,
+	arm_instr_mov_reg__ge,
+	arm_instr_mov_reg__lt,
+	arm_instr_mov_reg__gt,
+	arm_instr_mov_reg__le,
+	arm_instr_mov_reg,
+	arm_instr_nop,
+	arm_instr_bic_reg__eq,
+	arm_instr_bic_reg__ne,
+	arm_instr_bic_reg__cs,
+	arm_instr_bic_reg__cc,
+	arm_instr_bic_reg__mi,
+	arm_instr_bic_reg__pl,
+	arm_instr_bic_reg__vs,
+	arm_instr_bic_reg__vc,
+	arm_instr_bic_reg__hi,
+	arm_instr_bic_reg__ls,
+	arm_instr_bic_reg__ge,
+	arm_instr_bic_reg__lt,
+	arm_instr_bic_reg__gt,
+	arm_instr_bic_reg__le,
+	arm_instr_bic_reg,
+	arm_instr_nop,
+	arm_instr_mvn_reg__eq,
+	arm_instr_mvn_reg__ne,
+	arm_instr_mvn_reg__cs,
+	arm_instr_mvn_reg__cc,
+	arm_instr_mvn_reg__mi,
+	arm_instr_mvn_reg__pl,
+	arm_instr_mvn_reg__vs,
+	arm_instr_mvn_reg__vc,
+	arm_instr_mvn_reg__hi,
+	arm_instr_mvn_reg__ls,
+	arm_instr_mvn_reg__ge,
+	arm_instr_mvn_reg__lt,
+	arm_instr_mvn_reg__gt,
+	arm_instr_mvn_reg__le,
+	arm_instr_mvn_reg,
+	arm_instr_nop,
+	arm_instr_ands_reg__eq,
+	arm_instr_ands_reg__ne,
+	arm_instr_ands_reg__cs,
+	arm_instr_ands_reg__cc,
+	arm_instr_ands_reg__mi,
+	arm_instr_ands_reg__pl,
+	arm_instr_ands_reg__vs,
+	arm_instr_ands_reg__vc,
+	arm_instr_ands_reg__hi,
+	arm_instr_ands_reg__ls,
+	arm_instr_ands_reg__ge,
+	arm_instr_ands_reg__lt,
+	arm_instr_ands_reg__gt,
+	arm_instr_ands_reg__le,
+	arm_instr_ands_reg,
+	arm_instr_nop,
+	arm_instr_eors_reg__eq,
+	arm_instr_eors_reg__ne,
+	arm_instr_eors_reg__cs,
+	arm_instr_eors_reg__cc,
+	arm_instr_eors_reg__mi,
+	arm_instr_eors_reg__pl,
+	arm_instr_eors_reg__vs,
+	arm_instr_eors_reg__vc,
+	arm_instr_eors_reg__hi,
+	arm_instr_eors_reg__ls,
+	arm_instr_eors_reg__ge,
+	arm_instr_eors_reg__lt,
+	arm_instr_eors_reg__gt,
+	arm_instr_eors_reg__le,
+	arm_instr_eors_reg,
+	arm_instr_nop,
+	arm_instr_subs_reg__eq,
+	arm_instr_subs_reg__ne,
+	arm_instr_subs_reg__cs,
+	arm_instr_subs_reg__cc,
+	arm_instr_subs_reg__mi,
+	arm_instr_subs_reg__pl,
+	arm_instr_subs_reg__vs,
+	arm_instr_subs_reg__vc,
+	arm_instr_subs_reg__hi,
+	arm_instr_subs_reg__ls,
+	arm_instr_subs_reg__ge,
+	arm_instr_subs_reg__lt,
+	arm_instr_subs_reg__gt,
+	arm_instr_subs_reg__le,
+	arm_instr_subs_reg,
+	arm_instr_nop,
+	arm_instr_rsbs_reg__eq,
+	arm_instr_rsbs_reg__ne,
+	arm_instr_rsbs_reg__cs,
+	arm_instr_rsbs_reg__cc,
+	arm_instr_rsbs_reg__mi,
+	arm_instr_rsbs_reg__pl,
+	arm_instr_rsbs_reg__vs,
+	arm_instr_rsbs_reg__vc,
+	arm_instr_rsbs_reg__hi,
+	arm_instr_rsbs_reg__ls,
+	arm_instr_rsbs_reg__ge,
+	arm_instr_rsbs_reg__lt,
+	arm_instr_rsbs_reg__gt,
+	arm_instr_rsbs_reg__le,
+	arm_instr_rsbs_reg,
+	arm_instr_nop,
+	arm_instr_adds_reg__eq,
+	arm_instr_adds_reg__ne,
+	arm_instr_adds_reg__cs,
+	arm_instr_adds_reg__cc,
+	arm_instr_adds_reg__mi,
+	arm_instr_adds_reg__pl,
+	arm_instr_adds_reg__vs,
+	arm_instr_adds_reg__vc,
+	arm_instr_adds_reg__hi,
+	arm_instr_adds_reg__ls,
+	arm_instr_adds_reg__ge,
+	arm_instr_adds_reg__lt,
+	arm_instr_adds_reg__gt,
+	arm_instr_adds_reg__le,
+	arm_instr_adds_reg,
+	arm_instr_nop,
+	arm_instr_adcs_reg__eq,
+	arm_instr_adcs_reg__ne,
+	arm_instr_adcs_reg__cs,
+	arm_instr_adcs_reg__cc,
+	arm_instr_adcs_reg__mi,
+	arm_instr_adcs_reg__pl,
+	arm_instr_adcs_reg__vs,
+	arm_instr_adcs_reg__vc,
+	arm_instr_adcs_reg__hi,
+	arm_instr_adcs_reg__ls,
+	arm_instr_adcs_reg__ge,
+	arm_instr_adcs_reg__lt,
+	arm_instr_adcs_reg__gt,
+	arm_instr_adcs_reg__le,
+	arm_instr_adcs_reg,
+	arm_instr_nop,
+	arm_instr_sbcs_reg__eq,
+	arm_instr_sbcs_reg__ne,
+	arm_instr_sbcs_reg__cs,
+	arm_instr_sbcs_reg__cc,
+	arm_instr_sbcs_reg__mi,
+	arm_instr_sbcs_reg__pl,
+	arm_instr_sbcs_reg__vs,
+	arm_instr_sbcs_reg__vc,
+	arm_instr_sbcs_reg__hi,
+	arm_instr_sbcs_reg__ls,
+	arm_instr_sbcs_reg__ge,
+	arm_instr_sbcs_reg__lt,
+	arm_instr_sbcs_reg__gt,
+	arm_instr_sbcs_reg__le,
+	arm_instr_sbcs_reg,
+	arm_instr_nop,
+	arm_instr_rscs_reg__eq,
+	arm_instr_rscs_reg__ne,
+	arm_instr_rscs_reg__cs,
+	arm_instr_rscs_reg__cc,
+	arm_instr_rscs_reg__mi,
+	arm_instr_rscs_reg__pl,
+	arm_instr_rscs_reg__vs,
+	arm_instr_rscs_reg__vc,
+	arm_instr_rscs_reg__hi,
+	arm_instr_rscs_reg__ls,
+	arm_instr_rscs_reg__ge,
+	arm_instr_rscs_reg__lt,
+	arm_instr_rscs_reg__gt,
+	arm_instr_rscs_reg__le,
+	arm_instr_rscs_reg,
+	arm_instr_nop,
+	arm_instr_tsts_reg__eq,
+	arm_instr_tsts_reg__ne,
+	arm_instr_tsts_reg__cs,
+	arm_instr_tsts_reg__cc,
+	arm_instr_tsts_reg__mi,
+	arm_instr_tsts_reg__pl,
+	arm_instr_tsts_reg__vs,
+	arm_instr_tsts_reg__vc,
+	arm_instr_tsts_reg__hi,
+	arm_instr_tsts_reg__ls,
+	arm_instr_tsts_reg__ge,
+	arm_instr_tsts_reg__lt,
+	arm_instr_tsts_reg__gt,
+	arm_instr_tsts_reg__le,
+	arm_instr_tsts_reg,
+	arm_instr_nop,
+	arm_instr_teqs_reg__eq,
+	arm_instr_teqs_reg__ne,
+	arm_instr_teqs_reg__cs,
+	arm_instr_teqs_reg__cc,
+	arm_instr_teqs_reg__mi,
+	arm_instr_teqs_reg__pl,
+	arm_instr_teqs_reg__vs,
+	arm_instr_teqs_reg__vc,
+	arm_instr_teqs_reg__hi,
+	arm_instr_teqs_reg__ls,
+	arm_instr_teqs_reg__ge,
+	arm_instr_teqs_reg__lt,
+	arm_instr_teqs_reg__gt,
+	arm_instr_teqs_reg__le,
+	arm_instr_teqs_reg,
+	arm_instr_nop,
+	arm_instr_cmps_reg__eq,
+	arm_instr_cmps_reg__ne,
+	arm_instr_cmps_reg__cs,
+	arm_instr_cmps_reg__cc,
+	arm_instr_cmps_reg__mi,
+	arm_instr_cmps_reg__pl,
+	arm_instr_cmps_reg__vs,
+	arm_instr_cmps_reg__vc,
+	arm_instr_cmps_reg__hi,
+	arm_instr_cmps_reg__ls,
+	arm_instr_cmps_reg__ge,
+	arm_instr_cmps_reg__lt,
+	arm_instr_cmps_reg__gt,
+	arm_instr_cmps_reg__le,
+	arm_instr_cmps_reg,
+	arm_instr_nop,
+	arm_instr_cmns_reg__eq,
+	arm_instr_cmns_reg__ne,
+	arm_instr_cmns_reg__cs,
+	arm_instr_cmns_reg__cc,
+	arm_instr_cmns_reg__mi,
+	arm_instr_cmns_reg__pl,
+	arm_instr_cmns_reg__vs,
+	arm_instr_cmns_reg__vc,
+	arm_instr_cmns_reg__hi,
+	arm_instr_cmns_reg__ls,
+	arm_instr_cmns_reg__ge,
+	arm_instr_cmns_reg__lt,
+	arm_instr_cmns_reg__gt,
+	arm_instr_cmns_reg__le,
+	arm_instr_cmns_reg,
+	arm_instr_nop,
+	arm_instr_orrs_reg__eq,
+	arm_instr_orrs_reg__ne,
+	arm_instr_orrs_reg__cs,
+	arm_instr_orrs_reg__cc,
+	arm_instr_orrs_reg__mi,
+	arm_instr_orrs_reg__pl,
+	arm_instr_orrs_reg__vs,
+	arm_instr_orrs_reg__vc,
+	arm_instr_orrs_reg__hi,
+	arm_instr_orrs_reg__ls,
+	arm_instr_orrs_reg__ge,
+	arm_instr_orrs_reg__lt,
+	arm_instr_orrs_reg__gt,
+	arm_instr_orrs_reg__le,
+	arm_instr_orrs_reg,
+	arm_instr_nop,
+	arm_instr_movs_reg__eq,
+	arm_instr_movs_reg__ne,
+	arm_instr_movs_reg__cs,
+	arm_instr_movs_reg__cc,
+	arm_instr_movs_reg__mi,
+	arm_instr_movs_reg__pl,
+	arm_instr_movs_reg__vs,
+	arm_instr_movs_reg__vc,
+	arm_instr_movs_reg__hi,
+	arm_instr_movs_reg__ls,
+	arm_instr_movs_reg__ge,
+	arm_instr_movs_reg__lt,
+	arm_instr_movs_reg__gt,
+	arm_instr_movs_reg__le,
+	arm_instr_movs_reg,
+	arm_instr_nop,
+	arm_instr_bics_reg__eq,
+	arm_instr_bics_reg__ne,
+	arm_instr_bics_reg__cs,
+	arm_instr_bics_reg__cc,
+	arm_instr_bics_reg__mi,
+	arm_instr_bics_reg__pl,
+	arm_instr_bics_reg__vs,
+	arm_instr_bics_reg__vc,
+	arm_instr_bics_reg__hi,
+	arm_instr_bics_reg__ls,
+	arm_instr_bics_reg__ge,
+	arm_instr_bics_reg__lt,
+	arm_instr_bics_reg__gt,
+	arm_instr_bics_reg__le,
+	arm_instr_bics_reg,
+	arm_instr_nop,
+	arm_instr_mvns_reg__eq,
+	arm_instr_mvns_reg__ne,
+	arm_instr_mvns_reg__cs,
+	arm_instr_mvns_reg__cc,
+	arm_instr_mvns_reg__mi,
+	arm_instr_mvns_reg__pl,
+	arm_instr_mvns_reg__vs,
+	arm_instr_mvns_reg__vc,
+	arm_instr_mvns_reg__hi,
+	arm_instr_mvns_reg__ls,
+	arm_instr_mvns_reg__ge,
+	arm_instr_mvns_reg__lt,
+	arm_instr_mvns_reg__gt,
+	arm_instr_mvns_reg__le,
+	arm_instr_mvns_reg,
+	arm_instr_nop,
+	arm_instr_and_pc_reg__eq,
+	arm_instr_and_pc_reg__ne,
+	arm_instr_and_pc_reg__cs,
+	arm_instr_and_pc_reg__cc,
+	arm_instr_and_pc_reg__mi,
+	arm_instr_and_pc_reg__pl,
+	arm_instr_and_pc_reg__vs,
+	arm_instr_and_pc_reg__vc,
+	arm_instr_and_pc_reg__hi,
+	arm_instr_and_pc_reg__ls,
+	arm_instr_and_pc_reg__ge,
+	arm_instr_and_pc_reg__lt,
+	arm_instr_and_pc_reg__gt,
+	arm_instr_and_pc_reg__le,
+	arm_instr_and_pc_reg,
+	arm_instr_nop,
+	arm_instr_eor_pc_reg__eq,
+	arm_instr_eor_pc_reg__ne,
+	arm_instr_eor_pc_reg__cs,
+	arm_instr_eor_pc_reg__cc,
+	arm_instr_eor_pc_reg__mi,
+	arm_instr_eor_pc_reg__pl,
+	arm_instr_eor_pc_reg__vs,
+	arm_instr_eor_pc_reg__vc,
+	arm_instr_eor_pc_reg__hi,
+	arm_instr_eor_pc_reg__ls,
+	arm_instr_eor_pc_reg__ge,
+	arm_instr_eor_pc_reg__lt,
+	arm_instr_eor_pc_reg__gt,
+	arm_instr_eor_pc_reg__le,
+	arm_instr_eor_pc_reg,
+	arm_instr_nop,
+	arm_instr_sub_pc_reg__eq,
+	arm_instr_sub_pc_reg__ne,
+	arm_instr_sub_pc_reg__cs,
+	arm_instr_sub_pc_reg__cc,
+	arm_instr_sub_pc_reg__mi,
+	arm_instr_sub_pc_reg__pl,
+	arm_instr_sub_pc_reg__vs,
+	arm_instr_sub_pc_reg__vc,
+	arm_instr_sub_pc_reg__hi,
+	arm_instr_sub_pc_reg__ls,
+	arm_instr_sub_pc_reg__ge,
+	arm_instr_sub_pc_reg__lt,
+	arm_instr_sub_pc_reg__gt,
+	arm_instr_sub_pc_reg__le,
+	arm_instr_sub_pc_reg,
+	arm_instr_nop,
+	arm_instr_rsb_pc_reg__eq,
+	arm_instr_rsb_pc_reg__ne,
+	arm_instr_rsb_pc_reg__cs,
+	arm_instr_rsb_pc_reg__cc,
+	arm_instr_rsb_pc_reg__mi,
+	arm_instr_rsb_pc_reg__pl,
+	arm_instr_rsb_pc_reg__vs,
+	arm_instr_rsb_pc_reg__vc,
+	arm_instr_rsb_pc_reg__hi,
+	arm_instr_rsb_pc_reg__ls,
+	arm_instr_rsb_pc_reg__ge,
+	arm_instr_rsb_pc_reg__lt,
+	arm_instr_rsb_pc_reg__gt,
+	arm_instr_rsb_pc_reg__le,
+	arm_instr_rsb_pc_reg,
+	arm_instr_nop,
+	arm_instr_add_pc_reg__eq,
+	arm_instr_add_pc_reg__ne,
+	arm_instr_add_pc_reg__cs,
+	arm_instr_add_pc_reg__cc,
+	arm_instr_add_pc_reg__mi,
+	arm_instr_add_pc_reg__pl,
+	arm_instr_add_pc_reg__vs,
+	arm_instr_add_pc_reg__vc,
+	arm_instr_add_pc_reg__hi,
+	arm_instr_add_pc_reg__ls,
+	arm_instr_add_pc_reg__ge,
+	arm_instr_add_pc_reg__lt,
+	arm_instr_add_pc_reg__gt,
+	arm_instr_add_pc_reg__le,
+	arm_instr_add_pc_reg,
+	arm_instr_nop,
+	arm_instr_adc_pc_reg__eq,
+	arm_instr_adc_pc_reg__ne,
+	arm_instr_adc_pc_reg__cs,
+	arm_instr_adc_pc_reg__cc,
+	arm_instr_adc_pc_reg__mi,
+	arm_instr_adc_pc_reg__pl,
+	arm_instr_adc_pc_reg__vs,
+	arm_instr_adc_pc_reg__vc,
+	arm_instr_adc_pc_reg__hi,
+	arm_instr_adc_pc_reg__ls,
+	arm_instr_adc_pc_reg__ge,
+	arm_instr_adc_pc_reg__lt,
+	arm_instr_adc_pc_reg__gt,
+	arm_instr_adc_pc_reg__le,
+	arm_instr_adc_pc_reg,
+	arm_instr_nop,
+	arm_instr_sbc_pc_reg__eq,
+	arm_instr_sbc_pc_reg__ne,
+	arm_instr_sbc_pc_reg__cs,
+	arm_instr_sbc_pc_reg__cc,
+	arm_instr_sbc_pc_reg__mi,
+	arm_instr_sbc_pc_reg__pl,
+	arm_instr_sbc_pc_reg__vs,
+	arm_instr_sbc_pc_reg__vc,
+	arm_instr_sbc_pc_reg__hi,
+	arm_instr_sbc_pc_reg__ls,
+	arm_instr_sbc_pc_reg__ge,
+	arm_instr_sbc_pc_reg__lt,
+	arm_instr_sbc_pc_reg__gt,
+	arm_instr_sbc_pc_reg__le,
+	arm_instr_sbc_pc_reg,
+	arm_instr_nop,
+	arm_instr_rsc_pc_reg__eq,
+	arm_instr_rsc_pc_reg__ne,
+	arm_instr_rsc_pc_reg__cs,
+	arm_instr_rsc_pc_reg__cc,
+	arm_instr_rsc_pc_reg__mi,
+	arm_instr_rsc_pc_reg__pl,
+	arm_instr_rsc_pc_reg__vs,
+	arm_instr_rsc_pc_reg__vc,
+	arm_instr_rsc_pc_reg__hi,
+	arm_instr_rsc_pc_reg__ls,
+	arm_instr_rsc_pc_reg__ge,
+	arm_instr_rsc_pc_reg__lt,
+	arm_instr_rsc_pc_reg__gt,
+	arm_instr_rsc_pc_reg__le,
+	arm_instr_rsc_pc_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_orr_pc_reg__eq,
+	arm_instr_orr_pc_reg__ne,
+	arm_instr_orr_pc_reg__cs,
+	arm_instr_orr_pc_reg__cc,
+	arm_instr_orr_pc_reg__mi,
+	arm_instr_orr_pc_reg__pl,
+	arm_instr_orr_pc_reg__vs,
+	arm_instr_orr_pc_reg__vc,
+	arm_instr_orr_pc_reg__hi,
+	arm_instr_orr_pc_reg__ls,
+	arm_instr_orr_pc_reg__ge,
+	arm_instr_orr_pc_reg__lt,
+	arm_instr_orr_pc_reg__gt,
+	arm_instr_orr_pc_reg__le,
+	arm_instr_orr_pc_reg,
+	arm_instr_nop,
+	arm_instr_mov_pc_reg__eq,
+	arm_instr_mov_pc_reg__ne,
+	arm_instr_mov_pc_reg__cs,
+	arm_instr_mov_pc_reg__cc,
+	arm_instr_mov_pc_reg__mi,
+	arm_instr_mov_pc_reg__pl,
+	arm_instr_mov_pc_reg__vs,
+	arm_instr_mov_pc_reg__vc,
+	arm_instr_mov_pc_reg__hi,
+	arm_instr_mov_pc_reg__ls,
+	arm_instr_mov_pc_reg__ge,
+	arm_instr_mov_pc_reg__lt,
+	arm_instr_mov_pc_reg__gt,
+	arm_instr_mov_pc_reg__le,
+	arm_instr_mov_pc_reg,
+	arm_instr_nop,
+	arm_instr_bic_pc_reg__eq,
+	arm_instr_bic_pc_reg__ne,
+	arm_instr_bic_pc_reg__cs,
+	arm_instr_bic_pc_reg__cc,
+	arm_instr_bic_pc_reg__mi,
+	arm_instr_bic_pc_reg__pl,
+	arm_instr_bic_pc_reg__vs,
+	arm_instr_bic_pc_reg__vc,
+	arm_instr_bic_pc_reg__hi,
+	arm_instr_bic_pc_reg__ls,
+	arm_instr_bic_pc_reg__ge,
+	arm_instr_bic_pc_reg__lt,
+	arm_instr_bic_pc_reg__gt,
+	arm_instr_bic_pc_reg__le,
+	arm_instr_bic_pc_reg,
+	arm_instr_nop,
+	arm_instr_mvn_pc_reg__eq,
+	arm_instr_mvn_pc_reg__ne,
+	arm_instr_mvn_pc_reg__cs,
+	arm_instr_mvn_pc_reg__cc,
+	arm_instr_mvn_pc_reg__mi,
+	arm_instr_mvn_pc_reg__pl,
+	arm_instr_mvn_pc_reg__vs,
+	arm_instr_mvn_pc_reg__vc,
+	arm_instr_mvn_pc_reg__hi,
+	arm_instr_mvn_pc_reg__ls,
+	arm_instr_mvn_pc_reg__ge,
+	arm_instr_mvn_pc_reg__lt,
+	arm_instr_mvn_pc_reg__gt,
+	arm_instr_mvn_pc_reg__le,
+	arm_instr_mvn_pc_reg,
+	arm_instr_nop,
+	arm_instr_ands_pc_reg__eq,
+	arm_instr_ands_pc_reg__ne,
+	arm_instr_ands_pc_reg__cs,
+	arm_instr_ands_pc_reg__cc,
+	arm_instr_ands_pc_reg__mi,
+	arm_instr_ands_pc_reg__pl,
+	arm_instr_ands_pc_reg__vs,
+	arm_instr_ands_pc_reg__vc,
+	arm_instr_ands_pc_reg__hi,
+	arm_instr_ands_pc_reg__ls,
+	arm_instr_ands_pc_reg__ge,
+	arm_instr_ands_pc_reg__lt,
+	arm_instr_ands_pc_reg__gt,
+	arm_instr_ands_pc_reg__le,
+	arm_instr_ands_pc_reg,
+	arm_instr_nop,
+	arm_instr_eors_pc_reg__eq,
+	arm_instr_eors_pc_reg__ne,
+	arm_instr_eors_pc_reg__cs,
+	arm_instr_eors_pc_reg__cc,
+	arm_instr_eors_pc_reg__mi,
+	arm_instr_eors_pc_reg__pl,
+	arm_instr_eors_pc_reg__vs,
+	arm_instr_eors_pc_reg__vc,
+	arm_instr_eors_pc_reg__hi,
+	arm_instr_eors_pc_reg__ls,
+	arm_instr_eors_pc_reg__ge,
+	arm_instr_eors_pc_reg__lt,
+	arm_instr_eors_pc_reg__gt,
+	arm_instr_eors_pc_reg__le,
+	arm_instr_eors_pc_reg,
+	arm_instr_nop,
+	arm_instr_subs_pc_reg__eq,
+	arm_instr_subs_pc_reg__ne,
+	arm_instr_subs_pc_reg__cs,
+	arm_instr_subs_pc_reg__cc,
+	arm_instr_subs_pc_reg__mi,
+	arm_instr_subs_pc_reg__pl,
+	arm_instr_subs_pc_reg__vs,
+	arm_instr_subs_pc_reg__vc,
+	arm_instr_subs_pc_reg__hi,
+	arm_instr_subs_pc_reg__ls,
+	arm_instr_subs_pc_reg__ge,
+	arm_instr_subs_pc_reg__lt,
+	arm_instr_subs_pc_reg__gt,
+	arm_instr_subs_pc_reg__le,
+	arm_instr_subs_pc_reg,
+	arm_instr_nop,
+	arm_instr_rsbs_pc_reg__eq,
+	arm_instr_rsbs_pc_reg__ne,
+	arm_instr_rsbs_pc_reg__cs,
+	arm_instr_rsbs_pc_reg__cc,
+	arm_instr_rsbs_pc_reg__mi,
+	arm_instr_rsbs_pc_reg__pl,
+	arm_instr_rsbs_pc_reg__vs,
+	arm_instr_rsbs_pc_reg__vc,
+	arm_instr_rsbs_pc_reg__hi,
+	arm_instr_rsbs_pc_reg__ls,
+	arm_instr_rsbs_pc_reg__ge,
+	arm_instr_rsbs_pc_reg__lt,
+	arm_instr_rsbs_pc_reg__gt,
+	arm_instr_rsbs_pc_reg__le,
+	arm_instr_rsbs_pc_reg,
+	arm_instr_nop,
+	arm_instr_adds_pc_reg__eq,
+	arm_instr_adds_pc_reg__ne,
+	arm_instr_adds_pc_reg__cs,
+	arm_instr_adds_pc_reg__cc,
+	arm_instr_adds_pc_reg__mi,
+	arm_instr_adds_pc_reg__pl,
+	arm_instr_adds_pc_reg__vs,
+	arm_instr_adds_pc_reg__vc,
+	arm_instr_adds_pc_reg__hi,
+	arm_instr_adds_pc_reg__ls,
+	arm_instr_adds_pc_reg__ge,
+	arm_instr_adds_pc_reg__lt,
+	arm_instr_adds_pc_reg__gt,
+	arm_instr_adds_pc_reg__le,
+	arm_instr_adds_pc_reg,
+	arm_instr_nop,
+	arm_instr_adcs_pc_reg__eq,
+	arm_instr_adcs_pc_reg__ne,
+	arm_instr_adcs_pc_reg__cs,
+	arm_instr_adcs_pc_reg__cc,
+	arm_instr_adcs_pc_reg__mi,
+	arm_instr_adcs_pc_reg__pl,
+	arm_instr_adcs_pc_reg__vs,
+	arm_instr_adcs_pc_reg__vc,
+	arm_instr_adcs_pc_reg__hi,
+	arm_instr_adcs_pc_reg__ls,
+	arm_instr_adcs_pc_reg__ge,
+	arm_instr_adcs_pc_reg__lt,
+	arm_instr_adcs_pc_reg__gt,
+	arm_instr_adcs_pc_reg__le,
+	arm_instr_adcs_pc_reg,
+	arm_instr_nop,
+	arm_instr_sbcs_pc_reg__eq,
+	arm_instr_sbcs_pc_reg__ne,
+	arm_instr_sbcs_pc_reg__cs,
+	arm_instr_sbcs_pc_reg__cc,
+	arm_instr_sbcs_pc_reg__mi,
+	arm_instr_sbcs_pc_reg__pl,
+	arm_instr_sbcs_pc_reg__vs,
+	arm_instr_sbcs_pc_reg__vc,
+	arm_instr_sbcs_pc_reg__hi,
+	arm_instr_sbcs_pc_reg__ls,
+	arm_instr_sbcs_pc_reg__ge,
+	arm_instr_sbcs_pc_reg__lt,
+	arm_instr_sbcs_pc_reg__gt,
+	arm_instr_sbcs_pc_reg__le,
+	arm_instr_sbcs_pc_reg,
+	arm_instr_nop,
+	arm_instr_rscs_pc_reg__eq,
+	arm_instr_rscs_pc_reg__ne,
+	arm_instr_rscs_pc_reg__cs,
+	arm_instr_rscs_pc_reg__cc,
+	arm_instr_rscs_pc_reg__mi,
+	arm_instr_rscs_pc_reg__pl,
+	arm_instr_rscs_pc_reg__vs,
+	arm_instr_rscs_pc_reg__vc,
+	arm_instr_rscs_pc_reg__hi,
+	arm_instr_rscs_pc_reg__ls,
+	arm_instr_rscs_pc_reg__ge,
+	arm_instr_rscs_pc_reg__lt,
+	arm_instr_rscs_pc_reg__gt,
+	arm_instr_rscs_pc_reg__le,
+	arm_instr_rscs_pc_reg,
+	arm_instr_nop,
+	arm_instr_tsts_pc_reg__eq,
+	arm_instr_tsts_pc_reg__ne,
+	arm_instr_tsts_pc_reg__cs,
+	arm_instr_tsts_pc_reg__cc,
+	arm_instr_tsts_pc_reg__mi,
+	arm_instr_tsts_pc_reg__pl,
+	arm_instr_tsts_pc_reg__vs,
+	arm_instr_tsts_pc_reg__vc,
+	arm_instr_tsts_pc_reg__hi,
+	arm_instr_tsts_pc_reg__ls,
+	arm_instr_tsts_pc_reg__ge,
+	arm_instr_tsts_pc_reg__lt,
+	arm_instr_tsts_pc_reg__gt,
+	arm_instr_tsts_pc_reg__le,
+	arm_instr_tsts_pc_reg,
+	arm_instr_nop,
+	arm_instr_teqs_pc_reg__eq,
+	arm_instr_teqs_pc_reg__ne,
+	arm_instr_teqs_pc_reg__cs,
+	arm_instr_teqs_pc_reg__cc,
+	arm_instr_teqs_pc_reg__mi,
+	arm_instr_teqs_pc_reg__pl,
+	arm_instr_teqs_pc_reg__vs,
+	arm_instr_teqs_pc_reg__vc,
+	arm_instr_teqs_pc_reg__hi,
+	arm_instr_teqs_pc_reg__ls,
+	arm_instr_teqs_pc_reg__ge,
+	arm_instr_teqs_pc_reg__lt,
+	arm_instr_teqs_pc_reg__gt,
+	arm_instr_teqs_pc_reg__le,
+	arm_instr_teqs_pc_reg,
+	arm_instr_nop,
+	arm_instr_cmps_pc_reg__eq,
+	arm_instr_cmps_pc_reg__ne,
+	arm_instr_cmps_pc_reg__cs,
+	arm_instr_cmps_pc_reg__cc,
+	arm_instr_cmps_pc_reg__mi,
+	arm_instr_cmps_pc_reg__pl,
+	arm_instr_cmps_pc_reg__vs,
+	arm_instr_cmps_pc_reg__vc,
+	arm_instr_cmps_pc_reg__hi,
+	arm_instr_cmps_pc_reg__ls,
+	arm_instr_cmps_pc_reg__ge,
+	arm_instr_cmps_pc_reg__lt,
+	arm_instr_cmps_pc_reg__gt,
+	arm_instr_cmps_pc_reg__le,
+	arm_instr_cmps_pc_reg,
+	arm_instr_nop,
+	arm_instr_cmns_pc_reg__eq,
+	arm_instr_cmns_pc_reg__ne,
+	arm_instr_cmns_pc_reg__cs,
+	arm_instr_cmns_pc_reg__cc,
+	arm_instr_cmns_pc_reg__mi,
+	arm_instr_cmns_pc_reg__pl,
+	arm_instr_cmns_pc_reg__vs,
+	arm_instr_cmns_pc_reg__vc,
+	arm_instr_cmns_pc_reg__hi,
+	arm_instr_cmns_pc_reg__ls,
+	arm_instr_cmns_pc_reg__ge,
+	arm_instr_cmns_pc_reg__lt,
+	arm_instr_cmns_pc_reg__gt,
+	arm_instr_cmns_pc_reg__le,
+	arm_instr_cmns_pc_reg,
+	arm_instr_nop,
+	arm_instr_orrs_pc_reg__eq,
+	arm_instr_orrs_pc_reg__ne,
+	arm_instr_orrs_pc_reg__cs,
+	arm_instr_orrs_pc_reg__cc,
+	arm_instr_orrs_pc_reg__mi,
+	arm_instr_orrs_pc_reg__pl,
+	arm_instr_orrs_pc_reg__vs,
+	arm_instr_orrs_pc_reg__vc,
+	arm_instr_orrs_pc_reg__hi,
+	arm_instr_orrs_pc_reg__ls,
+	arm_instr_orrs_pc_reg__ge,
+	arm_instr_orrs_pc_reg__lt,
+	arm_instr_orrs_pc_reg__gt,
+	arm_instr_orrs_pc_reg__le,
+	arm_instr_orrs_pc_reg,
+	arm_instr_nop,
+	arm_instr_movs_pc_reg__eq,
+	arm_instr_movs_pc_reg__ne,
+	arm_instr_movs_pc_reg__cs,
+	arm_instr_movs_pc_reg__cc,
+	arm_instr_movs_pc_reg__mi,
+	arm_instr_movs_pc_reg__pl,
+	arm_instr_movs_pc_reg__vs,
+	arm_instr_movs_pc_reg__vc,
+	arm_instr_movs_pc_reg__hi,
+	arm_instr_movs_pc_reg__ls,
+	arm_instr_movs_pc_reg__ge,
+	arm_instr_movs_pc_reg__lt,
+	arm_instr_movs_pc_reg__gt,
+	arm_instr_movs_pc_reg__le,
+	arm_instr_movs_pc_reg,
+	arm_instr_nop,
+	arm_instr_bics_pc_reg__eq,
+	arm_instr_bics_pc_reg__ne,
+	arm_instr_bics_pc_reg__cs,
+	arm_instr_bics_pc_reg__cc,
+	arm_instr_bics_pc_reg__mi,
+	arm_instr_bics_pc_reg__pl,
+	arm_instr_bics_pc_reg__vs,
+	arm_instr_bics_pc_reg__vc,
+	arm_instr_bics_pc_reg__hi,
+	arm_instr_bics_pc_reg__ls,
+	arm_instr_bics_pc_reg__ge,
+	arm_instr_bics_pc_reg__lt,
+	arm_instr_bics_pc_reg__gt,
+	arm_instr_bics_pc_reg__le,
+	arm_instr_bics_pc_reg,
+	arm_instr_nop,
+	arm_instr_mvns_pc_reg__eq,
+	arm_instr_mvns_pc_reg__ne,
+	arm_instr_mvns_pc_reg__cs,
+	arm_instr_mvns_pc_reg__cc,
+	arm_instr_mvns_pc_reg__mi,
+	arm_instr_mvns_pc_reg__pl,
+	arm_instr_mvns_pc_reg__vs,
+	arm_instr_mvns_pc_reg__vc,
+	arm_instr_mvns_pc_reg__hi,
+	arm_instr_mvns_pc_reg__ls,
+	arm_instr_mvns_pc_reg__ge,
+	arm_instr_mvns_pc_reg__lt,
+	arm_instr_mvns_pc_reg__gt,
+	arm_instr_mvns_pc_reg__le,
+	arm_instr_mvns_pc_reg,
+	arm_instr_nop
+};
+
+
+	void (*arm_dpi_instr_regshort[2 * 16 * 16])(struct cpu *,
+		struct arm_instr_call *) = {
+	arm_instr_and_regshort__eq,
+	arm_instr_and_regshort__ne,
+	arm_instr_and_regshort__cs,
+	arm_instr_and_regshort__cc,
+	arm_instr_and_regshort__mi,
+	arm_instr_and_regshort__pl,
+	arm_instr_and_regshort__vs,
+	arm_instr_and_regshort__vc,
+	arm_instr_and_regshort__hi,
+	arm_instr_and_regshort__ls,
+	arm_instr_and_regshort__ge,
+	arm_instr_and_regshort__lt,
+	arm_instr_and_regshort__gt,
+	arm_instr_and_regshort__le,
+	arm_instr_and_regshort,
+	arm_instr_nop,
+	arm_instr_eor_regshort__eq,
+	arm_instr_eor_regshort__ne,
+	arm_instr_eor_regshort__cs,
+	arm_instr_eor_regshort__cc,
+	arm_instr_eor_regshort__mi,
+	arm_instr_eor_regshort__pl,
+	arm_instr_eor_regshort__vs,
+	arm_instr_eor_regshort__vc,
+	arm_instr_eor_regshort__hi,
+	arm_instr_eor_regshort__ls,
+	arm_instr_eor_regshort__ge,
+	arm_instr_eor_regshort__lt,
+	arm_instr_eor_regshort__gt,
+	arm_instr_eor_regshort__le,
+	arm_instr_eor_regshort,
+	arm_instr_nop,
+	arm_instr_sub_regshort__eq,
+	arm_instr_sub_regshort__ne,
+	arm_instr_sub_regshort__cs,
+	arm_instr_sub_regshort__cc,
+	arm_instr_sub_regshort__mi,
+	arm_instr_sub_regshort__pl,
+	arm_instr_sub_regshort__vs,
+	arm_instr_sub_regshort__vc,
+	arm_instr_sub_regshort__hi,
+	arm_instr_sub_regshort__ls,
+	arm_instr_sub_regshort__ge,
+	arm_instr_sub_regshort__lt,
+	arm_instr_sub_regshort__gt,
+	arm_instr_sub_regshort__le,
+	arm_instr_sub_regshort,
+	arm_instr_nop,
+	arm_instr_rsb_regshort__eq,
+	arm_instr_rsb_regshort__ne,
+	arm_instr_rsb_regshort__cs,
+	arm_instr_rsb_regshort__cc,
+	arm_instr_rsb_regshort__mi,
+	arm_instr_rsb_regshort__pl,
+	arm_instr_rsb_regshort__vs,
+	arm_instr_rsb_regshort__vc,
+	arm_instr_rsb_regshort__hi,
+	arm_instr_rsb_regshort__ls,
+	arm_instr_rsb_regshort__ge,
+	arm_instr_rsb_regshort__lt,
+	arm_instr_rsb_regshort__gt,
+	arm_instr_rsb_regshort__le,
+	arm_instr_rsb_regshort,
+	arm_instr_nop,
+	arm_instr_add_regshort__eq,
+	arm_instr_add_regshort__ne,
+	arm_instr_add_regshort__cs,
+	arm_instr_add_regshort__cc,
+	arm_instr_add_regshort__mi,
+	arm_instr_add_regshort__pl,
+	arm_instr_add_regshort__vs,
+	arm_instr_add_regshort__vc,
+	arm_instr_add_regshort__hi,
+	arm_instr_add_regshort__ls,
+	arm_instr_add_regshort__ge,
+	arm_instr_add_regshort__lt,
+	arm_instr_add_regshort__gt,
+	arm_instr_add_regshort__le,
+	arm_instr_add_regshort,
+	arm_instr_nop,
+	arm_instr_adc_regshort__eq,
+	arm_instr_adc_regshort__ne,
+	arm_instr_adc_regshort__cs,
+	arm_instr_adc_regshort__cc,
+	arm_instr_adc_regshort__mi,
+	arm_instr_adc_regshort__pl,
+	arm_instr_adc_regshort__vs,
+	arm_instr_adc_regshort__vc,
+	arm_instr_adc_regshort__hi,
+	arm_instr_adc_regshort__ls,
+	arm_instr_adc_regshort__ge,
+	arm_instr_adc_regshort__lt,
+	arm_instr_adc_regshort__gt,
+	arm_instr_adc_regshort__le,
+	arm_instr_adc_regshort,
+	arm_instr_nop,
+	arm_instr_sbc_regshort__eq,
+	arm_instr_sbc_regshort__ne,
+	arm_instr_sbc_regshort__cs,
+	arm_instr_sbc_regshort__cc,
+	arm_instr_sbc_regshort__mi,
+	arm_instr_sbc_regshort__pl,
+	arm_instr_sbc_regshort__vs,
+	arm_instr_sbc_regshort__vc,
+	arm_instr_sbc_regshort__hi,
+	arm_instr_sbc_regshort__ls,
+	arm_instr_sbc_regshort__ge,
+	arm_instr_sbc_regshort__lt,
+	arm_instr_sbc_regshort__gt,
+	arm_instr_sbc_regshort__le,
+	arm_instr_sbc_regshort,
+	arm_instr_nop,
+	arm_instr_rsc_regshort__eq,
+	arm_instr_rsc_regshort__ne,
+	arm_instr_rsc_regshort__cs,
+	arm_instr_rsc_regshort__cc,
+	arm_instr_rsc_regshort__mi,
+	arm_instr_rsc_regshort__pl,
+	arm_instr_rsc_regshort__vs,
+	arm_instr_rsc_regshort__vc,
+	arm_instr_rsc_regshort__hi,
+	arm_instr_rsc_regshort__ls,
+	arm_instr_rsc_regshort__ge,
+	arm_instr_rsc_regshort__lt,
+	arm_instr_rsc_regshort__gt,
+	arm_instr_rsc_regshort__le,
+	arm_instr_rsc_regshort,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_orr_regshort__eq,
+	arm_instr_orr_regshort__ne,
+	arm_instr_orr_regshort__cs,
+	arm_instr_orr_regshort__cc,
+	arm_instr_orr_regshort__mi,
+	arm_instr_orr_regshort__pl,
+	arm_instr_orr_regshort__vs,
+	arm_instr_orr_regshort__vc,
+	arm_instr_orr_regshort__hi,
+	arm_instr_orr_regshort__ls,
+	arm_instr_orr_regshort__ge,
+	arm_instr_orr_regshort__lt,
+	arm_instr_orr_regshort__gt,
+	arm_instr_orr_regshort__le,
+	arm_instr_orr_regshort,
+	arm_instr_nop,
+	arm_instr_mov_regshort__eq,
+	arm_instr_mov_regshort__ne,
+	arm_instr_mov_regshort__cs,
+	arm_instr_mov_regshort__cc,
+	arm_instr_mov_regshort__mi,
+	arm_instr_mov_regshort__pl,
+	arm_instr_mov_regshort__vs,
+	arm_instr_mov_regshort__vc,
+	arm_instr_mov_regshort__hi,
+	arm_instr_mov_regshort__ls,
+	arm_instr_mov_regshort__ge,
+	arm_instr_mov_regshort__lt,
+	arm_instr_mov_regshort__gt,
+	arm_instr_mov_regshort__le,
+	arm_instr_mov_regshort,
+	arm_instr_nop,
+	arm_instr_bic_regshort__eq,
+	arm_instr_bic_regshort__ne,
+	arm_instr_bic_regshort__cs,
+	arm_instr_bic_regshort__cc,
+	arm_instr_bic_regshort__mi,
+	arm_instr_bic_regshort__pl,
+	arm_instr_bic_regshort__vs,
+	arm_instr_bic_regshort__vc,
+	arm_instr_bic_regshort__hi,
+	arm_instr_bic_regshort__ls,
+	arm_instr_bic_regshort__ge,
+	arm_instr_bic_regshort__lt,
+	arm_instr_bic_regshort__gt,
+	arm_instr_bic_regshort__le,
+	arm_instr_bic_regshort,
+	arm_instr_nop,
+	arm_instr_mvn_regshort__eq,
+	arm_instr_mvn_regshort__ne,
+	arm_instr_mvn_regshort__cs,
+	arm_instr_mvn_regshort__cc,
+	arm_instr_mvn_regshort__mi,
+	arm_instr_mvn_regshort__pl,
+	arm_instr_mvn_regshort__vs,
+	arm_instr_mvn_regshort__vc,
+	arm_instr_mvn_regshort__hi,
+	arm_instr_mvn_regshort__ls,
+	arm_instr_mvn_regshort__ge,
+	arm_instr_mvn_regshort__lt,
+	arm_instr_mvn_regshort__gt,
+	arm_instr_mvn_regshort__le,
+	arm_instr_mvn_regshort,
+	arm_instr_nop,
+	arm_instr_ands_regshort__eq,
+	arm_instr_ands_regshort__ne,
+	arm_instr_ands_regshort__cs,
+	arm_instr_ands_regshort__cc,
+	arm_instr_ands_regshort__mi,
+	arm_instr_ands_regshort__pl,
+	arm_instr_ands_regshort__vs,
+	arm_instr_ands_regshort__vc,
+	arm_instr_ands_regshort__hi,
+	arm_instr_ands_regshort__ls,
+	arm_instr_ands_regshort__ge,
+	arm_instr_ands_regshort__lt,
+	arm_instr_ands_regshort__gt,
+	arm_instr_ands_regshort__le,
+	arm_instr_ands_regshort,
+	arm_instr_nop,
+	arm_instr_eors_regshort__eq,
+	arm_instr_eors_regshort__ne,
+	arm_instr_eors_regshort__cs,
+	arm_instr_eors_regshort__cc,
+	arm_instr_eors_regshort__mi,
+	arm_instr_eors_regshort__pl,
+	arm_instr_eors_regshort__vs,
+	arm_instr_eors_regshort__vc,
+	arm_instr_eors_regshort__hi,
+	arm_instr_eors_regshort__ls,
+	arm_instr_eors_regshort__ge,
+	arm_instr_eors_regshort__lt,
+	arm_instr_eors_regshort__gt,
+	arm_instr_eors_regshort__le,
+	arm_instr_eors_regshort,
+	arm_instr_nop,
+	arm_instr_subs_regshort__eq,
+	arm_instr_subs_regshort__ne,
+	arm_instr_subs_regshort__cs,
+	arm_instr_subs_regshort__cc,
+	arm_instr_subs_regshort__mi,
+	arm_instr_subs_regshort__pl,
+	arm_instr_subs_regshort__vs,
+	arm_instr_subs_regshort__vc,
+	arm_instr_subs_regshort__hi,
+	arm_instr_subs_regshort__ls,
+	arm_instr_subs_regshort__ge,
+	arm_instr_subs_regshort__lt,
+	arm_instr_subs_regshort__gt,
+	arm_instr_subs_regshort__le,
+	arm_instr_subs_regshort,
+	arm_instr_nop,
+	arm_instr_rsbs_regshort__eq,
+	arm_instr_rsbs_regshort__ne,
+	arm_instr_rsbs_regshort__cs,
+	arm_instr_rsbs_regshort__cc,
+	arm_instr_rsbs_regshort__mi,
+	arm_instr_rsbs_regshort__pl,
+	arm_instr_rsbs_regshort__vs,
+	arm_instr_rsbs_regshort__vc,
+	arm_instr_rsbs_regshort__hi,
+	arm_instr_rsbs_regshort__ls,
+	arm_instr_rsbs_regshort__ge,
+	arm_instr_rsbs_regshort__lt,
+	arm_instr_rsbs_regshort__gt,
+	arm_instr_rsbs_regshort__le,
+	arm_instr_rsbs_regshort,
+	arm_instr_nop,
+	arm_instr_adds_regshort__eq,
+	arm_instr_adds_regshort__ne,
+	arm_instr_adds_regshort__cs,
+	arm_instr_adds_regshort__cc,
+	arm_instr_adds_regshort__mi,
+	arm_instr_adds_regshort__pl,
+	arm_instr_adds_regshort__vs,
+	arm_instr_adds_regshort__vc,
+	arm_instr_adds_regshort__hi,
+	arm_instr_adds_regshort__ls,
+	arm_instr_adds_regshort__ge,
+	arm_instr_adds_regshort__lt,
+	arm_instr_adds_regshort__gt,
+	arm_instr_adds_regshort__le,
+	arm_instr_adds_regshort,
+	arm_instr_nop,
+	arm_instr_adcs_regshort__eq,
+	arm_instr_adcs_regshort__ne,
+	arm_instr_adcs_regshort__cs,
+	arm_instr_adcs_regshort__cc,
+	arm_instr_adcs_regshort__mi,
+	arm_instr_adcs_regshort__pl,
+	arm_instr_adcs_regshort__vs,
+	arm_instr_adcs_regshort__vc,
+	arm_instr_adcs_regshort__hi,
+	arm_instr_adcs_regshort__ls,
+	arm_instr_adcs_regshort__ge,
+	arm_instr_adcs_regshort__lt,
+	arm_instr_adcs_regshort__gt,
+	arm_instr_adcs_regshort__le,
+	arm_instr_adcs_regshort,
+	arm_instr_nop,
+	arm_instr_sbcs_regshort__eq,
+	arm_instr_sbcs_regshort__ne,
+	arm_instr_sbcs_regshort__cs,
+	arm_instr_sbcs_regshort__cc,
+	arm_instr_sbcs_regshort__mi,
+	arm_instr_sbcs_regshort__pl,
+	arm_instr_sbcs_regshort__vs,
+	arm_instr_sbcs_regshort__vc,
+	arm_instr_sbcs_regshort__hi,
+	arm_instr_sbcs_regshort__ls,
+	arm_instr_sbcs_regshort__ge,
+	arm_instr_sbcs_regshort__lt,
+	arm_instr_sbcs_regshort__gt,
+	arm_instr_sbcs_regshort__le,
+	arm_instr_sbcs_regshort,
+	arm_instr_nop,
+	arm_instr_rscs_regshort__eq,
+	arm_instr_rscs_regshort__ne,
+	arm_instr_rscs_regshort__cs,
+	arm_instr_rscs_regshort__cc,
+	arm_instr_rscs_regshort__mi,
+	arm_instr_rscs_regshort__pl,
+	arm_instr_rscs_regshort__vs,
+	arm_instr_rscs_regshort__vc,
+	arm_instr_rscs_regshort__hi,
+	arm_instr_rscs_regshort__ls,
+	arm_instr_rscs_regshort__ge,
+	arm_instr_rscs_regshort__lt,
+	arm_instr_rscs_regshort__gt,
+	arm_instr_rscs_regshort__le,
+	arm_instr_rscs_regshort,
+	arm_instr_nop,
+	arm_instr_tsts_regshort__eq,
+	arm_instr_tsts_regshort__ne,
+	arm_instr_tsts_regshort__cs,
+	arm_instr_tsts_regshort__cc,
+	arm_instr_tsts_regshort__mi,
+	arm_instr_tsts_regshort__pl,
+	arm_instr_tsts_regshort__vs,
+	arm_instr_tsts_regshort__vc,
+	arm_instr_tsts_regshort__hi,
+	arm_instr_tsts_regshort__ls,
+	arm_instr_tsts_regshort__ge,
+	arm_instr_tsts_regshort__lt,
+	arm_instr_tsts_regshort__gt,
+	arm_instr_tsts_regshort__le,
+	arm_instr_tsts_regshort,
+	arm_instr_nop,
+	arm_instr_teqs_regshort__eq,
+	arm_instr_teqs_regshort__ne,
+	arm_instr_teqs_regshort__cs,
+	arm_instr_teqs_regshort__cc,
+	arm_instr_teqs_regshort__mi,
+	arm_instr_teqs_regshort__pl,
+	arm_instr_teqs_regshort__vs,
+	arm_instr_teqs_regshort__vc,
+	arm_instr_teqs_regshort__hi,
+	arm_instr_teqs_regshort__ls,
+	arm_instr_teqs_regshort__ge,
+	arm_instr_teqs_regshort__lt,
+	arm_instr_teqs_regshort__gt,
+	arm_instr_teqs_regshort__le,
+	arm_instr_teqs_regshort,
+	arm_instr_nop,
+	arm_instr_cmps_regshort__eq,
+	arm_instr_cmps_regshort__ne,
+	arm_instr_cmps_regshort__cs,
+	arm_instr_cmps_regshort__cc,
+	arm_instr_cmps_regshort__mi,
+	arm_instr_cmps_regshort__pl,
+	arm_instr_cmps_regshort__vs,
+	arm_instr_cmps_regshort__vc,
+	arm_instr_cmps_regshort__hi,
+	arm_instr_cmps_regshort__ls,
+	arm_instr_cmps_regshort__ge,
+	arm_instr_cmps_regshort__lt,
+	arm_instr_cmps_regshort__gt,
+	arm_instr_cmps_regshort__le,
+	arm_instr_cmps_regshort,
+	arm_instr_nop,
+	arm_instr_cmns_regshort__eq,
+	arm_instr_cmns_regshort__ne,
+	arm_instr_cmns_regshort__cs,
+	arm_instr_cmns_regshort__cc,
+	arm_instr_cmns_regshort__mi,
+	arm_instr_cmns_regshort__pl,
+	arm_instr_cmns_regshort__vs,
+	arm_instr_cmns_regshort__vc,
+	arm_instr_cmns_regshort__hi,
+	arm_instr_cmns_regshort__ls,
+	arm_instr_cmns_regshort__ge,
+	arm_instr_cmns_regshort__lt,
+	arm_instr_cmns_regshort__gt,
+	arm_instr_cmns_regshort__le,
+	arm_instr_cmns_regshort,
+	arm_instr_nop,
+	arm_instr_orrs_regshort__eq,
+	arm_instr_orrs_regshort__ne,
+	arm_instr_orrs_regshort__cs,
+	arm_instr_orrs_regshort__cc,
+	arm_instr_orrs_regshort__mi,
+	arm_instr_orrs_regshort__pl,
+	arm_instr_orrs_regshort__vs,
+	arm_instr_orrs_regshort__vc,
+	arm_instr_orrs_regshort__hi,
+	arm_instr_orrs_regshort__ls,
+	arm_instr_orrs_regshort__ge,
+	arm_instr_orrs_regshort__lt,
+	arm_instr_orrs_regshort__gt,
+	arm_instr_orrs_regshort__le,
+	arm_instr_orrs_regshort,
+	arm_instr_nop,
+	arm_instr_movs_regshort__eq,
+	arm_instr_movs_regshort__ne,
+	arm_instr_movs_regshort__cs,
+	arm_instr_movs_regshort__cc,
+	arm_instr_movs_regshort__mi,
+	arm_instr_movs_regshort__pl,
+	arm_instr_movs_regshort__vs,
+	arm_instr_movs_regshort__vc,
+	arm_instr_movs_regshort__hi,
+	arm_instr_movs_regshort__ls,
+	arm_instr_movs_regshort__ge,
+	arm_instr_movs_regshort__lt,
+	arm_instr_movs_regshort__gt,
+	arm_instr_movs_regshort__le,
+	arm_instr_movs_regshort,
+	arm_instr_nop,
+	arm_instr_bics_regshort__eq,
+	arm_instr_bics_regshort__ne,
+	arm_instr_bics_regshort__cs,
+	arm_instr_bics_regshort__cc,
+	arm_instr_bics_regshort__mi,
+	arm_instr_bics_regshort__pl,
+	arm_instr_bics_regshort__vs,
+	arm_instr_bics_regshort__vc,
+	arm_instr_bics_regshort__hi,
+	arm_instr_bics_regshort__ls,
+	arm_instr_bics_regshort__ge,
+	arm_instr_bics_regshort__lt,
+	arm_instr_bics_regshort__gt,
+	arm_instr_bics_regshort__le,
+	arm_instr_bics_regshort,
+	arm_instr_nop,
+	arm_instr_mvns_regshort__eq,
+	arm_instr_mvns_regshort__ne,
+	arm_instr_mvns_regshort__cs,
+	arm_instr_mvns_regshort__cc,
+	arm_instr_mvns_regshort__mi,
+	arm_instr_mvns_regshort__pl,
+	arm_instr_mvns_regshort__vs,
+	arm_instr_mvns_regshort__vc,
+	arm_instr_mvns_regshort__hi,
+	arm_instr_mvns_regshort__ls,
+	arm_instr_mvns_regshort__ge,
+	arm_instr_mvns_regshort__lt,
+	arm_instr_mvns_regshort__gt,
+	arm_instr_mvns_regshort__le,
+	arm_instr_mvns_regshort,
+	arm_instr_nop
+};
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_head.c gxemul-0.7.0/src/cpus/tmp_arm_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_head.c	2022-10-18 16:37:22.077739400 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES ARM_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH arm
+#define DYNTRANS_ARM
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N ARM_L2N
+#define DYNTRANS_L3N ARM_L3N
+#if !defined(ARM_L2N) || !defined(ARM_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE arm_l2_64_table
+#define DYNTRANS_L3_64_TABLE arm_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC arm_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE ARM_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT ARM_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE arm_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY arm_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR ARM_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY ARM_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE arm_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE arm_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC arm_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS arm_combine_instructions
+#define DISASSEMBLE arm_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_arm_instr.c */
+#define instr(n) arm_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) arm32_instr_ ## n
+
+#endif
+
+
+#define X(n) void arm_instr_ ## n(struct cpu *cpu, \
+ struct arm_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.arm.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct arm_instr_call nothing_call = { instr(nothing), {0,0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore.c	2022-10-18 16:37:22.078740600 +0000
@@ -0,0 +1,10020 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+void arm_instr_store_w0_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_word_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_word_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w0_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w0_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_store_w1_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);void arm_instr_load_w1_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+
+	void (*arm_load_store_instr[1024])(struct cpu *,
+		struct arm_instr_call *) = {
+	arm_instr_store_w0_word_u0_p0_imm__eq,
+	arm_instr_store_w0_word_u0_p0_imm__ne,
+	arm_instr_store_w0_word_u0_p0_imm__cs,
+	arm_instr_store_w0_word_u0_p0_imm__cc,
+	arm_instr_store_w0_word_u0_p0_imm__mi,
+	arm_instr_store_w0_word_u0_p0_imm__pl,
+	arm_instr_store_w0_word_u0_p0_imm__vs,
+	arm_instr_store_w0_word_u0_p0_imm__vc,
+	arm_instr_store_w0_word_u0_p0_imm__hi,
+	arm_instr_store_w0_word_u0_p0_imm__ls,
+	arm_instr_store_w0_word_u0_p0_imm__ge,
+	arm_instr_store_w0_word_u0_p0_imm__lt,
+	arm_instr_store_w0_word_u0_p0_imm__gt,
+	arm_instr_store_w0_word_u0_p0_imm__le,
+	arm_instr_store_w0_word_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p0_imm__eq,
+	arm_instr_load_w0_word_u0_p0_imm__ne,
+	arm_instr_load_w0_word_u0_p0_imm__cs,
+	arm_instr_load_w0_word_u0_p0_imm__cc,
+	arm_instr_load_w0_word_u0_p0_imm__mi,
+	arm_instr_load_w0_word_u0_p0_imm__pl,
+	arm_instr_load_w0_word_u0_p0_imm__vs,
+	arm_instr_load_w0_word_u0_p0_imm__vc,
+	arm_instr_load_w0_word_u0_p0_imm__hi,
+	arm_instr_load_w0_word_u0_p0_imm__ls,
+	arm_instr_load_w0_word_u0_p0_imm__ge,
+	arm_instr_load_w0_word_u0_p0_imm__lt,
+	arm_instr_load_w0_word_u0_p0_imm__gt,
+	arm_instr_load_w0_word_u0_p0_imm__le,
+	arm_instr_load_w0_word_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p0_imm__eq,
+	arm_instr_store_w1_word_u0_p0_imm__ne,
+	arm_instr_store_w1_word_u0_p0_imm__cs,
+	arm_instr_store_w1_word_u0_p0_imm__cc,
+	arm_instr_store_w1_word_u0_p0_imm__mi,
+	arm_instr_store_w1_word_u0_p0_imm__pl,
+	arm_instr_store_w1_word_u0_p0_imm__vs,
+	arm_instr_store_w1_word_u0_p0_imm__vc,
+	arm_instr_store_w1_word_u0_p0_imm__hi,
+	arm_instr_store_w1_word_u0_p0_imm__ls,
+	arm_instr_store_w1_word_u0_p0_imm__ge,
+	arm_instr_store_w1_word_u0_p0_imm__lt,
+	arm_instr_store_w1_word_u0_p0_imm__gt,
+	arm_instr_store_w1_word_u0_p0_imm__le,
+	arm_instr_store_w1_word_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p0_imm__eq,
+	arm_instr_load_w1_word_u0_p0_imm__ne,
+	arm_instr_load_w1_word_u0_p0_imm__cs,
+	arm_instr_load_w1_word_u0_p0_imm__cc,
+	arm_instr_load_w1_word_u0_p0_imm__mi,
+	arm_instr_load_w1_word_u0_p0_imm__pl,
+	arm_instr_load_w1_word_u0_p0_imm__vs,
+	arm_instr_load_w1_word_u0_p0_imm__vc,
+	arm_instr_load_w1_word_u0_p0_imm__hi,
+	arm_instr_load_w1_word_u0_p0_imm__ls,
+	arm_instr_load_w1_word_u0_p0_imm__ge,
+	arm_instr_load_w1_word_u0_p0_imm__lt,
+	arm_instr_load_w1_word_u0_p0_imm__gt,
+	arm_instr_load_w1_word_u0_p0_imm__le,
+	arm_instr_load_w1_word_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p0_imm__eq,
+	arm_instr_store_w0_byte_u0_p0_imm__ne,
+	arm_instr_store_w0_byte_u0_p0_imm__cs,
+	arm_instr_store_w0_byte_u0_p0_imm__cc,
+	arm_instr_store_w0_byte_u0_p0_imm__mi,
+	arm_instr_store_w0_byte_u0_p0_imm__pl,
+	arm_instr_store_w0_byte_u0_p0_imm__vs,
+	arm_instr_store_w0_byte_u0_p0_imm__vc,
+	arm_instr_store_w0_byte_u0_p0_imm__hi,
+	arm_instr_store_w0_byte_u0_p0_imm__ls,
+	arm_instr_store_w0_byte_u0_p0_imm__ge,
+	arm_instr_store_w0_byte_u0_p0_imm__lt,
+	arm_instr_store_w0_byte_u0_p0_imm__gt,
+	arm_instr_store_w0_byte_u0_p0_imm__le,
+	arm_instr_store_w0_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p0_imm__eq,
+	arm_instr_load_w0_byte_u0_p0_imm__ne,
+	arm_instr_load_w0_byte_u0_p0_imm__cs,
+	arm_instr_load_w0_byte_u0_p0_imm__cc,
+	arm_instr_load_w0_byte_u0_p0_imm__mi,
+	arm_instr_load_w0_byte_u0_p0_imm__pl,
+	arm_instr_load_w0_byte_u0_p0_imm__vs,
+	arm_instr_load_w0_byte_u0_p0_imm__vc,
+	arm_instr_load_w0_byte_u0_p0_imm__hi,
+	arm_instr_load_w0_byte_u0_p0_imm__ls,
+	arm_instr_load_w0_byte_u0_p0_imm__ge,
+	arm_instr_load_w0_byte_u0_p0_imm__lt,
+	arm_instr_load_w0_byte_u0_p0_imm__gt,
+	arm_instr_load_w0_byte_u0_p0_imm__le,
+	arm_instr_load_w0_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p0_imm__eq,
+	arm_instr_store_w1_byte_u0_p0_imm__ne,
+	arm_instr_store_w1_byte_u0_p0_imm__cs,
+	arm_instr_store_w1_byte_u0_p0_imm__cc,
+	arm_instr_store_w1_byte_u0_p0_imm__mi,
+	arm_instr_store_w1_byte_u0_p0_imm__pl,
+	arm_instr_store_w1_byte_u0_p0_imm__vs,
+	arm_instr_store_w1_byte_u0_p0_imm__vc,
+	arm_instr_store_w1_byte_u0_p0_imm__hi,
+	arm_instr_store_w1_byte_u0_p0_imm__ls,
+	arm_instr_store_w1_byte_u0_p0_imm__ge,
+	arm_instr_store_w1_byte_u0_p0_imm__lt,
+	arm_instr_store_w1_byte_u0_p0_imm__gt,
+	arm_instr_store_w1_byte_u0_p0_imm__le,
+	arm_instr_store_w1_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p0_imm__eq,
+	arm_instr_load_w1_byte_u0_p0_imm__ne,
+	arm_instr_load_w1_byte_u0_p0_imm__cs,
+	arm_instr_load_w1_byte_u0_p0_imm__cc,
+	arm_instr_load_w1_byte_u0_p0_imm__mi,
+	arm_instr_load_w1_byte_u0_p0_imm__pl,
+	arm_instr_load_w1_byte_u0_p0_imm__vs,
+	arm_instr_load_w1_byte_u0_p0_imm__vc,
+	arm_instr_load_w1_byte_u0_p0_imm__hi,
+	arm_instr_load_w1_byte_u0_p0_imm__ls,
+	arm_instr_load_w1_byte_u0_p0_imm__ge,
+	arm_instr_load_w1_byte_u0_p0_imm__lt,
+	arm_instr_load_w1_byte_u0_p0_imm__gt,
+	arm_instr_load_w1_byte_u0_p0_imm__le,
+	arm_instr_load_w1_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p0_imm__eq,
+	arm_instr_store_w0_word_u1_p0_imm__ne,
+	arm_instr_store_w0_word_u1_p0_imm__cs,
+	arm_instr_store_w0_word_u1_p0_imm__cc,
+	arm_instr_store_w0_word_u1_p0_imm__mi,
+	arm_instr_store_w0_word_u1_p0_imm__pl,
+	arm_instr_store_w0_word_u1_p0_imm__vs,
+	arm_instr_store_w0_word_u1_p0_imm__vc,
+	arm_instr_store_w0_word_u1_p0_imm__hi,
+	arm_instr_store_w0_word_u1_p0_imm__ls,
+	arm_instr_store_w0_word_u1_p0_imm__ge,
+	arm_instr_store_w0_word_u1_p0_imm__lt,
+	arm_instr_store_w0_word_u1_p0_imm__gt,
+	arm_instr_store_w0_word_u1_p0_imm__le,
+	arm_instr_store_w0_word_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p0_imm__eq,
+	arm_instr_load_w0_word_u1_p0_imm__ne,
+	arm_instr_load_w0_word_u1_p0_imm__cs,
+	arm_instr_load_w0_word_u1_p0_imm__cc,
+	arm_instr_load_w0_word_u1_p0_imm__mi,
+	arm_instr_load_w0_word_u1_p0_imm__pl,
+	arm_instr_load_w0_word_u1_p0_imm__vs,
+	arm_instr_load_w0_word_u1_p0_imm__vc,
+	arm_instr_load_w0_word_u1_p0_imm__hi,
+	arm_instr_load_w0_word_u1_p0_imm__ls,
+	arm_instr_load_w0_word_u1_p0_imm__ge,
+	arm_instr_load_w0_word_u1_p0_imm__lt,
+	arm_instr_load_w0_word_u1_p0_imm__gt,
+	arm_instr_load_w0_word_u1_p0_imm__le,
+	arm_instr_load_w0_word_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p0_imm__eq,
+	arm_instr_store_w1_word_u1_p0_imm__ne,
+	arm_instr_store_w1_word_u1_p0_imm__cs,
+	arm_instr_store_w1_word_u1_p0_imm__cc,
+	arm_instr_store_w1_word_u1_p0_imm__mi,
+	arm_instr_store_w1_word_u1_p0_imm__pl,
+	arm_instr_store_w1_word_u1_p0_imm__vs,
+	arm_instr_store_w1_word_u1_p0_imm__vc,
+	arm_instr_store_w1_word_u1_p0_imm__hi,
+	arm_instr_store_w1_word_u1_p0_imm__ls,
+	arm_instr_store_w1_word_u1_p0_imm__ge,
+	arm_instr_store_w1_word_u1_p0_imm__lt,
+	arm_instr_store_w1_word_u1_p0_imm__gt,
+	arm_instr_store_w1_word_u1_p0_imm__le,
+	arm_instr_store_w1_word_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p0_imm__eq,
+	arm_instr_load_w1_word_u1_p0_imm__ne,
+	arm_instr_load_w1_word_u1_p0_imm__cs,
+	arm_instr_load_w1_word_u1_p0_imm__cc,
+	arm_instr_load_w1_word_u1_p0_imm__mi,
+	arm_instr_load_w1_word_u1_p0_imm__pl,
+	arm_instr_load_w1_word_u1_p0_imm__vs,
+	arm_instr_load_w1_word_u1_p0_imm__vc,
+	arm_instr_load_w1_word_u1_p0_imm__hi,
+	arm_instr_load_w1_word_u1_p0_imm__ls,
+	arm_instr_load_w1_word_u1_p0_imm__ge,
+	arm_instr_load_w1_word_u1_p0_imm__lt,
+	arm_instr_load_w1_word_u1_p0_imm__gt,
+	arm_instr_load_w1_word_u1_p0_imm__le,
+	arm_instr_load_w1_word_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p0_imm__eq,
+	arm_instr_store_w0_byte_u1_p0_imm__ne,
+	arm_instr_store_w0_byte_u1_p0_imm__cs,
+	arm_instr_store_w0_byte_u1_p0_imm__cc,
+	arm_instr_store_w0_byte_u1_p0_imm__mi,
+	arm_instr_store_w0_byte_u1_p0_imm__pl,
+	arm_instr_store_w0_byte_u1_p0_imm__vs,
+	arm_instr_store_w0_byte_u1_p0_imm__vc,
+	arm_instr_store_w0_byte_u1_p0_imm__hi,
+	arm_instr_store_w0_byte_u1_p0_imm__ls,
+	arm_instr_store_w0_byte_u1_p0_imm__ge,
+	arm_instr_store_w0_byte_u1_p0_imm__lt,
+	arm_instr_store_w0_byte_u1_p0_imm__gt,
+	arm_instr_store_w0_byte_u1_p0_imm__le,
+	arm_instr_store_w0_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p0_imm__eq,
+	arm_instr_load_w0_byte_u1_p0_imm__ne,
+	arm_instr_load_w0_byte_u1_p0_imm__cs,
+	arm_instr_load_w0_byte_u1_p0_imm__cc,
+	arm_instr_load_w0_byte_u1_p0_imm__mi,
+	arm_instr_load_w0_byte_u1_p0_imm__pl,
+	arm_instr_load_w0_byte_u1_p0_imm__vs,
+	arm_instr_load_w0_byte_u1_p0_imm__vc,
+	arm_instr_load_w0_byte_u1_p0_imm__hi,
+	arm_instr_load_w0_byte_u1_p0_imm__ls,
+	arm_instr_load_w0_byte_u1_p0_imm__ge,
+	arm_instr_load_w0_byte_u1_p0_imm__lt,
+	arm_instr_load_w0_byte_u1_p0_imm__gt,
+	arm_instr_load_w0_byte_u1_p0_imm__le,
+	arm_instr_load_w0_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p0_imm__eq,
+	arm_instr_store_w1_byte_u1_p0_imm__ne,
+	arm_instr_store_w1_byte_u1_p0_imm__cs,
+	arm_instr_store_w1_byte_u1_p0_imm__cc,
+	arm_instr_store_w1_byte_u1_p0_imm__mi,
+	arm_instr_store_w1_byte_u1_p0_imm__pl,
+	arm_instr_store_w1_byte_u1_p0_imm__vs,
+	arm_instr_store_w1_byte_u1_p0_imm__vc,
+	arm_instr_store_w1_byte_u1_p0_imm__hi,
+	arm_instr_store_w1_byte_u1_p0_imm__ls,
+	arm_instr_store_w1_byte_u1_p0_imm__ge,
+	arm_instr_store_w1_byte_u1_p0_imm__lt,
+	arm_instr_store_w1_byte_u1_p0_imm__gt,
+	arm_instr_store_w1_byte_u1_p0_imm__le,
+	arm_instr_store_w1_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p0_imm__eq,
+	arm_instr_load_w1_byte_u1_p0_imm__ne,
+	arm_instr_load_w1_byte_u1_p0_imm__cs,
+	arm_instr_load_w1_byte_u1_p0_imm__cc,
+	arm_instr_load_w1_byte_u1_p0_imm__mi,
+	arm_instr_load_w1_byte_u1_p0_imm__pl,
+	arm_instr_load_w1_byte_u1_p0_imm__vs,
+	arm_instr_load_w1_byte_u1_p0_imm__vc,
+	arm_instr_load_w1_byte_u1_p0_imm__hi,
+	arm_instr_load_w1_byte_u1_p0_imm__ls,
+	arm_instr_load_w1_byte_u1_p0_imm__ge,
+	arm_instr_load_w1_byte_u1_p0_imm__lt,
+	arm_instr_load_w1_byte_u1_p0_imm__gt,
+	arm_instr_load_w1_byte_u1_p0_imm__le,
+	arm_instr_load_w1_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u0_p1_imm__eq,
+	arm_instr_store_w0_word_u0_p1_imm__ne,
+	arm_instr_store_w0_word_u0_p1_imm__cs,
+	arm_instr_store_w0_word_u0_p1_imm__cc,
+	arm_instr_store_w0_word_u0_p1_imm__mi,
+	arm_instr_store_w0_word_u0_p1_imm__pl,
+	arm_instr_store_w0_word_u0_p1_imm__vs,
+	arm_instr_store_w0_word_u0_p1_imm__vc,
+	arm_instr_store_w0_word_u0_p1_imm__hi,
+	arm_instr_store_w0_word_u0_p1_imm__ls,
+	arm_instr_store_w0_word_u0_p1_imm__ge,
+	arm_instr_store_w0_word_u0_p1_imm__lt,
+	arm_instr_store_w0_word_u0_p1_imm__gt,
+	arm_instr_store_w0_word_u0_p1_imm__le,
+	arm_instr_store_w0_word_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p1_imm__eq,
+	arm_instr_load_w0_word_u0_p1_imm__ne,
+	arm_instr_load_w0_word_u0_p1_imm__cs,
+	arm_instr_load_w0_word_u0_p1_imm__cc,
+	arm_instr_load_w0_word_u0_p1_imm__mi,
+	arm_instr_load_w0_word_u0_p1_imm__pl,
+	arm_instr_load_w0_word_u0_p1_imm__vs,
+	arm_instr_load_w0_word_u0_p1_imm__vc,
+	arm_instr_load_w0_word_u0_p1_imm__hi,
+	arm_instr_load_w0_word_u0_p1_imm__ls,
+	arm_instr_load_w0_word_u0_p1_imm__ge,
+	arm_instr_load_w0_word_u0_p1_imm__lt,
+	arm_instr_load_w0_word_u0_p1_imm__gt,
+	arm_instr_load_w0_word_u0_p1_imm__le,
+	arm_instr_load_w0_word_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p1_imm__eq,
+	arm_instr_store_w1_word_u0_p1_imm__ne,
+	arm_instr_store_w1_word_u0_p1_imm__cs,
+	arm_instr_store_w1_word_u0_p1_imm__cc,
+	arm_instr_store_w1_word_u0_p1_imm__mi,
+	arm_instr_store_w1_word_u0_p1_imm__pl,
+	arm_instr_store_w1_word_u0_p1_imm__vs,
+	arm_instr_store_w1_word_u0_p1_imm__vc,
+	arm_instr_store_w1_word_u0_p1_imm__hi,
+	arm_instr_store_w1_word_u0_p1_imm__ls,
+	arm_instr_store_w1_word_u0_p1_imm__ge,
+	arm_instr_store_w1_word_u0_p1_imm__lt,
+	arm_instr_store_w1_word_u0_p1_imm__gt,
+	arm_instr_store_w1_word_u0_p1_imm__le,
+	arm_instr_store_w1_word_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p1_imm__eq,
+	arm_instr_load_w1_word_u0_p1_imm__ne,
+	arm_instr_load_w1_word_u0_p1_imm__cs,
+	arm_instr_load_w1_word_u0_p1_imm__cc,
+	arm_instr_load_w1_word_u0_p1_imm__mi,
+	arm_instr_load_w1_word_u0_p1_imm__pl,
+	arm_instr_load_w1_word_u0_p1_imm__vs,
+	arm_instr_load_w1_word_u0_p1_imm__vc,
+	arm_instr_load_w1_word_u0_p1_imm__hi,
+	arm_instr_load_w1_word_u0_p1_imm__ls,
+	arm_instr_load_w1_word_u0_p1_imm__ge,
+	arm_instr_load_w1_word_u0_p1_imm__lt,
+	arm_instr_load_w1_word_u0_p1_imm__gt,
+	arm_instr_load_w1_word_u0_p1_imm__le,
+	arm_instr_load_w1_word_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p1_imm__eq,
+	arm_instr_store_w0_byte_u0_p1_imm__ne,
+	arm_instr_store_w0_byte_u0_p1_imm__cs,
+	arm_instr_store_w0_byte_u0_p1_imm__cc,
+	arm_instr_store_w0_byte_u0_p1_imm__mi,
+	arm_instr_store_w0_byte_u0_p1_imm__pl,
+	arm_instr_store_w0_byte_u0_p1_imm__vs,
+	arm_instr_store_w0_byte_u0_p1_imm__vc,
+	arm_instr_store_w0_byte_u0_p1_imm__hi,
+	arm_instr_store_w0_byte_u0_p1_imm__ls,
+	arm_instr_store_w0_byte_u0_p1_imm__ge,
+	arm_instr_store_w0_byte_u0_p1_imm__lt,
+	arm_instr_store_w0_byte_u0_p1_imm__gt,
+	arm_instr_store_w0_byte_u0_p1_imm__le,
+	arm_instr_store_w0_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p1_imm__eq,
+	arm_instr_load_w0_byte_u0_p1_imm__ne,
+	arm_instr_load_w0_byte_u0_p1_imm__cs,
+	arm_instr_load_w0_byte_u0_p1_imm__cc,
+	arm_instr_load_w0_byte_u0_p1_imm__mi,
+	arm_instr_load_w0_byte_u0_p1_imm__pl,
+	arm_instr_load_w0_byte_u0_p1_imm__vs,
+	arm_instr_load_w0_byte_u0_p1_imm__vc,
+	arm_instr_load_w0_byte_u0_p1_imm__hi,
+	arm_instr_load_w0_byte_u0_p1_imm__ls,
+	arm_instr_load_w0_byte_u0_p1_imm__ge,
+	arm_instr_load_w0_byte_u0_p1_imm__lt,
+	arm_instr_load_w0_byte_u0_p1_imm__gt,
+	arm_instr_load_w0_byte_u0_p1_imm__le,
+	arm_instr_load_w0_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p1_imm__eq,
+	arm_instr_store_w1_byte_u0_p1_imm__ne,
+	arm_instr_store_w1_byte_u0_p1_imm__cs,
+	arm_instr_store_w1_byte_u0_p1_imm__cc,
+	arm_instr_store_w1_byte_u0_p1_imm__mi,
+	arm_instr_store_w1_byte_u0_p1_imm__pl,
+	arm_instr_store_w1_byte_u0_p1_imm__vs,
+	arm_instr_store_w1_byte_u0_p1_imm__vc,
+	arm_instr_store_w1_byte_u0_p1_imm__hi,
+	arm_instr_store_w1_byte_u0_p1_imm__ls,
+	arm_instr_store_w1_byte_u0_p1_imm__ge,
+	arm_instr_store_w1_byte_u0_p1_imm__lt,
+	arm_instr_store_w1_byte_u0_p1_imm__gt,
+	arm_instr_store_w1_byte_u0_p1_imm__le,
+	arm_instr_store_w1_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p1_imm__eq,
+	arm_instr_load_w1_byte_u0_p1_imm__ne,
+	arm_instr_load_w1_byte_u0_p1_imm__cs,
+	arm_instr_load_w1_byte_u0_p1_imm__cc,
+	arm_instr_load_w1_byte_u0_p1_imm__mi,
+	arm_instr_load_w1_byte_u0_p1_imm__pl,
+	arm_instr_load_w1_byte_u0_p1_imm__vs,
+	arm_instr_load_w1_byte_u0_p1_imm__vc,
+	arm_instr_load_w1_byte_u0_p1_imm__hi,
+	arm_instr_load_w1_byte_u0_p1_imm__ls,
+	arm_instr_load_w1_byte_u0_p1_imm__ge,
+	arm_instr_load_w1_byte_u0_p1_imm__lt,
+	arm_instr_load_w1_byte_u0_p1_imm__gt,
+	arm_instr_load_w1_byte_u0_p1_imm__le,
+	arm_instr_load_w1_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p1_imm__eq,
+	arm_instr_store_w0_word_u1_p1_imm__ne,
+	arm_instr_store_w0_word_u1_p1_imm__cs,
+	arm_instr_store_w0_word_u1_p1_imm__cc,
+	arm_instr_store_w0_word_u1_p1_imm__mi,
+	arm_instr_store_w0_word_u1_p1_imm__pl,
+	arm_instr_store_w0_word_u1_p1_imm__vs,
+	arm_instr_store_w0_word_u1_p1_imm__vc,
+	arm_instr_store_w0_word_u1_p1_imm__hi,
+	arm_instr_store_w0_word_u1_p1_imm__ls,
+	arm_instr_store_w0_word_u1_p1_imm__ge,
+	arm_instr_store_w0_word_u1_p1_imm__lt,
+	arm_instr_store_w0_word_u1_p1_imm__gt,
+	arm_instr_store_w0_word_u1_p1_imm__le,
+	arm_instr_store_w0_word_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p1_imm__eq,
+	arm_instr_load_w0_word_u1_p1_imm__ne,
+	arm_instr_load_w0_word_u1_p1_imm__cs,
+	arm_instr_load_w0_word_u1_p1_imm__cc,
+	arm_instr_load_w0_word_u1_p1_imm__mi,
+	arm_instr_load_w0_word_u1_p1_imm__pl,
+	arm_instr_load_w0_word_u1_p1_imm__vs,
+	arm_instr_load_w0_word_u1_p1_imm__vc,
+	arm_instr_load_w0_word_u1_p1_imm__hi,
+	arm_instr_load_w0_word_u1_p1_imm__ls,
+	arm_instr_load_w0_word_u1_p1_imm__ge,
+	arm_instr_load_w0_word_u1_p1_imm__lt,
+	arm_instr_load_w0_word_u1_p1_imm__gt,
+	arm_instr_load_w0_word_u1_p1_imm__le,
+	arm_instr_load_w0_word_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p1_imm__eq,
+	arm_instr_store_w1_word_u1_p1_imm__ne,
+	arm_instr_store_w1_word_u1_p1_imm__cs,
+	arm_instr_store_w1_word_u1_p1_imm__cc,
+	arm_instr_store_w1_word_u1_p1_imm__mi,
+	arm_instr_store_w1_word_u1_p1_imm__pl,
+	arm_instr_store_w1_word_u1_p1_imm__vs,
+	arm_instr_store_w1_word_u1_p1_imm__vc,
+	arm_instr_store_w1_word_u1_p1_imm__hi,
+	arm_instr_store_w1_word_u1_p1_imm__ls,
+	arm_instr_store_w1_word_u1_p1_imm__ge,
+	arm_instr_store_w1_word_u1_p1_imm__lt,
+	arm_instr_store_w1_word_u1_p1_imm__gt,
+	arm_instr_store_w1_word_u1_p1_imm__le,
+	arm_instr_store_w1_word_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p1_imm__eq,
+	arm_instr_load_w1_word_u1_p1_imm__ne,
+	arm_instr_load_w1_word_u1_p1_imm__cs,
+	arm_instr_load_w1_word_u1_p1_imm__cc,
+	arm_instr_load_w1_word_u1_p1_imm__mi,
+	arm_instr_load_w1_word_u1_p1_imm__pl,
+	arm_instr_load_w1_word_u1_p1_imm__vs,
+	arm_instr_load_w1_word_u1_p1_imm__vc,
+	arm_instr_load_w1_word_u1_p1_imm__hi,
+	arm_instr_load_w1_word_u1_p1_imm__ls,
+	arm_instr_load_w1_word_u1_p1_imm__ge,
+	arm_instr_load_w1_word_u1_p1_imm__lt,
+	arm_instr_load_w1_word_u1_p1_imm__gt,
+	arm_instr_load_w1_word_u1_p1_imm__le,
+	arm_instr_load_w1_word_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p1_imm__eq,
+	arm_instr_store_w0_byte_u1_p1_imm__ne,
+	arm_instr_store_w0_byte_u1_p1_imm__cs,
+	arm_instr_store_w0_byte_u1_p1_imm__cc,
+	arm_instr_store_w0_byte_u1_p1_imm__mi,
+	arm_instr_store_w0_byte_u1_p1_imm__pl,
+	arm_instr_store_w0_byte_u1_p1_imm__vs,
+	arm_instr_store_w0_byte_u1_p1_imm__vc,
+	arm_instr_store_w0_byte_u1_p1_imm__hi,
+	arm_instr_store_w0_byte_u1_p1_imm__ls,
+	arm_instr_store_w0_byte_u1_p1_imm__ge,
+	arm_instr_store_w0_byte_u1_p1_imm__lt,
+	arm_instr_store_w0_byte_u1_p1_imm__gt,
+	arm_instr_store_w0_byte_u1_p1_imm__le,
+	arm_instr_store_w0_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p1_imm__eq,
+	arm_instr_load_w0_byte_u1_p1_imm__ne,
+	arm_instr_load_w0_byte_u1_p1_imm__cs,
+	arm_instr_load_w0_byte_u1_p1_imm__cc,
+	arm_instr_load_w0_byte_u1_p1_imm__mi,
+	arm_instr_load_w0_byte_u1_p1_imm__pl,
+	arm_instr_load_w0_byte_u1_p1_imm__vs,
+	arm_instr_load_w0_byte_u1_p1_imm__vc,
+	arm_instr_load_w0_byte_u1_p1_imm__hi,
+	arm_instr_load_w0_byte_u1_p1_imm__ls,
+	arm_instr_load_w0_byte_u1_p1_imm__ge,
+	arm_instr_load_w0_byte_u1_p1_imm__lt,
+	arm_instr_load_w0_byte_u1_p1_imm__gt,
+	arm_instr_load_w0_byte_u1_p1_imm__le,
+	arm_instr_load_w0_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p1_imm__eq,
+	arm_instr_store_w1_byte_u1_p1_imm__ne,
+	arm_instr_store_w1_byte_u1_p1_imm__cs,
+	arm_instr_store_w1_byte_u1_p1_imm__cc,
+	arm_instr_store_w1_byte_u1_p1_imm__mi,
+	arm_instr_store_w1_byte_u1_p1_imm__pl,
+	arm_instr_store_w1_byte_u1_p1_imm__vs,
+	arm_instr_store_w1_byte_u1_p1_imm__vc,
+	arm_instr_store_w1_byte_u1_p1_imm__hi,
+	arm_instr_store_w1_byte_u1_p1_imm__ls,
+	arm_instr_store_w1_byte_u1_p1_imm__ge,
+	arm_instr_store_w1_byte_u1_p1_imm__lt,
+	arm_instr_store_w1_byte_u1_p1_imm__gt,
+	arm_instr_store_w1_byte_u1_p1_imm__le,
+	arm_instr_store_w1_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p1_imm__eq,
+	arm_instr_load_w1_byte_u1_p1_imm__ne,
+	arm_instr_load_w1_byte_u1_p1_imm__cs,
+	arm_instr_load_w1_byte_u1_p1_imm__cc,
+	arm_instr_load_w1_byte_u1_p1_imm__mi,
+	arm_instr_load_w1_byte_u1_p1_imm__pl,
+	arm_instr_load_w1_byte_u1_p1_imm__vs,
+	arm_instr_load_w1_byte_u1_p1_imm__vc,
+	arm_instr_load_w1_byte_u1_p1_imm__hi,
+	arm_instr_load_w1_byte_u1_p1_imm__ls,
+	arm_instr_load_w1_byte_u1_p1_imm__ge,
+	arm_instr_load_w1_byte_u1_p1_imm__lt,
+	arm_instr_load_w1_byte_u1_p1_imm__gt,
+	arm_instr_load_w1_byte_u1_p1_imm__le,
+	arm_instr_load_w1_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u0_p0_reg__eq,
+	arm_instr_store_w0_word_u0_p0_reg__ne,
+	arm_instr_store_w0_word_u0_p0_reg__cs,
+	arm_instr_store_w0_word_u0_p0_reg__cc,
+	arm_instr_store_w0_word_u0_p0_reg__mi,
+	arm_instr_store_w0_word_u0_p0_reg__pl,
+	arm_instr_store_w0_word_u0_p0_reg__vs,
+	arm_instr_store_w0_word_u0_p0_reg__vc,
+	arm_instr_store_w0_word_u0_p0_reg__hi,
+	arm_instr_store_w0_word_u0_p0_reg__ls,
+	arm_instr_store_w0_word_u0_p0_reg__ge,
+	arm_instr_store_w0_word_u0_p0_reg__lt,
+	arm_instr_store_w0_word_u0_p0_reg__gt,
+	arm_instr_store_w0_word_u0_p0_reg__le,
+	arm_instr_store_w0_word_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p0_reg__eq,
+	arm_instr_load_w0_word_u0_p0_reg__ne,
+	arm_instr_load_w0_word_u0_p0_reg__cs,
+	arm_instr_load_w0_word_u0_p0_reg__cc,
+	arm_instr_load_w0_word_u0_p0_reg__mi,
+	arm_instr_load_w0_word_u0_p0_reg__pl,
+	arm_instr_load_w0_word_u0_p0_reg__vs,
+	arm_instr_load_w0_word_u0_p0_reg__vc,
+	arm_instr_load_w0_word_u0_p0_reg__hi,
+	arm_instr_load_w0_word_u0_p0_reg__ls,
+	arm_instr_load_w0_word_u0_p0_reg__ge,
+	arm_instr_load_w0_word_u0_p0_reg__lt,
+	arm_instr_load_w0_word_u0_p0_reg__gt,
+	arm_instr_load_w0_word_u0_p0_reg__le,
+	arm_instr_load_w0_word_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p0_reg__eq,
+	arm_instr_store_w1_word_u0_p0_reg__ne,
+	arm_instr_store_w1_word_u0_p0_reg__cs,
+	arm_instr_store_w1_word_u0_p0_reg__cc,
+	arm_instr_store_w1_word_u0_p0_reg__mi,
+	arm_instr_store_w1_word_u0_p0_reg__pl,
+	arm_instr_store_w1_word_u0_p0_reg__vs,
+	arm_instr_store_w1_word_u0_p0_reg__vc,
+	arm_instr_store_w1_word_u0_p0_reg__hi,
+	arm_instr_store_w1_word_u0_p0_reg__ls,
+	arm_instr_store_w1_word_u0_p0_reg__ge,
+	arm_instr_store_w1_word_u0_p0_reg__lt,
+	arm_instr_store_w1_word_u0_p0_reg__gt,
+	arm_instr_store_w1_word_u0_p0_reg__le,
+	arm_instr_store_w1_word_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p0_reg__eq,
+	arm_instr_load_w1_word_u0_p0_reg__ne,
+	arm_instr_load_w1_word_u0_p0_reg__cs,
+	arm_instr_load_w1_word_u0_p0_reg__cc,
+	arm_instr_load_w1_word_u0_p0_reg__mi,
+	arm_instr_load_w1_word_u0_p0_reg__pl,
+	arm_instr_load_w1_word_u0_p0_reg__vs,
+	arm_instr_load_w1_word_u0_p0_reg__vc,
+	arm_instr_load_w1_word_u0_p0_reg__hi,
+	arm_instr_load_w1_word_u0_p0_reg__ls,
+	arm_instr_load_w1_word_u0_p0_reg__ge,
+	arm_instr_load_w1_word_u0_p0_reg__lt,
+	arm_instr_load_w1_word_u0_p0_reg__gt,
+	arm_instr_load_w1_word_u0_p0_reg__le,
+	arm_instr_load_w1_word_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p0_reg__eq,
+	arm_instr_store_w0_byte_u0_p0_reg__ne,
+	arm_instr_store_w0_byte_u0_p0_reg__cs,
+	arm_instr_store_w0_byte_u0_p0_reg__cc,
+	arm_instr_store_w0_byte_u0_p0_reg__mi,
+	arm_instr_store_w0_byte_u0_p0_reg__pl,
+	arm_instr_store_w0_byte_u0_p0_reg__vs,
+	arm_instr_store_w0_byte_u0_p0_reg__vc,
+	arm_instr_store_w0_byte_u0_p0_reg__hi,
+	arm_instr_store_w0_byte_u0_p0_reg__ls,
+	arm_instr_store_w0_byte_u0_p0_reg__ge,
+	arm_instr_store_w0_byte_u0_p0_reg__lt,
+	arm_instr_store_w0_byte_u0_p0_reg__gt,
+	arm_instr_store_w0_byte_u0_p0_reg__le,
+	arm_instr_store_w0_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p0_reg__eq,
+	arm_instr_load_w0_byte_u0_p0_reg__ne,
+	arm_instr_load_w0_byte_u0_p0_reg__cs,
+	arm_instr_load_w0_byte_u0_p0_reg__cc,
+	arm_instr_load_w0_byte_u0_p0_reg__mi,
+	arm_instr_load_w0_byte_u0_p0_reg__pl,
+	arm_instr_load_w0_byte_u0_p0_reg__vs,
+	arm_instr_load_w0_byte_u0_p0_reg__vc,
+	arm_instr_load_w0_byte_u0_p0_reg__hi,
+	arm_instr_load_w0_byte_u0_p0_reg__ls,
+	arm_instr_load_w0_byte_u0_p0_reg__ge,
+	arm_instr_load_w0_byte_u0_p0_reg__lt,
+	arm_instr_load_w0_byte_u0_p0_reg__gt,
+	arm_instr_load_w0_byte_u0_p0_reg__le,
+	arm_instr_load_w0_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p0_reg__eq,
+	arm_instr_store_w1_byte_u0_p0_reg__ne,
+	arm_instr_store_w1_byte_u0_p0_reg__cs,
+	arm_instr_store_w1_byte_u0_p0_reg__cc,
+	arm_instr_store_w1_byte_u0_p0_reg__mi,
+	arm_instr_store_w1_byte_u0_p0_reg__pl,
+	arm_instr_store_w1_byte_u0_p0_reg__vs,
+	arm_instr_store_w1_byte_u0_p0_reg__vc,
+	arm_instr_store_w1_byte_u0_p0_reg__hi,
+	arm_instr_store_w1_byte_u0_p0_reg__ls,
+	arm_instr_store_w1_byte_u0_p0_reg__ge,
+	arm_instr_store_w1_byte_u0_p0_reg__lt,
+	arm_instr_store_w1_byte_u0_p0_reg__gt,
+	arm_instr_store_w1_byte_u0_p0_reg__le,
+	arm_instr_store_w1_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p0_reg__eq,
+	arm_instr_load_w1_byte_u0_p0_reg__ne,
+	arm_instr_load_w1_byte_u0_p0_reg__cs,
+	arm_instr_load_w1_byte_u0_p0_reg__cc,
+	arm_instr_load_w1_byte_u0_p0_reg__mi,
+	arm_instr_load_w1_byte_u0_p0_reg__pl,
+	arm_instr_load_w1_byte_u0_p0_reg__vs,
+	arm_instr_load_w1_byte_u0_p0_reg__vc,
+	arm_instr_load_w1_byte_u0_p0_reg__hi,
+	arm_instr_load_w1_byte_u0_p0_reg__ls,
+	arm_instr_load_w1_byte_u0_p0_reg__ge,
+	arm_instr_load_w1_byte_u0_p0_reg__lt,
+	arm_instr_load_w1_byte_u0_p0_reg__gt,
+	arm_instr_load_w1_byte_u0_p0_reg__le,
+	arm_instr_load_w1_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p0_reg__eq,
+	arm_instr_store_w0_word_u1_p0_reg__ne,
+	arm_instr_store_w0_word_u1_p0_reg__cs,
+	arm_instr_store_w0_word_u1_p0_reg__cc,
+	arm_instr_store_w0_word_u1_p0_reg__mi,
+	arm_instr_store_w0_word_u1_p0_reg__pl,
+	arm_instr_store_w0_word_u1_p0_reg__vs,
+	arm_instr_store_w0_word_u1_p0_reg__vc,
+	arm_instr_store_w0_word_u1_p0_reg__hi,
+	arm_instr_store_w0_word_u1_p0_reg__ls,
+	arm_instr_store_w0_word_u1_p0_reg__ge,
+	arm_instr_store_w0_word_u1_p0_reg__lt,
+	arm_instr_store_w0_word_u1_p0_reg__gt,
+	arm_instr_store_w0_word_u1_p0_reg__le,
+	arm_instr_store_w0_word_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p0_reg__eq,
+	arm_instr_load_w0_word_u1_p0_reg__ne,
+	arm_instr_load_w0_word_u1_p0_reg__cs,
+	arm_instr_load_w0_word_u1_p0_reg__cc,
+	arm_instr_load_w0_word_u1_p0_reg__mi,
+	arm_instr_load_w0_word_u1_p0_reg__pl,
+	arm_instr_load_w0_word_u1_p0_reg__vs,
+	arm_instr_load_w0_word_u1_p0_reg__vc,
+	arm_instr_load_w0_word_u1_p0_reg__hi,
+	arm_instr_load_w0_word_u1_p0_reg__ls,
+	arm_instr_load_w0_word_u1_p0_reg__ge,
+	arm_instr_load_w0_word_u1_p0_reg__lt,
+	arm_instr_load_w0_word_u1_p0_reg__gt,
+	arm_instr_load_w0_word_u1_p0_reg__le,
+	arm_instr_load_w0_word_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p0_reg__eq,
+	arm_instr_store_w1_word_u1_p0_reg__ne,
+	arm_instr_store_w1_word_u1_p0_reg__cs,
+	arm_instr_store_w1_word_u1_p0_reg__cc,
+	arm_instr_store_w1_word_u1_p0_reg__mi,
+	arm_instr_store_w1_word_u1_p0_reg__pl,
+	arm_instr_store_w1_word_u1_p0_reg__vs,
+	arm_instr_store_w1_word_u1_p0_reg__vc,
+	arm_instr_store_w1_word_u1_p0_reg__hi,
+	arm_instr_store_w1_word_u1_p0_reg__ls,
+	arm_instr_store_w1_word_u1_p0_reg__ge,
+	arm_instr_store_w1_word_u1_p0_reg__lt,
+	arm_instr_store_w1_word_u1_p0_reg__gt,
+	arm_instr_store_w1_word_u1_p0_reg__le,
+	arm_instr_store_w1_word_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p0_reg__eq,
+	arm_instr_load_w1_word_u1_p0_reg__ne,
+	arm_instr_load_w1_word_u1_p0_reg__cs,
+	arm_instr_load_w1_word_u1_p0_reg__cc,
+	arm_instr_load_w1_word_u1_p0_reg__mi,
+	arm_instr_load_w1_word_u1_p0_reg__pl,
+	arm_instr_load_w1_word_u1_p0_reg__vs,
+	arm_instr_load_w1_word_u1_p0_reg__vc,
+	arm_instr_load_w1_word_u1_p0_reg__hi,
+	arm_instr_load_w1_word_u1_p0_reg__ls,
+	arm_instr_load_w1_word_u1_p0_reg__ge,
+	arm_instr_load_w1_word_u1_p0_reg__lt,
+	arm_instr_load_w1_word_u1_p0_reg__gt,
+	arm_instr_load_w1_word_u1_p0_reg__le,
+	arm_instr_load_w1_word_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p0_reg__eq,
+	arm_instr_store_w0_byte_u1_p0_reg__ne,
+	arm_instr_store_w0_byte_u1_p0_reg__cs,
+	arm_instr_store_w0_byte_u1_p0_reg__cc,
+	arm_instr_store_w0_byte_u1_p0_reg__mi,
+	arm_instr_store_w0_byte_u1_p0_reg__pl,
+	arm_instr_store_w0_byte_u1_p0_reg__vs,
+	arm_instr_store_w0_byte_u1_p0_reg__vc,
+	arm_instr_store_w0_byte_u1_p0_reg__hi,
+	arm_instr_store_w0_byte_u1_p0_reg__ls,
+	arm_instr_store_w0_byte_u1_p0_reg__ge,
+	arm_instr_store_w0_byte_u1_p0_reg__lt,
+	arm_instr_store_w0_byte_u1_p0_reg__gt,
+	arm_instr_store_w0_byte_u1_p0_reg__le,
+	arm_instr_store_w0_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p0_reg__eq,
+	arm_instr_load_w0_byte_u1_p0_reg__ne,
+	arm_instr_load_w0_byte_u1_p0_reg__cs,
+	arm_instr_load_w0_byte_u1_p0_reg__cc,
+	arm_instr_load_w0_byte_u1_p0_reg__mi,
+	arm_instr_load_w0_byte_u1_p0_reg__pl,
+	arm_instr_load_w0_byte_u1_p0_reg__vs,
+	arm_instr_load_w0_byte_u1_p0_reg__vc,
+	arm_instr_load_w0_byte_u1_p0_reg__hi,
+	arm_instr_load_w0_byte_u1_p0_reg__ls,
+	arm_instr_load_w0_byte_u1_p0_reg__ge,
+	arm_instr_load_w0_byte_u1_p0_reg__lt,
+	arm_instr_load_w0_byte_u1_p0_reg__gt,
+	arm_instr_load_w0_byte_u1_p0_reg__le,
+	arm_instr_load_w0_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p0_reg__eq,
+	arm_instr_store_w1_byte_u1_p0_reg__ne,
+	arm_instr_store_w1_byte_u1_p0_reg__cs,
+	arm_instr_store_w1_byte_u1_p0_reg__cc,
+	arm_instr_store_w1_byte_u1_p0_reg__mi,
+	arm_instr_store_w1_byte_u1_p0_reg__pl,
+	arm_instr_store_w1_byte_u1_p0_reg__vs,
+	arm_instr_store_w1_byte_u1_p0_reg__vc,
+	arm_instr_store_w1_byte_u1_p0_reg__hi,
+	arm_instr_store_w1_byte_u1_p0_reg__ls,
+	arm_instr_store_w1_byte_u1_p0_reg__ge,
+	arm_instr_store_w1_byte_u1_p0_reg__lt,
+	arm_instr_store_w1_byte_u1_p0_reg__gt,
+	arm_instr_store_w1_byte_u1_p0_reg__le,
+	arm_instr_store_w1_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p0_reg__eq,
+	arm_instr_load_w1_byte_u1_p0_reg__ne,
+	arm_instr_load_w1_byte_u1_p0_reg__cs,
+	arm_instr_load_w1_byte_u1_p0_reg__cc,
+	arm_instr_load_w1_byte_u1_p0_reg__mi,
+	arm_instr_load_w1_byte_u1_p0_reg__pl,
+	arm_instr_load_w1_byte_u1_p0_reg__vs,
+	arm_instr_load_w1_byte_u1_p0_reg__vc,
+	arm_instr_load_w1_byte_u1_p0_reg__hi,
+	arm_instr_load_w1_byte_u1_p0_reg__ls,
+	arm_instr_load_w1_byte_u1_p0_reg__ge,
+	arm_instr_load_w1_byte_u1_p0_reg__lt,
+	arm_instr_load_w1_byte_u1_p0_reg__gt,
+	arm_instr_load_w1_byte_u1_p0_reg__le,
+	arm_instr_load_w1_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u0_p1_reg__eq,
+	arm_instr_store_w0_word_u0_p1_reg__ne,
+	arm_instr_store_w0_word_u0_p1_reg__cs,
+	arm_instr_store_w0_word_u0_p1_reg__cc,
+	arm_instr_store_w0_word_u0_p1_reg__mi,
+	arm_instr_store_w0_word_u0_p1_reg__pl,
+	arm_instr_store_w0_word_u0_p1_reg__vs,
+	arm_instr_store_w0_word_u0_p1_reg__vc,
+	arm_instr_store_w0_word_u0_p1_reg__hi,
+	arm_instr_store_w0_word_u0_p1_reg__ls,
+	arm_instr_store_w0_word_u0_p1_reg__ge,
+	arm_instr_store_w0_word_u0_p1_reg__lt,
+	arm_instr_store_w0_word_u0_p1_reg__gt,
+	arm_instr_store_w0_word_u0_p1_reg__le,
+	arm_instr_store_w0_word_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p1_reg__eq,
+	arm_instr_load_w0_word_u0_p1_reg__ne,
+	arm_instr_load_w0_word_u0_p1_reg__cs,
+	arm_instr_load_w0_word_u0_p1_reg__cc,
+	arm_instr_load_w0_word_u0_p1_reg__mi,
+	arm_instr_load_w0_word_u0_p1_reg__pl,
+	arm_instr_load_w0_word_u0_p1_reg__vs,
+	arm_instr_load_w0_word_u0_p1_reg__vc,
+	arm_instr_load_w0_word_u0_p1_reg__hi,
+	arm_instr_load_w0_word_u0_p1_reg__ls,
+	arm_instr_load_w0_word_u0_p1_reg__ge,
+	arm_instr_load_w0_word_u0_p1_reg__lt,
+	arm_instr_load_w0_word_u0_p1_reg__gt,
+	arm_instr_load_w0_word_u0_p1_reg__le,
+	arm_instr_load_w0_word_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p1_reg__eq,
+	arm_instr_store_w1_word_u0_p1_reg__ne,
+	arm_instr_store_w1_word_u0_p1_reg__cs,
+	arm_instr_store_w1_word_u0_p1_reg__cc,
+	arm_instr_store_w1_word_u0_p1_reg__mi,
+	arm_instr_store_w1_word_u0_p1_reg__pl,
+	arm_instr_store_w1_word_u0_p1_reg__vs,
+	arm_instr_store_w1_word_u0_p1_reg__vc,
+	arm_instr_store_w1_word_u0_p1_reg__hi,
+	arm_instr_store_w1_word_u0_p1_reg__ls,
+	arm_instr_store_w1_word_u0_p1_reg__ge,
+	arm_instr_store_w1_word_u0_p1_reg__lt,
+	arm_instr_store_w1_word_u0_p1_reg__gt,
+	arm_instr_store_w1_word_u0_p1_reg__le,
+	arm_instr_store_w1_word_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p1_reg__eq,
+	arm_instr_load_w1_word_u0_p1_reg__ne,
+	arm_instr_load_w1_word_u0_p1_reg__cs,
+	arm_instr_load_w1_word_u0_p1_reg__cc,
+	arm_instr_load_w1_word_u0_p1_reg__mi,
+	arm_instr_load_w1_word_u0_p1_reg__pl,
+	arm_instr_load_w1_word_u0_p1_reg__vs,
+	arm_instr_load_w1_word_u0_p1_reg__vc,
+	arm_instr_load_w1_word_u0_p1_reg__hi,
+	arm_instr_load_w1_word_u0_p1_reg__ls,
+	arm_instr_load_w1_word_u0_p1_reg__ge,
+	arm_instr_load_w1_word_u0_p1_reg__lt,
+	arm_instr_load_w1_word_u0_p1_reg__gt,
+	arm_instr_load_w1_word_u0_p1_reg__le,
+	arm_instr_load_w1_word_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p1_reg__eq,
+	arm_instr_store_w0_byte_u0_p1_reg__ne,
+	arm_instr_store_w0_byte_u0_p1_reg__cs,
+	arm_instr_store_w0_byte_u0_p1_reg__cc,
+	arm_instr_store_w0_byte_u0_p1_reg__mi,
+	arm_instr_store_w0_byte_u0_p1_reg__pl,
+	arm_instr_store_w0_byte_u0_p1_reg__vs,
+	arm_instr_store_w0_byte_u0_p1_reg__vc,
+	arm_instr_store_w0_byte_u0_p1_reg__hi,
+	arm_instr_store_w0_byte_u0_p1_reg__ls,
+	arm_instr_store_w0_byte_u0_p1_reg__ge,
+	arm_instr_store_w0_byte_u0_p1_reg__lt,
+	arm_instr_store_w0_byte_u0_p1_reg__gt,
+	arm_instr_store_w0_byte_u0_p1_reg__le,
+	arm_instr_store_w0_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p1_reg__eq,
+	arm_instr_load_w0_byte_u0_p1_reg__ne,
+	arm_instr_load_w0_byte_u0_p1_reg__cs,
+	arm_instr_load_w0_byte_u0_p1_reg__cc,
+	arm_instr_load_w0_byte_u0_p1_reg__mi,
+	arm_instr_load_w0_byte_u0_p1_reg__pl,
+	arm_instr_load_w0_byte_u0_p1_reg__vs,
+	arm_instr_load_w0_byte_u0_p1_reg__vc,
+	arm_instr_load_w0_byte_u0_p1_reg__hi,
+	arm_instr_load_w0_byte_u0_p1_reg__ls,
+	arm_instr_load_w0_byte_u0_p1_reg__ge,
+	arm_instr_load_w0_byte_u0_p1_reg__lt,
+	arm_instr_load_w0_byte_u0_p1_reg__gt,
+	arm_instr_load_w0_byte_u0_p1_reg__le,
+	arm_instr_load_w0_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p1_reg__eq,
+	arm_instr_store_w1_byte_u0_p1_reg__ne,
+	arm_instr_store_w1_byte_u0_p1_reg__cs,
+	arm_instr_store_w1_byte_u0_p1_reg__cc,
+	arm_instr_store_w1_byte_u0_p1_reg__mi,
+	arm_instr_store_w1_byte_u0_p1_reg__pl,
+	arm_instr_store_w1_byte_u0_p1_reg__vs,
+	arm_instr_store_w1_byte_u0_p1_reg__vc,
+	arm_instr_store_w1_byte_u0_p1_reg__hi,
+	arm_instr_store_w1_byte_u0_p1_reg__ls,
+	arm_instr_store_w1_byte_u0_p1_reg__ge,
+	arm_instr_store_w1_byte_u0_p1_reg__lt,
+	arm_instr_store_w1_byte_u0_p1_reg__gt,
+	arm_instr_store_w1_byte_u0_p1_reg__le,
+	arm_instr_store_w1_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p1_reg__eq,
+	arm_instr_load_w1_byte_u0_p1_reg__ne,
+	arm_instr_load_w1_byte_u0_p1_reg__cs,
+	arm_instr_load_w1_byte_u0_p1_reg__cc,
+	arm_instr_load_w1_byte_u0_p1_reg__mi,
+	arm_instr_load_w1_byte_u0_p1_reg__pl,
+	arm_instr_load_w1_byte_u0_p1_reg__vs,
+	arm_instr_load_w1_byte_u0_p1_reg__vc,
+	arm_instr_load_w1_byte_u0_p1_reg__hi,
+	arm_instr_load_w1_byte_u0_p1_reg__ls,
+	arm_instr_load_w1_byte_u0_p1_reg__ge,
+	arm_instr_load_w1_byte_u0_p1_reg__lt,
+	arm_instr_load_w1_byte_u0_p1_reg__gt,
+	arm_instr_load_w1_byte_u0_p1_reg__le,
+	arm_instr_load_w1_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p1_reg__eq,
+	arm_instr_store_w0_word_u1_p1_reg__ne,
+	arm_instr_store_w0_word_u1_p1_reg__cs,
+	arm_instr_store_w0_word_u1_p1_reg__cc,
+	arm_instr_store_w0_word_u1_p1_reg__mi,
+	arm_instr_store_w0_word_u1_p1_reg__pl,
+	arm_instr_store_w0_word_u1_p1_reg__vs,
+	arm_instr_store_w0_word_u1_p1_reg__vc,
+	arm_instr_store_w0_word_u1_p1_reg__hi,
+	arm_instr_store_w0_word_u1_p1_reg__ls,
+	arm_instr_store_w0_word_u1_p1_reg__ge,
+	arm_instr_store_w0_word_u1_p1_reg__lt,
+	arm_instr_store_w0_word_u1_p1_reg__gt,
+	arm_instr_store_w0_word_u1_p1_reg__le,
+	arm_instr_store_w0_word_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p1_reg__eq,
+	arm_instr_load_w0_word_u1_p1_reg__ne,
+	arm_instr_load_w0_word_u1_p1_reg__cs,
+	arm_instr_load_w0_word_u1_p1_reg__cc,
+	arm_instr_load_w0_word_u1_p1_reg__mi,
+	arm_instr_load_w0_word_u1_p1_reg__pl,
+	arm_instr_load_w0_word_u1_p1_reg__vs,
+	arm_instr_load_w0_word_u1_p1_reg__vc,
+	arm_instr_load_w0_word_u1_p1_reg__hi,
+	arm_instr_load_w0_word_u1_p1_reg__ls,
+	arm_instr_load_w0_word_u1_p1_reg__ge,
+	arm_instr_load_w0_word_u1_p1_reg__lt,
+	arm_instr_load_w0_word_u1_p1_reg__gt,
+	arm_instr_load_w0_word_u1_p1_reg__le,
+	arm_instr_load_w0_word_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p1_reg__eq,
+	arm_instr_store_w1_word_u1_p1_reg__ne,
+	arm_instr_store_w1_word_u1_p1_reg__cs,
+	arm_instr_store_w1_word_u1_p1_reg__cc,
+	arm_instr_store_w1_word_u1_p1_reg__mi,
+	arm_instr_store_w1_word_u1_p1_reg__pl,
+	arm_instr_store_w1_word_u1_p1_reg__vs,
+	arm_instr_store_w1_word_u1_p1_reg__vc,
+	arm_instr_store_w1_word_u1_p1_reg__hi,
+	arm_instr_store_w1_word_u1_p1_reg__ls,
+	arm_instr_store_w1_word_u1_p1_reg__ge,
+	arm_instr_store_w1_word_u1_p1_reg__lt,
+	arm_instr_store_w1_word_u1_p1_reg__gt,
+	arm_instr_store_w1_word_u1_p1_reg__le,
+	arm_instr_store_w1_word_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p1_reg__eq,
+	arm_instr_load_w1_word_u1_p1_reg__ne,
+	arm_instr_load_w1_word_u1_p1_reg__cs,
+	arm_instr_load_w1_word_u1_p1_reg__cc,
+	arm_instr_load_w1_word_u1_p1_reg__mi,
+	arm_instr_load_w1_word_u1_p1_reg__pl,
+	arm_instr_load_w1_word_u1_p1_reg__vs,
+	arm_instr_load_w1_word_u1_p1_reg__vc,
+	arm_instr_load_w1_word_u1_p1_reg__hi,
+	arm_instr_load_w1_word_u1_p1_reg__ls,
+	arm_instr_load_w1_word_u1_p1_reg__ge,
+	arm_instr_load_w1_word_u1_p1_reg__lt,
+	arm_instr_load_w1_word_u1_p1_reg__gt,
+	arm_instr_load_w1_word_u1_p1_reg__le,
+	arm_instr_load_w1_word_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p1_reg__eq,
+	arm_instr_store_w0_byte_u1_p1_reg__ne,
+	arm_instr_store_w0_byte_u1_p1_reg__cs,
+	arm_instr_store_w0_byte_u1_p1_reg__cc,
+	arm_instr_store_w0_byte_u1_p1_reg__mi,
+	arm_instr_store_w0_byte_u1_p1_reg__pl,
+	arm_instr_store_w0_byte_u1_p1_reg__vs,
+	arm_instr_store_w0_byte_u1_p1_reg__vc,
+	arm_instr_store_w0_byte_u1_p1_reg__hi,
+	arm_instr_store_w0_byte_u1_p1_reg__ls,
+	arm_instr_store_w0_byte_u1_p1_reg__ge,
+	arm_instr_store_w0_byte_u1_p1_reg__lt,
+	arm_instr_store_w0_byte_u1_p1_reg__gt,
+	arm_instr_store_w0_byte_u1_p1_reg__le,
+	arm_instr_store_w0_byte_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p1_reg__eq,
+	arm_instr_load_w0_byte_u1_p1_reg__ne,
+	arm_instr_load_w0_byte_u1_p1_reg__cs,
+	arm_instr_load_w0_byte_u1_p1_reg__cc,
+	arm_instr_load_w0_byte_u1_p1_reg__mi,
+	arm_instr_load_w0_byte_u1_p1_reg__pl,
+	arm_instr_load_w0_byte_u1_p1_reg__vs,
+	arm_instr_load_w0_byte_u1_p1_reg__vc,
+	arm_instr_load_w0_byte_u1_p1_reg__hi,
+	arm_instr_load_w0_byte_u1_p1_reg__ls,
+	arm_instr_load_w0_byte_u1_p1_reg__ge,
+	arm_instr_load_w0_byte_u1_p1_reg__lt,
+	arm_instr_load_w0_byte_u1_p1_reg__gt,
+	arm_instr_load_w0_byte_u1_p1_reg__le,
+	arm_instr_load_w0_byte_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p1_reg__eq,
+	arm_instr_store_w1_byte_u1_p1_reg__ne,
+	arm_instr_store_w1_byte_u1_p1_reg__cs,
+	arm_instr_store_w1_byte_u1_p1_reg__cc,
+	arm_instr_store_w1_byte_u1_p1_reg__mi,
+	arm_instr_store_w1_byte_u1_p1_reg__pl,
+	arm_instr_store_w1_byte_u1_p1_reg__vs,
+	arm_instr_store_w1_byte_u1_p1_reg__vc,
+	arm_instr_store_w1_byte_u1_p1_reg__hi,
+	arm_instr_store_w1_byte_u1_p1_reg__ls,
+	arm_instr_store_w1_byte_u1_p1_reg__ge,
+	arm_instr_store_w1_byte_u1_p1_reg__lt,
+	arm_instr_store_w1_byte_u1_p1_reg__gt,
+	arm_instr_store_w1_byte_u1_p1_reg__le,
+	arm_instr_store_w1_byte_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p1_reg__eq,
+	arm_instr_load_w1_byte_u1_p1_reg__ne,
+	arm_instr_load_w1_byte_u1_p1_reg__cs,
+	arm_instr_load_w1_byte_u1_p1_reg__cc,
+	arm_instr_load_w1_byte_u1_p1_reg__mi,
+	arm_instr_load_w1_byte_u1_p1_reg__pl,
+	arm_instr_load_w1_byte_u1_p1_reg__vs,
+	arm_instr_load_w1_byte_u1_p1_reg__vc,
+	arm_instr_load_w1_byte_u1_p1_reg__hi,
+	arm_instr_load_w1_byte_u1_p1_reg__ls,
+	arm_instr_load_w1_byte_u1_p1_reg__ge,
+	arm_instr_load_w1_byte_u1_p1_reg__lt,
+	arm_instr_load_w1_byte_u1_p1_reg__gt,
+	arm_instr_load_w1_byte_u1_p1_reg__le,
+	arm_instr_load_w1_byte_u1_p1_reg,
+	arm_instr_nop
+};
+
+
+	void (*arm_load_store_instr_pc[1024])(struct cpu *,
+		struct arm_instr_call *) = {
+	arm_instr_store_w0_word_u0_p0_imm_pc__eq,
+	arm_instr_store_w0_word_u0_p0_imm_pc__ne,
+	arm_instr_store_w0_word_u0_p0_imm_pc__cs,
+	arm_instr_store_w0_word_u0_p0_imm_pc__cc,
+	arm_instr_store_w0_word_u0_p0_imm_pc__mi,
+	arm_instr_store_w0_word_u0_p0_imm_pc__pl,
+	arm_instr_store_w0_word_u0_p0_imm_pc__vs,
+	arm_instr_store_w0_word_u0_p0_imm_pc__vc,
+	arm_instr_store_w0_word_u0_p0_imm_pc__hi,
+	arm_instr_store_w0_word_u0_p0_imm_pc__ls,
+	arm_instr_store_w0_word_u0_p0_imm_pc__ge,
+	arm_instr_store_w0_word_u0_p0_imm_pc__lt,
+	arm_instr_store_w0_word_u0_p0_imm_pc__gt,
+	arm_instr_store_w0_word_u0_p0_imm_pc__le,
+	arm_instr_store_w0_word_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p0_imm_pc__eq,
+	arm_instr_load_w0_word_u0_p0_imm_pc__ne,
+	arm_instr_load_w0_word_u0_p0_imm_pc__cs,
+	arm_instr_load_w0_word_u0_p0_imm_pc__cc,
+	arm_instr_load_w0_word_u0_p0_imm_pc__mi,
+	arm_instr_load_w0_word_u0_p0_imm_pc__pl,
+	arm_instr_load_w0_word_u0_p0_imm_pc__vs,
+	arm_instr_load_w0_word_u0_p0_imm_pc__vc,
+	arm_instr_load_w0_word_u0_p0_imm_pc__hi,
+	arm_instr_load_w0_word_u0_p0_imm_pc__ls,
+	arm_instr_load_w0_word_u0_p0_imm_pc__ge,
+	arm_instr_load_w0_word_u0_p0_imm_pc__lt,
+	arm_instr_load_w0_word_u0_p0_imm_pc__gt,
+	arm_instr_load_w0_word_u0_p0_imm_pc__le,
+	arm_instr_load_w0_word_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p0_imm_pc__eq,
+	arm_instr_store_w1_word_u0_p0_imm_pc__ne,
+	arm_instr_store_w1_word_u0_p0_imm_pc__cs,
+	arm_instr_store_w1_word_u0_p0_imm_pc__cc,
+	arm_instr_store_w1_word_u0_p0_imm_pc__mi,
+	arm_instr_store_w1_word_u0_p0_imm_pc__pl,
+	arm_instr_store_w1_word_u0_p0_imm_pc__vs,
+	arm_instr_store_w1_word_u0_p0_imm_pc__vc,
+	arm_instr_store_w1_word_u0_p0_imm_pc__hi,
+	arm_instr_store_w1_word_u0_p0_imm_pc__ls,
+	arm_instr_store_w1_word_u0_p0_imm_pc__ge,
+	arm_instr_store_w1_word_u0_p0_imm_pc__lt,
+	arm_instr_store_w1_word_u0_p0_imm_pc__gt,
+	arm_instr_store_w1_word_u0_p0_imm_pc__le,
+	arm_instr_store_w1_word_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p0_imm_pc__eq,
+	arm_instr_load_w1_word_u0_p0_imm_pc__ne,
+	arm_instr_load_w1_word_u0_p0_imm_pc__cs,
+	arm_instr_load_w1_word_u0_p0_imm_pc__cc,
+	arm_instr_load_w1_word_u0_p0_imm_pc__mi,
+	arm_instr_load_w1_word_u0_p0_imm_pc__pl,
+	arm_instr_load_w1_word_u0_p0_imm_pc__vs,
+	arm_instr_load_w1_word_u0_p0_imm_pc__vc,
+	arm_instr_load_w1_word_u0_p0_imm_pc__hi,
+	arm_instr_load_w1_word_u0_p0_imm_pc__ls,
+	arm_instr_load_w1_word_u0_p0_imm_pc__ge,
+	arm_instr_load_w1_word_u0_p0_imm_pc__lt,
+	arm_instr_load_w1_word_u0_p0_imm_pc__gt,
+	arm_instr_load_w1_word_u0_p0_imm_pc__le,
+	arm_instr_load_w1_word_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__eq,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__ne,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__cs,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__cc,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__mi,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__pl,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__vs,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__vc,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__hi,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__ls,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__ge,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__lt,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__gt,
+	arm_instr_store_w0_byte_u0_p0_imm_pc__le,
+	arm_instr_store_w0_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__eq,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__ne,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__cs,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__cc,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__mi,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__pl,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__vs,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__vc,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__hi,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__ls,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__ge,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__lt,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__gt,
+	arm_instr_load_w0_byte_u0_p0_imm_pc__le,
+	arm_instr_load_w0_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__eq,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__ne,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__cs,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__cc,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__mi,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__pl,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__vs,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__vc,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__hi,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__ls,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__ge,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__lt,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__gt,
+	arm_instr_store_w1_byte_u0_p0_imm_pc__le,
+	arm_instr_store_w1_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__eq,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__ne,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__cs,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__cc,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__mi,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__pl,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__vs,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__vc,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__hi,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__ls,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__ge,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__lt,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__gt,
+	arm_instr_load_w1_byte_u0_p0_imm_pc__le,
+	arm_instr_load_w1_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p0_imm_pc__eq,
+	arm_instr_store_w0_word_u1_p0_imm_pc__ne,
+	arm_instr_store_w0_word_u1_p0_imm_pc__cs,
+	arm_instr_store_w0_word_u1_p0_imm_pc__cc,
+	arm_instr_store_w0_word_u1_p0_imm_pc__mi,
+	arm_instr_store_w0_word_u1_p0_imm_pc__pl,
+	arm_instr_store_w0_word_u1_p0_imm_pc__vs,
+	arm_instr_store_w0_word_u1_p0_imm_pc__vc,
+	arm_instr_store_w0_word_u1_p0_imm_pc__hi,
+	arm_instr_store_w0_word_u1_p0_imm_pc__ls,
+	arm_instr_store_w0_word_u1_p0_imm_pc__ge,
+	arm_instr_store_w0_word_u1_p0_imm_pc__lt,
+	arm_instr_store_w0_word_u1_p0_imm_pc__gt,
+	arm_instr_store_w0_word_u1_p0_imm_pc__le,
+	arm_instr_store_w0_word_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p0_imm_pc__eq,
+	arm_instr_load_w0_word_u1_p0_imm_pc__ne,
+	arm_instr_load_w0_word_u1_p0_imm_pc__cs,
+	arm_instr_load_w0_word_u1_p0_imm_pc__cc,
+	arm_instr_load_w0_word_u1_p0_imm_pc__mi,
+	arm_instr_load_w0_word_u1_p0_imm_pc__pl,
+	arm_instr_load_w0_word_u1_p0_imm_pc__vs,
+	arm_instr_load_w0_word_u1_p0_imm_pc__vc,
+	arm_instr_load_w0_word_u1_p0_imm_pc__hi,
+	arm_instr_load_w0_word_u1_p0_imm_pc__ls,
+	arm_instr_load_w0_word_u1_p0_imm_pc__ge,
+	arm_instr_load_w0_word_u1_p0_imm_pc__lt,
+	arm_instr_load_w0_word_u1_p0_imm_pc__gt,
+	arm_instr_load_w0_word_u1_p0_imm_pc__le,
+	arm_instr_load_w0_word_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p0_imm_pc__eq,
+	arm_instr_store_w1_word_u1_p0_imm_pc__ne,
+	arm_instr_store_w1_word_u1_p0_imm_pc__cs,
+	arm_instr_store_w1_word_u1_p0_imm_pc__cc,
+	arm_instr_store_w1_word_u1_p0_imm_pc__mi,
+	arm_instr_store_w1_word_u1_p0_imm_pc__pl,
+	arm_instr_store_w1_word_u1_p0_imm_pc__vs,
+	arm_instr_store_w1_word_u1_p0_imm_pc__vc,
+	arm_instr_store_w1_word_u1_p0_imm_pc__hi,
+	arm_instr_store_w1_word_u1_p0_imm_pc__ls,
+	arm_instr_store_w1_word_u1_p0_imm_pc__ge,
+	arm_instr_store_w1_word_u1_p0_imm_pc__lt,
+	arm_instr_store_w1_word_u1_p0_imm_pc__gt,
+	arm_instr_store_w1_word_u1_p0_imm_pc__le,
+	arm_instr_store_w1_word_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p0_imm_pc__eq,
+	arm_instr_load_w1_word_u1_p0_imm_pc__ne,
+	arm_instr_load_w1_word_u1_p0_imm_pc__cs,
+	arm_instr_load_w1_word_u1_p0_imm_pc__cc,
+	arm_instr_load_w1_word_u1_p0_imm_pc__mi,
+	arm_instr_load_w1_word_u1_p0_imm_pc__pl,
+	arm_instr_load_w1_word_u1_p0_imm_pc__vs,
+	arm_instr_load_w1_word_u1_p0_imm_pc__vc,
+	arm_instr_load_w1_word_u1_p0_imm_pc__hi,
+	arm_instr_load_w1_word_u1_p0_imm_pc__ls,
+	arm_instr_load_w1_word_u1_p0_imm_pc__ge,
+	arm_instr_load_w1_word_u1_p0_imm_pc__lt,
+	arm_instr_load_w1_word_u1_p0_imm_pc__gt,
+	arm_instr_load_w1_word_u1_p0_imm_pc__le,
+	arm_instr_load_w1_word_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__eq,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__ne,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__cs,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__cc,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__mi,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__pl,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__vs,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__vc,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__hi,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__ls,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__ge,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__lt,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__gt,
+	arm_instr_store_w0_byte_u1_p0_imm_pc__le,
+	arm_instr_store_w0_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__eq,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__ne,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__cs,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__cc,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__mi,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__pl,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__vs,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__vc,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__hi,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__ls,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__ge,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__lt,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__gt,
+	arm_instr_load_w0_byte_u1_p0_imm_pc__le,
+	arm_instr_load_w0_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__eq,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__ne,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__cs,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__cc,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__mi,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__pl,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__vs,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__vc,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__hi,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__ls,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__ge,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__lt,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__gt,
+	arm_instr_store_w1_byte_u1_p0_imm_pc__le,
+	arm_instr_store_w1_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__eq,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__ne,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__cs,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__cc,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__mi,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__pl,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__vs,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__vc,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__hi,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__ls,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__ge,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__lt,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__gt,
+	arm_instr_load_w1_byte_u1_p0_imm_pc__le,
+	arm_instr_load_w1_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u0_p1_imm_pc__eq,
+	arm_instr_store_w0_word_u0_p1_imm_pc__ne,
+	arm_instr_store_w0_word_u0_p1_imm_pc__cs,
+	arm_instr_store_w0_word_u0_p1_imm_pc__cc,
+	arm_instr_store_w0_word_u0_p1_imm_pc__mi,
+	arm_instr_store_w0_word_u0_p1_imm_pc__pl,
+	arm_instr_store_w0_word_u0_p1_imm_pc__vs,
+	arm_instr_store_w0_word_u0_p1_imm_pc__vc,
+	arm_instr_store_w0_word_u0_p1_imm_pc__hi,
+	arm_instr_store_w0_word_u0_p1_imm_pc__ls,
+	arm_instr_store_w0_word_u0_p1_imm_pc__ge,
+	arm_instr_store_w0_word_u0_p1_imm_pc__lt,
+	arm_instr_store_w0_word_u0_p1_imm_pc__gt,
+	arm_instr_store_w0_word_u0_p1_imm_pc__le,
+	arm_instr_store_w0_word_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p1_imm_pc__eq,
+	arm_instr_load_w0_word_u0_p1_imm_pc__ne,
+	arm_instr_load_w0_word_u0_p1_imm_pc__cs,
+	arm_instr_load_w0_word_u0_p1_imm_pc__cc,
+	arm_instr_load_w0_word_u0_p1_imm_pc__mi,
+	arm_instr_load_w0_word_u0_p1_imm_pc__pl,
+	arm_instr_load_w0_word_u0_p1_imm_pc__vs,
+	arm_instr_load_w0_word_u0_p1_imm_pc__vc,
+	arm_instr_load_w0_word_u0_p1_imm_pc__hi,
+	arm_instr_load_w0_word_u0_p1_imm_pc__ls,
+	arm_instr_load_w0_word_u0_p1_imm_pc__ge,
+	arm_instr_load_w0_word_u0_p1_imm_pc__lt,
+	arm_instr_load_w0_word_u0_p1_imm_pc__gt,
+	arm_instr_load_w0_word_u0_p1_imm_pc__le,
+	arm_instr_load_w0_word_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p1_imm_pc__eq,
+	arm_instr_store_w1_word_u0_p1_imm_pc__ne,
+	arm_instr_store_w1_word_u0_p1_imm_pc__cs,
+	arm_instr_store_w1_word_u0_p1_imm_pc__cc,
+	arm_instr_store_w1_word_u0_p1_imm_pc__mi,
+	arm_instr_store_w1_word_u0_p1_imm_pc__pl,
+	arm_instr_store_w1_word_u0_p1_imm_pc__vs,
+	arm_instr_store_w1_word_u0_p1_imm_pc__vc,
+	arm_instr_store_w1_word_u0_p1_imm_pc__hi,
+	arm_instr_store_w1_word_u0_p1_imm_pc__ls,
+	arm_instr_store_w1_word_u0_p1_imm_pc__ge,
+	arm_instr_store_w1_word_u0_p1_imm_pc__lt,
+	arm_instr_store_w1_word_u0_p1_imm_pc__gt,
+	arm_instr_store_w1_word_u0_p1_imm_pc__le,
+	arm_instr_store_w1_word_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p1_imm_pc__eq,
+	arm_instr_load_w1_word_u0_p1_imm_pc__ne,
+	arm_instr_load_w1_word_u0_p1_imm_pc__cs,
+	arm_instr_load_w1_word_u0_p1_imm_pc__cc,
+	arm_instr_load_w1_word_u0_p1_imm_pc__mi,
+	arm_instr_load_w1_word_u0_p1_imm_pc__pl,
+	arm_instr_load_w1_word_u0_p1_imm_pc__vs,
+	arm_instr_load_w1_word_u0_p1_imm_pc__vc,
+	arm_instr_load_w1_word_u0_p1_imm_pc__hi,
+	arm_instr_load_w1_word_u0_p1_imm_pc__ls,
+	arm_instr_load_w1_word_u0_p1_imm_pc__ge,
+	arm_instr_load_w1_word_u0_p1_imm_pc__lt,
+	arm_instr_load_w1_word_u0_p1_imm_pc__gt,
+	arm_instr_load_w1_word_u0_p1_imm_pc__le,
+	arm_instr_load_w1_word_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__eq,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__ne,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__cs,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__cc,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__mi,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__pl,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__vs,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__vc,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__hi,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__ls,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__ge,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__lt,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__gt,
+	arm_instr_store_w0_byte_u0_p1_imm_pc__le,
+	arm_instr_store_w0_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__eq,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__ne,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__cs,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__cc,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__mi,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__pl,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__vs,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__vc,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__hi,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__ls,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__ge,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__lt,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__gt,
+	arm_instr_load_w0_byte_u0_p1_imm_pc__le,
+	arm_instr_load_w0_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__eq,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__ne,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__cs,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__cc,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__mi,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__pl,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__vs,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__vc,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__hi,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__ls,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__ge,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__lt,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__gt,
+	arm_instr_store_w1_byte_u0_p1_imm_pc__le,
+	arm_instr_store_w1_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__eq,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__ne,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__cs,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__cc,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__mi,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__pl,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__vs,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__vc,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__hi,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__ls,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__ge,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__lt,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__gt,
+	arm_instr_load_w1_byte_u0_p1_imm_pc__le,
+	arm_instr_load_w1_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p1_imm_pc__eq,
+	arm_instr_store_w0_word_u1_p1_imm_pc__ne,
+	arm_instr_store_w0_word_u1_p1_imm_pc__cs,
+	arm_instr_store_w0_word_u1_p1_imm_pc__cc,
+	arm_instr_store_w0_word_u1_p1_imm_pc__mi,
+	arm_instr_store_w0_word_u1_p1_imm_pc__pl,
+	arm_instr_store_w0_word_u1_p1_imm_pc__vs,
+	arm_instr_store_w0_word_u1_p1_imm_pc__vc,
+	arm_instr_store_w0_word_u1_p1_imm_pc__hi,
+	arm_instr_store_w0_word_u1_p1_imm_pc__ls,
+	arm_instr_store_w0_word_u1_p1_imm_pc__ge,
+	arm_instr_store_w0_word_u1_p1_imm_pc__lt,
+	arm_instr_store_w0_word_u1_p1_imm_pc__gt,
+	arm_instr_store_w0_word_u1_p1_imm_pc__le,
+	arm_instr_store_w0_word_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p1_imm_pc__eq,
+	arm_instr_load_w0_word_u1_p1_imm_pc__ne,
+	arm_instr_load_w0_word_u1_p1_imm_pc__cs,
+	arm_instr_load_w0_word_u1_p1_imm_pc__cc,
+	arm_instr_load_w0_word_u1_p1_imm_pc__mi,
+	arm_instr_load_w0_word_u1_p1_imm_pc__pl,
+	arm_instr_load_w0_word_u1_p1_imm_pc__vs,
+	arm_instr_load_w0_word_u1_p1_imm_pc__vc,
+	arm_instr_load_w0_word_u1_p1_imm_pc__hi,
+	arm_instr_load_w0_word_u1_p1_imm_pc__ls,
+	arm_instr_load_w0_word_u1_p1_imm_pc__ge,
+	arm_instr_load_w0_word_u1_p1_imm_pc__lt,
+	arm_instr_load_w0_word_u1_p1_imm_pc__gt,
+	arm_instr_load_w0_word_u1_p1_imm_pc__le,
+	arm_instr_load_w0_word_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p1_imm_pc__eq,
+	arm_instr_store_w1_word_u1_p1_imm_pc__ne,
+	arm_instr_store_w1_word_u1_p1_imm_pc__cs,
+	arm_instr_store_w1_word_u1_p1_imm_pc__cc,
+	arm_instr_store_w1_word_u1_p1_imm_pc__mi,
+	arm_instr_store_w1_word_u1_p1_imm_pc__pl,
+	arm_instr_store_w1_word_u1_p1_imm_pc__vs,
+	arm_instr_store_w1_word_u1_p1_imm_pc__vc,
+	arm_instr_store_w1_word_u1_p1_imm_pc__hi,
+	arm_instr_store_w1_word_u1_p1_imm_pc__ls,
+	arm_instr_store_w1_word_u1_p1_imm_pc__ge,
+	arm_instr_store_w1_word_u1_p1_imm_pc__lt,
+	arm_instr_store_w1_word_u1_p1_imm_pc__gt,
+	arm_instr_store_w1_word_u1_p1_imm_pc__le,
+	arm_instr_store_w1_word_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p1_imm_pc__eq,
+	arm_instr_load_w1_word_u1_p1_imm_pc__ne,
+	arm_instr_load_w1_word_u1_p1_imm_pc__cs,
+	arm_instr_load_w1_word_u1_p1_imm_pc__cc,
+	arm_instr_load_w1_word_u1_p1_imm_pc__mi,
+	arm_instr_load_w1_word_u1_p1_imm_pc__pl,
+	arm_instr_load_w1_word_u1_p1_imm_pc__vs,
+	arm_instr_load_w1_word_u1_p1_imm_pc__vc,
+	arm_instr_load_w1_word_u1_p1_imm_pc__hi,
+	arm_instr_load_w1_word_u1_p1_imm_pc__ls,
+	arm_instr_load_w1_word_u1_p1_imm_pc__ge,
+	arm_instr_load_w1_word_u1_p1_imm_pc__lt,
+	arm_instr_load_w1_word_u1_p1_imm_pc__gt,
+	arm_instr_load_w1_word_u1_p1_imm_pc__le,
+	arm_instr_load_w1_word_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__eq,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__ne,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__cs,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__cc,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__mi,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__pl,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__vs,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__vc,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__hi,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__ls,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__ge,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__lt,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__gt,
+	arm_instr_store_w0_byte_u1_p1_imm_pc__le,
+	arm_instr_store_w0_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__eq,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__ne,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__cs,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__cc,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__mi,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__pl,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__vs,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__vc,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__hi,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__ls,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__ge,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__lt,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__gt,
+	arm_instr_load_w0_byte_u1_p1_imm_pc__le,
+	arm_instr_load_w0_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__eq,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__ne,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__cs,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__cc,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__mi,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__pl,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__vs,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__vc,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__hi,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__ls,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__ge,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__lt,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__gt,
+	arm_instr_store_w1_byte_u1_p1_imm_pc__le,
+	arm_instr_store_w1_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__eq,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__ne,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__cs,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__cc,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__mi,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__pl,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__vs,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__vc,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__hi,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__ls,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__ge,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__lt,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__gt,
+	arm_instr_load_w1_byte_u1_p1_imm_pc__le,
+	arm_instr_load_w1_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u0_p0_reg_pc__eq,
+	arm_instr_store_w0_word_u0_p0_reg_pc__ne,
+	arm_instr_store_w0_word_u0_p0_reg_pc__cs,
+	arm_instr_store_w0_word_u0_p0_reg_pc__cc,
+	arm_instr_store_w0_word_u0_p0_reg_pc__mi,
+	arm_instr_store_w0_word_u0_p0_reg_pc__pl,
+	arm_instr_store_w0_word_u0_p0_reg_pc__vs,
+	arm_instr_store_w0_word_u0_p0_reg_pc__vc,
+	arm_instr_store_w0_word_u0_p0_reg_pc__hi,
+	arm_instr_store_w0_word_u0_p0_reg_pc__ls,
+	arm_instr_store_w0_word_u0_p0_reg_pc__ge,
+	arm_instr_store_w0_word_u0_p0_reg_pc__lt,
+	arm_instr_store_w0_word_u0_p0_reg_pc__gt,
+	arm_instr_store_w0_word_u0_p0_reg_pc__le,
+	arm_instr_store_w0_word_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p0_reg_pc__eq,
+	arm_instr_load_w0_word_u0_p0_reg_pc__ne,
+	arm_instr_load_w0_word_u0_p0_reg_pc__cs,
+	arm_instr_load_w0_word_u0_p0_reg_pc__cc,
+	arm_instr_load_w0_word_u0_p0_reg_pc__mi,
+	arm_instr_load_w0_word_u0_p0_reg_pc__pl,
+	arm_instr_load_w0_word_u0_p0_reg_pc__vs,
+	arm_instr_load_w0_word_u0_p0_reg_pc__vc,
+	arm_instr_load_w0_word_u0_p0_reg_pc__hi,
+	arm_instr_load_w0_word_u0_p0_reg_pc__ls,
+	arm_instr_load_w0_word_u0_p0_reg_pc__ge,
+	arm_instr_load_w0_word_u0_p0_reg_pc__lt,
+	arm_instr_load_w0_word_u0_p0_reg_pc__gt,
+	arm_instr_load_w0_word_u0_p0_reg_pc__le,
+	arm_instr_load_w0_word_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p0_reg_pc__eq,
+	arm_instr_store_w1_word_u0_p0_reg_pc__ne,
+	arm_instr_store_w1_word_u0_p0_reg_pc__cs,
+	arm_instr_store_w1_word_u0_p0_reg_pc__cc,
+	arm_instr_store_w1_word_u0_p0_reg_pc__mi,
+	arm_instr_store_w1_word_u0_p0_reg_pc__pl,
+	arm_instr_store_w1_word_u0_p0_reg_pc__vs,
+	arm_instr_store_w1_word_u0_p0_reg_pc__vc,
+	arm_instr_store_w1_word_u0_p0_reg_pc__hi,
+	arm_instr_store_w1_word_u0_p0_reg_pc__ls,
+	arm_instr_store_w1_word_u0_p0_reg_pc__ge,
+	arm_instr_store_w1_word_u0_p0_reg_pc__lt,
+	arm_instr_store_w1_word_u0_p0_reg_pc__gt,
+	arm_instr_store_w1_word_u0_p0_reg_pc__le,
+	arm_instr_store_w1_word_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p0_reg_pc__eq,
+	arm_instr_load_w1_word_u0_p0_reg_pc__ne,
+	arm_instr_load_w1_word_u0_p0_reg_pc__cs,
+	arm_instr_load_w1_word_u0_p0_reg_pc__cc,
+	arm_instr_load_w1_word_u0_p0_reg_pc__mi,
+	arm_instr_load_w1_word_u0_p0_reg_pc__pl,
+	arm_instr_load_w1_word_u0_p0_reg_pc__vs,
+	arm_instr_load_w1_word_u0_p0_reg_pc__vc,
+	arm_instr_load_w1_word_u0_p0_reg_pc__hi,
+	arm_instr_load_w1_word_u0_p0_reg_pc__ls,
+	arm_instr_load_w1_word_u0_p0_reg_pc__ge,
+	arm_instr_load_w1_word_u0_p0_reg_pc__lt,
+	arm_instr_load_w1_word_u0_p0_reg_pc__gt,
+	arm_instr_load_w1_word_u0_p0_reg_pc__le,
+	arm_instr_load_w1_word_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__eq,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__ne,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__cs,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__cc,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__mi,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__pl,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__vs,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__vc,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__hi,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__ls,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__ge,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__lt,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__gt,
+	arm_instr_store_w0_byte_u0_p0_reg_pc__le,
+	arm_instr_store_w0_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__eq,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__ne,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__cs,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__cc,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__mi,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__pl,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__vs,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__vc,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__hi,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__ls,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__ge,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__lt,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__gt,
+	arm_instr_load_w0_byte_u0_p0_reg_pc__le,
+	arm_instr_load_w0_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__eq,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__ne,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__cs,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__cc,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__mi,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__pl,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__vs,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__vc,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__hi,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__ls,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__ge,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__lt,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__gt,
+	arm_instr_store_w1_byte_u0_p0_reg_pc__le,
+	arm_instr_store_w1_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__eq,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__ne,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__cs,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__cc,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__mi,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__pl,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__vs,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__vc,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__hi,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__ls,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__ge,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__lt,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__gt,
+	arm_instr_load_w1_byte_u0_p0_reg_pc__le,
+	arm_instr_load_w1_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p0_reg_pc__eq,
+	arm_instr_store_w0_word_u1_p0_reg_pc__ne,
+	arm_instr_store_w0_word_u1_p0_reg_pc__cs,
+	arm_instr_store_w0_word_u1_p0_reg_pc__cc,
+	arm_instr_store_w0_word_u1_p0_reg_pc__mi,
+	arm_instr_store_w0_word_u1_p0_reg_pc__pl,
+	arm_instr_store_w0_word_u1_p0_reg_pc__vs,
+	arm_instr_store_w0_word_u1_p0_reg_pc__vc,
+	arm_instr_store_w0_word_u1_p0_reg_pc__hi,
+	arm_instr_store_w0_word_u1_p0_reg_pc__ls,
+	arm_instr_store_w0_word_u1_p0_reg_pc__ge,
+	arm_instr_store_w0_word_u1_p0_reg_pc__lt,
+	arm_instr_store_w0_word_u1_p0_reg_pc__gt,
+	arm_instr_store_w0_word_u1_p0_reg_pc__le,
+	arm_instr_store_w0_word_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p0_reg_pc__eq,
+	arm_instr_load_w0_word_u1_p0_reg_pc__ne,
+	arm_instr_load_w0_word_u1_p0_reg_pc__cs,
+	arm_instr_load_w0_word_u1_p0_reg_pc__cc,
+	arm_instr_load_w0_word_u1_p0_reg_pc__mi,
+	arm_instr_load_w0_word_u1_p0_reg_pc__pl,
+	arm_instr_load_w0_word_u1_p0_reg_pc__vs,
+	arm_instr_load_w0_word_u1_p0_reg_pc__vc,
+	arm_instr_load_w0_word_u1_p0_reg_pc__hi,
+	arm_instr_load_w0_word_u1_p0_reg_pc__ls,
+	arm_instr_load_w0_word_u1_p0_reg_pc__ge,
+	arm_instr_load_w0_word_u1_p0_reg_pc__lt,
+	arm_instr_load_w0_word_u1_p0_reg_pc__gt,
+	arm_instr_load_w0_word_u1_p0_reg_pc__le,
+	arm_instr_load_w0_word_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p0_reg_pc__eq,
+	arm_instr_store_w1_word_u1_p0_reg_pc__ne,
+	arm_instr_store_w1_word_u1_p0_reg_pc__cs,
+	arm_instr_store_w1_word_u1_p0_reg_pc__cc,
+	arm_instr_store_w1_word_u1_p0_reg_pc__mi,
+	arm_instr_store_w1_word_u1_p0_reg_pc__pl,
+	arm_instr_store_w1_word_u1_p0_reg_pc__vs,
+	arm_instr_store_w1_word_u1_p0_reg_pc__vc,
+	arm_instr_store_w1_word_u1_p0_reg_pc__hi,
+	arm_instr_store_w1_word_u1_p0_reg_pc__ls,
+	arm_instr_store_w1_word_u1_p0_reg_pc__ge,
+	arm_instr_store_w1_word_u1_p0_reg_pc__lt,
+	arm_instr_store_w1_word_u1_p0_reg_pc__gt,
+	arm_instr_store_w1_word_u1_p0_reg_pc__le,
+	arm_instr_store_w1_word_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p0_reg_pc__eq,
+	arm_instr_load_w1_word_u1_p0_reg_pc__ne,
+	arm_instr_load_w1_word_u1_p0_reg_pc__cs,
+	arm_instr_load_w1_word_u1_p0_reg_pc__cc,
+	arm_instr_load_w1_word_u1_p0_reg_pc__mi,
+	arm_instr_load_w1_word_u1_p0_reg_pc__pl,
+	arm_instr_load_w1_word_u1_p0_reg_pc__vs,
+	arm_instr_load_w1_word_u1_p0_reg_pc__vc,
+	arm_instr_load_w1_word_u1_p0_reg_pc__hi,
+	arm_instr_load_w1_word_u1_p0_reg_pc__ls,
+	arm_instr_load_w1_word_u1_p0_reg_pc__ge,
+	arm_instr_load_w1_word_u1_p0_reg_pc__lt,
+	arm_instr_load_w1_word_u1_p0_reg_pc__gt,
+	arm_instr_load_w1_word_u1_p0_reg_pc__le,
+	arm_instr_load_w1_word_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__eq,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__ne,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__cs,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__cc,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__mi,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__pl,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__vs,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__vc,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__hi,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__ls,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__ge,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__lt,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__gt,
+	arm_instr_store_w0_byte_u1_p0_reg_pc__le,
+	arm_instr_store_w0_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__eq,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__ne,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__cs,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__cc,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__mi,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__pl,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__vs,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__vc,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__hi,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__ls,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__ge,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__lt,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__gt,
+	arm_instr_load_w0_byte_u1_p0_reg_pc__le,
+	arm_instr_load_w0_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__eq,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__ne,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__cs,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__cc,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__mi,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__pl,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__vs,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__vc,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__hi,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__ls,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__ge,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__lt,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__gt,
+	arm_instr_store_w1_byte_u1_p0_reg_pc__le,
+	arm_instr_store_w1_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__eq,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__ne,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__cs,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__cc,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__mi,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__pl,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__vs,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__vc,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__hi,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__ls,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__ge,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__lt,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__gt,
+	arm_instr_load_w1_byte_u1_p0_reg_pc__le,
+	arm_instr_load_w1_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u0_p1_reg_pc__eq,
+	arm_instr_store_w0_word_u0_p1_reg_pc__ne,
+	arm_instr_store_w0_word_u0_p1_reg_pc__cs,
+	arm_instr_store_w0_word_u0_p1_reg_pc__cc,
+	arm_instr_store_w0_word_u0_p1_reg_pc__mi,
+	arm_instr_store_w0_word_u0_p1_reg_pc__pl,
+	arm_instr_store_w0_word_u0_p1_reg_pc__vs,
+	arm_instr_store_w0_word_u0_p1_reg_pc__vc,
+	arm_instr_store_w0_word_u0_p1_reg_pc__hi,
+	arm_instr_store_w0_word_u0_p1_reg_pc__ls,
+	arm_instr_store_w0_word_u0_p1_reg_pc__ge,
+	arm_instr_store_w0_word_u0_p1_reg_pc__lt,
+	arm_instr_store_w0_word_u0_p1_reg_pc__gt,
+	arm_instr_store_w0_word_u0_p1_reg_pc__le,
+	arm_instr_store_w0_word_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u0_p1_reg_pc__eq,
+	arm_instr_load_w0_word_u0_p1_reg_pc__ne,
+	arm_instr_load_w0_word_u0_p1_reg_pc__cs,
+	arm_instr_load_w0_word_u0_p1_reg_pc__cc,
+	arm_instr_load_w0_word_u0_p1_reg_pc__mi,
+	arm_instr_load_w0_word_u0_p1_reg_pc__pl,
+	arm_instr_load_w0_word_u0_p1_reg_pc__vs,
+	arm_instr_load_w0_word_u0_p1_reg_pc__vc,
+	arm_instr_load_w0_word_u0_p1_reg_pc__hi,
+	arm_instr_load_w0_word_u0_p1_reg_pc__ls,
+	arm_instr_load_w0_word_u0_p1_reg_pc__ge,
+	arm_instr_load_w0_word_u0_p1_reg_pc__lt,
+	arm_instr_load_w0_word_u0_p1_reg_pc__gt,
+	arm_instr_load_w0_word_u0_p1_reg_pc__le,
+	arm_instr_load_w0_word_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u0_p1_reg_pc__eq,
+	arm_instr_store_w1_word_u0_p1_reg_pc__ne,
+	arm_instr_store_w1_word_u0_p1_reg_pc__cs,
+	arm_instr_store_w1_word_u0_p1_reg_pc__cc,
+	arm_instr_store_w1_word_u0_p1_reg_pc__mi,
+	arm_instr_store_w1_word_u0_p1_reg_pc__pl,
+	arm_instr_store_w1_word_u0_p1_reg_pc__vs,
+	arm_instr_store_w1_word_u0_p1_reg_pc__vc,
+	arm_instr_store_w1_word_u0_p1_reg_pc__hi,
+	arm_instr_store_w1_word_u0_p1_reg_pc__ls,
+	arm_instr_store_w1_word_u0_p1_reg_pc__ge,
+	arm_instr_store_w1_word_u0_p1_reg_pc__lt,
+	arm_instr_store_w1_word_u0_p1_reg_pc__gt,
+	arm_instr_store_w1_word_u0_p1_reg_pc__le,
+	arm_instr_store_w1_word_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u0_p1_reg_pc__eq,
+	arm_instr_load_w1_word_u0_p1_reg_pc__ne,
+	arm_instr_load_w1_word_u0_p1_reg_pc__cs,
+	arm_instr_load_w1_word_u0_p1_reg_pc__cc,
+	arm_instr_load_w1_word_u0_p1_reg_pc__mi,
+	arm_instr_load_w1_word_u0_p1_reg_pc__pl,
+	arm_instr_load_w1_word_u0_p1_reg_pc__vs,
+	arm_instr_load_w1_word_u0_p1_reg_pc__vc,
+	arm_instr_load_w1_word_u0_p1_reg_pc__hi,
+	arm_instr_load_w1_word_u0_p1_reg_pc__ls,
+	arm_instr_load_w1_word_u0_p1_reg_pc__ge,
+	arm_instr_load_w1_word_u0_p1_reg_pc__lt,
+	arm_instr_load_w1_word_u0_p1_reg_pc__gt,
+	arm_instr_load_w1_word_u0_p1_reg_pc__le,
+	arm_instr_load_w1_word_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__eq,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__ne,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__cs,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__cc,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__mi,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__pl,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__vs,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__vc,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__hi,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__ls,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__ge,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__lt,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__gt,
+	arm_instr_store_w0_byte_u0_p1_reg_pc__le,
+	arm_instr_store_w0_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__eq,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__ne,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__cs,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__cc,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__mi,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__pl,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__vs,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__vc,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__hi,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__ls,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__ge,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__lt,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__gt,
+	arm_instr_load_w0_byte_u0_p1_reg_pc__le,
+	arm_instr_load_w0_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__eq,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__ne,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__cs,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__cc,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__mi,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__pl,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__vs,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__vc,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__hi,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__ls,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__ge,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__lt,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__gt,
+	arm_instr_store_w1_byte_u0_p1_reg_pc__le,
+	arm_instr_store_w1_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__eq,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__ne,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__cs,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__cc,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__mi,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__pl,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__vs,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__vc,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__hi,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__ls,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__ge,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__lt,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__gt,
+	arm_instr_load_w1_byte_u0_p1_reg_pc__le,
+	arm_instr_load_w1_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_word_u1_p1_reg_pc__eq,
+	arm_instr_store_w0_word_u1_p1_reg_pc__ne,
+	arm_instr_store_w0_word_u1_p1_reg_pc__cs,
+	arm_instr_store_w0_word_u1_p1_reg_pc__cc,
+	arm_instr_store_w0_word_u1_p1_reg_pc__mi,
+	arm_instr_store_w0_word_u1_p1_reg_pc__pl,
+	arm_instr_store_w0_word_u1_p1_reg_pc__vs,
+	arm_instr_store_w0_word_u1_p1_reg_pc__vc,
+	arm_instr_store_w0_word_u1_p1_reg_pc__hi,
+	arm_instr_store_w0_word_u1_p1_reg_pc__ls,
+	arm_instr_store_w0_word_u1_p1_reg_pc__ge,
+	arm_instr_store_w0_word_u1_p1_reg_pc__lt,
+	arm_instr_store_w0_word_u1_p1_reg_pc__gt,
+	arm_instr_store_w0_word_u1_p1_reg_pc__le,
+	arm_instr_store_w0_word_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_word_u1_p1_reg_pc__eq,
+	arm_instr_load_w0_word_u1_p1_reg_pc__ne,
+	arm_instr_load_w0_word_u1_p1_reg_pc__cs,
+	arm_instr_load_w0_word_u1_p1_reg_pc__cc,
+	arm_instr_load_w0_word_u1_p1_reg_pc__mi,
+	arm_instr_load_w0_word_u1_p1_reg_pc__pl,
+	arm_instr_load_w0_word_u1_p1_reg_pc__vs,
+	arm_instr_load_w0_word_u1_p1_reg_pc__vc,
+	arm_instr_load_w0_word_u1_p1_reg_pc__hi,
+	arm_instr_load_w0_word_u1_p1_reg_pc__ls,
+	arm_instr_load_w0_word_u1_p1_reg_pc__ge,
+	arm_instr_load_w0_word_u1_p1_reg_pc__lt,
+	arm_instr_load_w0_word_u1_p1_reg_pc__gt,
+	arm_instr_load_w0_word_u1_p1_reg_pc__le,
+	arm_instr_load_w0_word_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_word_u1_p1_reg_pc__eq,
+	arm_instr_store_w1_word_u1_p1_reg_pc__ne,
+	arm_instr_store_w1_word_u1_p1_reg_pc__cs,
+	arm_instr_store_w1_word_u1_p1_reg_pc__cc,
+	arm_instr_store_w1_word_u1_p1_reg_pc__mi,
+	arm_instr_store_w1_word_u1_p1_reg_pc__pl,
+	arm_instr_store_w1_word_u1_p1_reg_pc__vs,
+	arm_instr_store_w1_word_u1_p1_reg_pc__vc,
+	arm_instr_store_w1_word_u1_p1_reg_pc__hi,
+	arm_instr_store_w1_word_u1_p1_reg_pc__ls,
+	arm_instr_store_w1_word_u1_p1_reg_pc__ge,
+	arm_instr_store_w1_word_u1_p1_reg_pc__lt,
+	arm_instr_store_w1_word_u1_p1_reg_pc__gt,
+	arm_instr_store_w1_word_u1_p1_reg_pc__le,
+	arm_instr_store_w1_word_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_word_u1_p1_reg_pc__eq,
+	arm_instr_load_w1_word_u1_p1_reg_pc__ne,
+	arm_instr_load_w1_word_u1_p1_reg_pc__cs,
+	arm_instr_load_w1_word_u1_p1_reg_pc__cc,
+	arm_instr_load_w1_word_u1_p1_reg_pc__mi,
+	arm_instr_load_w1_word_u1_p1_reg_pc__pl,
+	arm_instr_load_w1_word_u1_p1_reg_pc__vs,
+	arm_instr_load_w1_word_u1_p1_reg_pc__vc,
+	arm_instr_load_w1_word_u1_p1_reg_pc__hi,
+	arm_instr_load_w1_word_u1_p1_reg_pc__ls,
+	arm_instr_load_w1_word_u1_p1_reg_pc__ge,
+	arm_instr_load_w1_word_u1_p1_reg_pc__lt,
+	arm_instr_load_w1_word_u1_p1_reg_pc__gt,
+	arm_instr_load_w1_word_u1_p1_reg_pc__le,
+	arm_instr_load_w1_word_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__eq,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__ne,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__cs,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__cc,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__mi,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__pl,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__vs,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__vc,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__hi,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__ls,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__ge,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__lt,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__gt,
+	arm_instr_store_w0_byte_u1_p1_reg_pc__le,
+	arm_instr_store_w0_byte_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__eq,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__ne,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__cs,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__cc,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__mi,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__pl,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__vs,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__vc,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__hi,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__ls,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__ge,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__lt,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__gt,
+	arm_instr_load_w0_byte_u1_p1_reg_pc__le,
+	arm_instr_load_w0_byte_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__eq,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__ne,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__cs,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__cc,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__mi,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__pl,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__vs,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__vc,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__hi,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__ls,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__ge,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__lt,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__gt,
+	arm_instr_store_w1_byte_u1_p1_reg_pc__le,
+	arm_instr_store_w1_byte_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__eq,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__ne,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__cs,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__cc,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__mi,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__pl,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__vs,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__vc,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__hi,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__ls,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__ge,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__lt,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__gt,
+	arm_instr_load_w1_byte_u1_p1_reg_pc__le,
+	arm_instr_load_w1_byte_u1_p1_reg_pc,
+	arm_instr_nop
+};
+
+void arm_instr_store_w0_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_imm_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p0_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u0_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_byte_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w0_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w0_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_store_w1_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg(struct cpu *, struct arm_instr_call *);
+void arm_instr_load_w1_signed_halfword_u1_p1_reg_pc(struct cpu *, struct arm_instr_call *);
+
+	void (*arm_load_store_instr_3[2048])(struct cpu *,
+		struct arm_instr_call *) = {
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__eq,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__ne,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__cs,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__cc,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__mi,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__pl,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__vs,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__vc,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__hi,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__ls,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__ge,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__lt,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__gt,
+	arm_instr_store_w0_signed_byte_u0_p0_imm__le,
+	arm_instr_store_w0_signed_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__eq,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__ne,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__cs,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__cc,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__mi,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__pl,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__vs,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__vc,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__hi,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__ls,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__ge,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__lt,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__gt,
+	arm_instr_load_w0_signed_byte_u0_p0_imm__le,
+	arm_instr_load_w0_signed_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__eq,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__ne,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__cs,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__cc,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__mi,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__pl,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__vs,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__vc,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__hi,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__ls,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__ge,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__lt,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__gt,
+	arm_instr_store_w1_signed_byte_u0_p0_imm__le,
+	arm_instr_store_w1_signed_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__eq,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__ne,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__cs,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__cc,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__mi,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__pl,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__vs,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__vc,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__hi,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__ls,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__ge,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__lt,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__gt,
+	arm_instr_load_w1_signed_byte_u0_p0_imm__le,
+	arm_instr_load_w1_signed_byte_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__eq,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__ne,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__cs,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__cc,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__mi,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__pl,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__vs,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__vc,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__hi,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__ls,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__ge,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__lt,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__gt,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm__le,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__eq,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__ne,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__cs,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__cc,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__mi,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__pl,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__vs,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__vc,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__hi,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__ls,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__ge,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__lt,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__gt,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm__le,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__eq,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__ne,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__cs,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__cc,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__mi,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__pl,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__vs,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__vc,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__hi,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__ls,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__ge,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__lt,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__gt,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm__le,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__eq,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__ne,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__cs,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__cc,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__mi,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__pl,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__vs,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__vc,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__hi,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__ls,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__ge,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__lt,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__gt,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm__le,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__eq,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__ne,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__cs,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__cc,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__mi,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__pl,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__vs,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__vc,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__hi,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__ls,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__ge,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__lt,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__gt,
+	arm_instr_store_w0_signed_byte_u1_p0_imm__le,
+	arm_instr_store_w0_signed_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__eq,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__ne,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__cs,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__cc,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__mi,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__pl,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__vs,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__vc,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__hi,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__ls,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__ge,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__lt,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__gt,
+	arm_instr_load_w0_signed_byte_u1_p0_imm__le,
+	arm_instr_load_w0_signed_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__eq,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__ne,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__cs,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__cc,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__mi,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__pl,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__vs,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__vc,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__hi,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__ls,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__ge,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__lt,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__gt,
+	arm_instr_store_w1_signed_byte_u1_p0_imm__le,
+	arm_instr_store_w1_signed_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__eq,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__ne,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__cs,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__cc,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__mi,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__pl,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__vs,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__vc,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__hi,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__ls,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__ge,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__lt,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__gt,
+	arm_instr_load_w1_signed_byte_u1_p0_imm__le,
+	arm_instr_load_w1_signed_byte_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__eq,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__ne,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__cs,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__cc,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__mi,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__pl,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__vs,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__vc,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__hi,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__ls,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__ge,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__lt,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__gt,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm__le,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__eq,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__ne,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__cs,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__cc,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__mi,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__pl,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__vs,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__vc,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__hi,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__ls,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__ge,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__lt,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__gt,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm__le,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__eq,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__ne,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__cs,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__cc,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__mi,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__pl,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__vs,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__vc,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__hi,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__ls,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__ge,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__lt,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__gt,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm__le,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__eq,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__ne,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__cs,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__cc,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__mi,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__pl,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__vs,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__vc,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__hi,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__ls,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__ge,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__lt,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__gt,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm__le,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__eq,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__ne,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__cs,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__cc,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__mi,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__pl,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__vs,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__vc,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__hi,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__ls,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__ge,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__lt,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__gt,
+	arm_instr_store_w0_signed_byte_u0_p1_imm__le,
+	arm_instr_store_w0_signed_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__eq,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__ne,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__cs,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__cc,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__mi,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__pl,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__vs,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__vc,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__hi,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__ls,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__ge,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__lt,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__gt,
+	arm_instr_load_w0_signed_byte_u0_p1_imm__le,
+	arm_instr_load_w0_signed_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__eq,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__ne,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__cs,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__cc,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__mi,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__pl,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__vs,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__vc,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__hi,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__ls,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__ge,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__lt,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__gt,
+	arm_instr_store_w1_signed_byte_u0_p1_imm__le,
+	arm_instr_store_w1_signed_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__eq,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__ne,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__cs,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__cc,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__mi,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__pl,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__vs,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__vc,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__hi,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__ls,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__ge,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__lt,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__gt,
+	arm_instr_load_w1_signed_byte_u0_p1_imm__le,
+	arm_instr_load_w1_signed_byte_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__eq,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__ne,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__cs,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__cc,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__mi,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__pl,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__vs,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__vc,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__hi,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__ls,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__ge,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__lt,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__gt,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm__le,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__eq,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__ne,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__cs,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__cc,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__mi,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__pl,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__vs,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__vc,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__hi,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__ls,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__ge,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__lt,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__gt,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm__le,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__eq,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__ne,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__cs,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__cc,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__mi,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__pl,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__vs,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__vc,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__hi,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__ls,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__ge,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__lt,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__gt,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm__le,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__eq,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__ne,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__cs,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__cc,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__mi,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__pl,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__vs,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__vc,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__hi,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__ls,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__ge,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__lt,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__gt,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm__le,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__eq,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__ne,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__cs,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__cc,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__mi,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__pl,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__vs,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__vc,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__hi,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__ls,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__ge,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__lt,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__gt,
+	arm_instr_store_w0_signed_byte_u1_p1_imm__le,
+	arm_instr_store_w0_signed_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__eq,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__ne,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__cs,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__cc,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__mi,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__pl,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__vs,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__vc,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__hi,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__ls,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__ge,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__lt,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__gt,
+	arm_instr_load_w0_signed_byte_u1_p1_imm__le,
+	arm_instr_load_w0_signed_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__eq,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__ne,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__cs,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__cc,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__mi,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__pl,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__vs,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__vc,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__hi,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__ls,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__ge,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__lt,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__gt,
+	arm_instr_store_w1_signed_byte_u1_p1_imm__le,
+	arm_instr_store_w1_signed_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__eq,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__ne,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__cs,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__cc,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__mi,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__pl,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__vs,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__vc,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__hi,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__ls,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__ge,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__lt,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__gt,
+	arm_instr_load_w1_signed_byte_u1_p1_imm__le,
+	arm_instr_load_w1_signed_byte_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__eq,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__ne,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__cs,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__cc,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__mi,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__pl,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__vs,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__vc,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__hi,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__ls,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__ge,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__lt,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__gt,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm__le,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__eq,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__ne,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__cs,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__cc,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__mi,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__pl,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__vs,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__vc,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__hi,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__ls,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__ge,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__lt,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__gt,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm__le,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__eq,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__ne,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__cs,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__cc,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__mi,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__pl,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__vs,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__vc,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__hi,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__ls,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__ge,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__lt,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__gt,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm__le,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__eq,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__ne,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__cs,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__cc,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__mi,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__pl,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__vs,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__vc,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__hi,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__ls,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__ge,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__lt,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__gt,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm__le,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__eq,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__ne,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__cs,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__cc,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__mi,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__pl,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__vs,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__vc,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__hi,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__ls,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__ge,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__lt,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__gt,
+	arm_instr_store_w0_signed_byte_u0_p0_reg__le,
+	arm_instr_store_w0_signed_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__eq,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__ne,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__cs,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__cc,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__mi,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__pl,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__vs,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__vc,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__hi,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__ls,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__ge,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__lt,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__gt,
+	arm_instr_load_w0_signed_byte_u0_p0_reg__le,
+	arm_instr_load_w0_signed_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__eq,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__ne,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__cs,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__cc,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__mi,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__pl,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__vs,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__vc,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__hi,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__ls,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__ge,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__lt,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__gt,
+	arm_instr_store_w1_signed_byte_u0_p0_reg__le,
+	arm_instr_store_w1_signed_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__eq,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__ne,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__cs,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__cc,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__mi,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__pl,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__vs,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__vc,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__hi,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__ls,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__ge,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__lt,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__gt,
+	arm_instr_load_w1_signed_byte_u0_p0_reg__le,
+	arm_instr_load_w1_signed_byte_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__eq,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__ne,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__cs,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__cc,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__mi,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__pl,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__vs,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__vc,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__hi,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__ls,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__ge,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__lt,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__gt,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg__le,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__eq,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__ne,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__cs,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__cc,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__mi,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__pl,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__vs,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__vc,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__hi,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__ls,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__ge,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__lt,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__gt,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg__le,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__eq,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__ne,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__cs,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__cc,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__mi,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__pl,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__vs,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__vc,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__hi,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__ls,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__ge,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__lt,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__gt,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg__le,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__eq,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__ne,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__cs,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__cc,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__mi,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__pl,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__vs,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__vc,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__hi,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__ls,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__ge,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__lt,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__gt,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg__le,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__eq,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__ne,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__cs,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__cc,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__mi,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__pl,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__vs,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__vc,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__hi,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__ls,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__ge,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__lt,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__gt,
+	arm_instr_store_w0_signed_byte_u1_p0_reg__le,
+	arm_instr_store_w0_signed_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__eq,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__ne,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__cs,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__cc,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__mi,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__pl,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__vs,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__vc,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__hi,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__ls,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__ge,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__lt,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__gt,
+	arm_instr_load_w0_signed_byte_u1_p0_reg__le,
+	arm_instr_load_w0_signed_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__eq,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__ne,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__cs,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__cc,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__mi,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__pl,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__vs,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__vc,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__hi,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__ls,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__ge,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__lt,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__gt,
+	arm_instr_store_w1_signed_byte_u1_p0_reg__le,
+	arm_instr_store_w1_signed_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__eq,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__ne,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__cs,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__cc,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__mi,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__pl,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__vs,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__vc,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__hi,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__ls,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__ge,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__lt,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__gt,
+	arm_instr_load_w1_signed_byte_u1_p0_reg__le,
+	arm_instr_load_w1_signed_byte_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__eq,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__ne,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__cs,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__cc,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__mi,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__pl,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__vs,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__vc,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__hi,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__ls,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__ge,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__lt,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__gt,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg__le,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__eq,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__ne,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__cs,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__cc,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__mi,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__pl,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__vs,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__vc,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__hi,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__ls,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__ge,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__lt,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__gt,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg__le,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__eq,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__ne,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__cs,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__cc,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__mi,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__pl,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__vs,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__vc,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__hi,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__ls,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__ge,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__lt,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__gt,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg__le,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__eq,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__ne,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__cs,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__cc,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__mi,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__pl,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__vs,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__vc,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__hi,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__ls,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__ge,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__lt,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__gt,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg__le,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__eq,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__ne,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__cs,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__cc,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__mi,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__pl,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__vs,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__vc,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__hi,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__ls,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__ge,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__lt,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__gt,
+	arm_instr_store_w0_signed_byte_u0_p1_reg__le,
+	arm_instr_store_w0_signed_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__eq,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__ne,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__cs,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__cc,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__mi,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__pl,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__vs,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__vc,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__hi,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__ls,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__ge,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__lt,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__gt,
+	arm_instr_load_w0_signed_byte_u0_p1_reg__le,
+	arm_instr_load_w0_signed_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__eq,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__ne,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__cs,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__cc,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__mi,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__pl,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__vs,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__vc,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__hi,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__ls,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__ge,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__lt,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__gt,
+	arm_instr_store_w1_signed_byte_u0_p1_reg__le,
+	arm_instr_store_w1_signed_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__eq,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__ne,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__cs,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__cc,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__mi,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__pl,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__vs,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__vc,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__hi,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__ls,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__ge,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__lt,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__gt,
+	arm_instr_load_w1_signed_byte_u0_p1_reg__le,
+	arm_instr_load_w1_signed_byte_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__eq,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__ne,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__cs,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__cc,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__mi,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__pl,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__vs,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__vc,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__hi,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__ls,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__ge,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__lt,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__gt,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg__le,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__eq,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__ne,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__cs,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__cc,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__mi,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__pl,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__vs,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__vc,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__hi,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__ls,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__ge,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__lt,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__gt,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg__le,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__eq,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__ne,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__cs,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__cc,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__mi,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__pl,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__vs,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__vc,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__hi,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__ls,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__ge,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__lt,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__gt,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg__le,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__eq,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__ne,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__cs,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__cc,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__mi,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__pl,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__vs,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__vc,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__hi,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__ls,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__ge,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__lt,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__gt,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg__le,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__eq,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__ne,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__cs,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__cc,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__mi,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__pl,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__vs,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__vc,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__hi,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__ls,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__ge,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__lt,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__gt,
+	arm_instr_store_w0_signed_byte_u1_p1_reg__le,
+	arm_instr_store_w0_signed_byte_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__eq,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__ne,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__cs,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__cc,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__mi,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__pl,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__vs,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__vc,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__hi,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__ls,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__ge,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__lt,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__gt,
+	arm_instr_load_w0_signed_byte_u1_p1_reg__le,
+	arm_instr_load_w0_signed_byte_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__eq,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__ne,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__cs,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__cc,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__mi,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__pl,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__vs,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__vc,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__hi,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__ls,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__ge,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__lt,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__gt,
+	arm_instr_store_w1_signed_byte_u1_p1_reg__le,
+	arm_instr_store_w1_signed_byte_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__eq,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__ne,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__cs,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__cc,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__mi,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__pl,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__vs,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__vc,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__hi,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__ls,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__ge,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__lt,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__gt,
+	arm_instr_load_w1_signed_byte_u1_p1_reg__le,
+	arm_instr_load_w1_signed_byte_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__eq,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__ne,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__cs,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__cc,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__mi,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__pl,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__vs,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__vc,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__hi,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__ls,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__ge,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__lt,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__gt,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg__le,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__eq,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__ne,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__cs,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__cc,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__mi,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__pl,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__vs,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__vc,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__hi,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__ls,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__ge,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__lt,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__gt,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg__le,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__eq,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__ne,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__cs,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__cc,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__mi,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__pl,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__vs,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__vc,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__hi,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__ls,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__ge,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__lt,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__gt,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg__le,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__eq,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__ne,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__cs,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__cc,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__mi,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__pl,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__vs,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__vc,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__hi,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__ls,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__ge,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__lt,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__gt,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg__le,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg,
+	arm_instr_nop
+};
+
+
+	void (*arm_load_store_instr_3_pc[2048])(struct cpu *,
+		struct arm_instr_call *) = {
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__eq,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ne,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cs,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cc,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__mi,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__pl,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vs,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vc,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__hi,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ls,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ge,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__lt,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__gt,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc__le,
+	arm_instr_store_w0_signed_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__eq,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ne,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cs,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cc,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__mi,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__pl,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vs,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vc,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__hi,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ls,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ge,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__lt,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__gt,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc__le,
+	arm_instr_load_w0_signed_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__eq,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ne,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cs,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cc,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__mi,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__pl,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vs,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vc,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__hi,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ls,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ge,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__lt,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__gt,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc__le,
+	arm_instr_store_w1_signed_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__eq,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ne,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cs,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cc,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__mi,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__pl,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vs,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vc,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__hi,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ls,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ge,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__lt,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__gt,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc__le,
+	arm_instr_load_w1_signed_byte_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__eq,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ne,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cs,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cc,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__mi,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__pl,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vs,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vc,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__hi,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ls,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ge,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__lt,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__gt,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__le,
+	arm_instr_store_w0_signed_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__eq,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ne,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cs,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cc,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__mi,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__pl,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vs,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vc,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__hi,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ls,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ge,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__lt,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__gt,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__le,
+	arm_instr_load_w0_signed_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__eq,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ne,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cs,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cc,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__mi,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__pl,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vs,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vc,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__hi,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ls,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ge,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__lt,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__gt,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__le,
+	arm_instr_store_w1_signed_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__eq,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ne,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cs,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cc,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__mi,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__pl,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vs,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vc,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__hi,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ls,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ge,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__lt,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__gt,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__le,
+	arm_instr_load_w1_signed_halfword_u0_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le,
+	arm_instr_store_w0_signed_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le,
+	arm_instr_load_w0_signed_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__eq,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ne,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cs,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cc,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__mi,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__pl,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vs,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vc,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__hi,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ls,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ge,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__lt,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__gt,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc__le,
+	arm_instr_store_w1_signed_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__eq,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ne,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cs,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cc,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__mi,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__pl,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vs,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vc,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__hi,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ls,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ge,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__lt,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__gt,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc__le,
+	arm_instr_load_w1_signed_byte_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le,
+	arm_instr_store_w0_signed_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le,
+	arm_instr_load_w0_signed_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__eq,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ne,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cs,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cc,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__mi,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__pl,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vs,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vc,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__hi,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ls,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ge,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__lt,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__gt,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__le,
+	arm_instr_store_w1_signed_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__eq,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ne,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cs,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cc,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__mi,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__pl,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vs,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vc,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__hi,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ls,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ge,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__lt,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__gt,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__le,
+	arm_instr_load_w1_signed_halfword_u1_p0_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__eq,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ne,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cs,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cc,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__mi,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__pl,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vs,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vc,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__hi,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ls,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ge,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__lt,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__gt,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc__le,
+	arm_instr_store_w0_signed_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__eq,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ne,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cs,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cc,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__mi,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__pl,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vs,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vc,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__hi,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ls,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ge,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__lt,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__gt,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc__le,
+	arm_instr_load_w0_signed_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__eq,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ne,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cs,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cc,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__mi,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__pl,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vs,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vc,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__hi,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ls,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ge,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__lt,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__gt,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc__le,
+	arm_instr_store_w1_signed_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__eq,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ne,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cs,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cc,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__mi,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__pl,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vs,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vc,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__hi,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ls,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ge,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__lt,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__gt,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc__le,
+	arm_instr_load_w1_signed_byte_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__eq,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ne,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cs,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cc,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__mi,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__pl,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vs,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vc,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__hi,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ls,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ge,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__lt,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__gt,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__le,
+	arm_instr_store_w0_signed_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__eq,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ne,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cs,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cc,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__mi,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__pl,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vs,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vc,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__hi,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ls,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ge,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__lt,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__gt,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__le,
+	arm_instr_load_w0_signed_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__eq,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ne,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cs,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cc,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__mi,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__pl,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vs,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vc,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__hi,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ls,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ge,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__lt,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__gt,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__le,
+	arm_instr_store_w1_signed_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__eq,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ne,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cs,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cc,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__mi,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__pl,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vs,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vc,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__hi,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ls,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ge,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__lt,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__gt,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__le,
+	arm_instr_load_w1_signed_halfword_u0_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__eq,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ne,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cs,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cc,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__mi,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__pl,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vs,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vc,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__hi,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ls,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ge,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__lt,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__gt,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc__le,
+	arm_instr_store_w0_signed_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__eq,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ne,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cs,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cc,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__mi,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__pl,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vs,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vc,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__hi,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ls,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ge,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__lt,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__gt,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc__le,
+	arm_instr_load_w0_signed_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le,
+	arm_instr_store_w1_signed_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le,
+	arm_instr_load_w1_signed_byte_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__eq,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ne,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cs,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cc,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__mi,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__pl,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vs,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vc,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__hi,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ls,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ge,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__lt,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__gt,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__le,
+	arm_instr_store_w0_signed_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__eq,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ne,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cs,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cc,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__mi,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__pl,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vs,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vc,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__hi,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ls,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ge,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__lt,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__gt,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__le,
+	arm_instr_load_w0_signed_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le,
+	arm_instr_store_w1_signed_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le,
+	arm_instr_load_w1_signed_halfword_u1_p1_imm_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__eq,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ne,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cs,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cc,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__mi,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__pl,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vs,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vc,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__hi,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ls,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ge,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__lt,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__gt,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc__le,
+	arm_instr_store_w0_signed_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__eq,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ne,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cs,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cc,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__mi,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__pl,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vs,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vc,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__hi,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ls,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ge,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__lt,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__gt,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc__le,
+	arm_instr_load_w0_signed_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__eq,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ne,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cs,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cc,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__mi,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__pl,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vs,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vc,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__hi,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ls,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ge,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__lt,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__gt,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc__le,
+	arm_instr_store_w1_signed_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__eq,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ne,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cs,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cc,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__mi,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__pl,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vs,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vc,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__hi,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ls,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ge,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__lt,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__gt,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc__le,
+	arm_instr_load_w1_signed_byte_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__eq,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ne,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cs,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cc,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__mi,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__pl,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vs,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vc,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__hi,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ls,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ge,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__lt,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__gt,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__le,
+	arm_instr_store_w0_signed_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__eq,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ne,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cs,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cc,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__mi,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__pl,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vs,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vc,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__hi,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ls,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ge,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__lt,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__gt,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__le,
+	arm_instr_load_w0_signed_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__eq,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ne,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cs,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cc,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__mi,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__pl,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vs,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vc,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__hi,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ls,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ge,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__lt,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__gt,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__le,
+	arm_instr_store_w1_signed_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__eq,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ne,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cs,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cc,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__mi,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__pl,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vs,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vc,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__hi,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ls,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ge,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__lt,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__gt,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__le,
+	arm_instr_load_w1_signed_halfword_u0_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le,
+	arm_instr_store_w0_signed_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le,
+	arm_instr_load_w0_signed_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__eq,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ne,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cs,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cc,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__mi,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__pl,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vs,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vc,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__hi,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ls,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ge,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__lt,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__gt,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc__le,
+	arm_instr_store_w1_signed_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__eq,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ne,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cs,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cc,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__mi,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__pl,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vs,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vc,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__hi,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ls,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ge,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__lt,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__gt,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc__le,
+	arm_instr_load_w1_signed_byte_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le,
+	arm_instr_store_w0_signed_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le,
+	arm_instr_load_w0_signed_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__eq,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ne,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cs,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cc,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__mi,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__pl,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vs,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vc,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__hi,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ls,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ge,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__lt,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__gt,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__le,
+	arm_instr_store_w1_signed_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__eq,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ne,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cs,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cc,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__mi,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__pl,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vs,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vc,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__hi,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ls,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ge,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__lt,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__gt,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__le,
+	arm_instr_load_w1_signed_halfword_u1_p0_reg_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__eq,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ne,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cs,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cc,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__mi,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__pl,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vs,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vc,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__hi,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ls,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ge,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__lt,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__gt,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc__le,
+	arm_instr_store_w0_signed_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__eq,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ne,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cs,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cc,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__mi,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__pl,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vs,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vc,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__hi,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ls,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ge,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__lt,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__gt,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc__le,
+	arm_instr_load_w0_signed_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__eq,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ne,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cs,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cc,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__mi,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__pl,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vs,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vc,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__hi,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ls,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ge,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__lt,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__gt,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc__le,
+	arm_instr_store_w1_signed_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__eq,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ne,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cs,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cc,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__mi,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__pl,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vs,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vc,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__hi,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ls,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ge,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__lt,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__gt,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc__le,
+	arm_instr_load_w1_signed_byte_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__eq,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ne,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cs,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cc,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__mi,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__pl,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vs,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vc,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__hi,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ls,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ge,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__lt,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__gt,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__le,
+	arm_instr_store_w0_signed_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__eq,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ne,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cs,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cc,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__mi,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__pl,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vs,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vc,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__hi,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ls,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ge,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__lt,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__gt,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__le,
+	arm_instr_load_w0_signed_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__eq,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ne,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cs,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cc,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__mi,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__pl,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vs,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vc,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__hi,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ls,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ge,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__lt,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__gt,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__le,
+	arm_instr_store_w1_signed_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__eq,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ne,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cs,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cc,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__mi,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__pl,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vs,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vc,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__hi,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ls,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ge,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__lt,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__gt,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__le,
+	arm_instr_load_w1_signed_halfword_u0_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__eq,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ne,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cs,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cc,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__mi,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__pl,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vs,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vc,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__hi,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ls,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ge,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__lt,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__gt,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc__le,
+	arm_instr_store_w0_signed_byte_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__eq,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ne,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cs,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cc,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__mi,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__pl,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vs,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vc,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__hi,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ls,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ge,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__lt,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__gt,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc__le,
+	arm_instr_load_w0_signed_byte_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_invalid,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le,
+	arm_instr_store_w1_signed_byte_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le,
+	arm_instr_load_w1_signed_byte_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__eq,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ne,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__mi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__pl,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vs,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vc,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__hi,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ls,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ge,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__lt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__gt,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__le,
+	arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__eq,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ne,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__mi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__pl,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vs,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vc,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__hi,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ls,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ge,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__lt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__gt,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__le,
+	arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__eq,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ne,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cs,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cc,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__mi,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__pl,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vs,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vc,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__hi,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ls,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ge,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__lt,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__gt,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__le,
+	arm_instr_store_w0_signed_halfword_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__eq,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ne,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cs,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cc,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__mi,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__pl,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vs,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vc,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__hi,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ls,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ge,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__lt,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__gt,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__le,
+	arm_instr_load_w0_signed_halfword_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le,
+	arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le,
+	arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le,
+	arm_instr_store_w1_signed_halfword_u1_p1_reg_pc,
+	arm_instr_nop,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le,
+	arm_instr_load_w1_signed_halfword_u1_p1_reg_pc,
+	arm_instr_nop
+};
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w0.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w0.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w0.c	2022-10-18 16:37:22.078740600 +0000
@@ -0,0 +1,1364 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w0_word_u0_p0_imm__general
+#define A__NAME arm_instr_store_w0_word_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w0_word_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_word_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_word_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_word_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_word_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_word_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_word_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_word_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_word_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_word_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_word_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_word_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_word_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_word_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_word_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u0_p0_imm_pc__le
+#include "cpu_arm_instr_loadstore.c"
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u0_p0_imm__general
+#define A__NAME arm_instr_load_w0_word_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w0_word_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_word_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_word_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_word_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_word_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_word_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_word_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_word_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_word_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_word_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_word_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_word_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_word_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_word_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_word_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u0_p0_imm_pc__le
+#define A__L
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u0_p0_imm__general
+#define A__NAME arm_instr_store_w0_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w0_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p0_imm_pc__le
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u0_p0_imm__general
+#define A__NAME arm_instr_load_w0_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w0_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p0_imm_pc__le
+#define A__L
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_word_u0_p0_reg__general
+#define A__NAME arm_instr_store_w0_word_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w0_word_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_word_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_word_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_word_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_word_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_word_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_word_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_word_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_word_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_word_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_word_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_word_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_word_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_word_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_word_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u0_p0_reg_pc__le
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u0_p0_reg__general
+#define A__NAME arm_instr_load_w0_word_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w0_word_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_word_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_word_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_word_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_word_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_word_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_word_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_word_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_word_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_word_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_word_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_word_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_word_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_word_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_word_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u0_p0_reg_pc__le
+#define A__L
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u0_p0_reg__general
+#define A__NAME arm_instr_store_w0_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w0_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p0_reg_pc__le
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u0_p0_reg__general
+#define A__NAME arm_instr_load_w0_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w0_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p0_reg_pc__le
+#define A__L
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p0_imm__general
+#define A__NAME arm_instr_store_w0_signed_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p0_imm__general
+#define A__NAME arm_instr_load_w0_signed_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__le
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__le
+#define A__L
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p0_reg__general
+#define A__NAME arm_instr_store_w0_signed_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p0_reg__general
+#define A__NAME arm_instr_load_w0_signed_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__le
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__le
+#define A__L
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w1.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u0_w1.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u0_w1.c	2022-10-18 16:37:22.079740900 +0000
@@ -0,0 +1,1404 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w1_word_u0_p0_imm__general
+#define A__NAME arm_instr_store_w1_word_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w1_word_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_word_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_word_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_word_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_word_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_word_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_word_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_word_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_word_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_word_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_word_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_word_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_word_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_word_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_word_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u0_p0_imm_pc__le
+#define A__W
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u0_p0_imm__general
+#define A__NAME arm_instr_load_w1_word_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w1_word_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_word_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_word_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_word_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_word_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_word_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_word_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_word_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_word_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_word_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_word_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_word_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_word_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_word_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_word_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u0_p0_imm_pc__le
+#define A__L
+#define A__W
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u0_p0_imm__general
+#define A__NAME arm_instr_store_w1_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w1_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p0_imm_pc__le
+#define A__W
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u0_p0_imm__general
+#define A__NAME arm_instr_load_w1_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w1_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p0_imm_pc__le
+#define A__L
+#define A__W
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_word_u0_p0_reg__general
+#define A__NAME arm_instr_store_w1_word_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w1_word_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_word_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_word_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_word_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_word_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_word_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_word_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_word_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_word_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_word_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_word_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_word_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_word_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_word_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_word_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u0_p0_reg_pc__le
+#define A__W
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u0_p0_reg__general
+#define A__NAME arm_instr_load_w1_word_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w1_word_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_word_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_word_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_word_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_word_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_word_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_word_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_word_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_word_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_word_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_word_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_word_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_word_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_word_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_word_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u0_p0_reg_pc__le
+#define A__L
+#define A__W
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u0_p0_reg__general
+#define A__NAME arm_instr_store_w1_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w1_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p0_reg_pc__le
+#define A__W
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u0_p0_reg__general
+#define A__NAME arm_instr_load_w1_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w1_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p0_reg_pc__le
+#define A__L
+#define A__W
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p0_imm__general
+#define A__NAME arm_instr_store_w1_signed_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p0_imm__general
+#define A__NAME arm_instr_load_w1_signed_byte_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p0_imm_pc__le
+#define A__W
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p0_imm_pc__le
+#define A__L
+#define A__W
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p0_imm__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u0_p0_imm
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p0_reg__general
+#define A__NAME arm_instr_store_w1_signed_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p0_reg__general
+#define A__NAME arm_instr_load_w1_signed_byte_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p0_reg_pc__le
+#define A__W
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p0_reg_pc__le
+#define A__L
+#define A__W
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p0_reg__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u0_p0_reg
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w0.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w0.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w0.c	2022-10-18 16:37:22.080741800 +0000
@@ -0,0 +1,1404 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w0_word_u1_p0_imm__general
+#define A__NAME arm_instr_store_w0_word_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w0_word_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_word_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_word_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_word_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_word_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_word_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_word_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_word_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_word_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_word_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_word_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_word_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_word_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_word_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_word_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u1_p0_imm_pc__le
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u1_p0_imm__general
+#define A__NAME arm_instr_load_w0_word_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w0_word_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_word_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_word_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_word_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_word_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_word_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_word_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_word_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_word_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_word_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_word_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_word_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_word_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_word_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_word_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u1_p0_imm_pc__le
+#define A__L
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u1_p0_imm__general
+#define A__NAME arm_instr_store_w0_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w0_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p0_imm_pc__le
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u1_p0_imm__general
+#define A__NAME arm_instr_load_w0_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w0_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p0_imm_pc__le
+#define A__L
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_word_u1_p0_reg__general
+#define A__NAME arm_instr_store_w0_word_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w0_word_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_word_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_word_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_word_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_word_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_word_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_word_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_word_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_word_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_word_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_word_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_word_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_word_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_word_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_word_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u1_p0_reg_pc__le
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u1_p0_reg__general
+#define A__NAME arm_instr_load_w0_word_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w0_word_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_word_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_word_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_word_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_word_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_word_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_word_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_word_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_word_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_word_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_word_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_word_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_word_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_word_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_word_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u1_p0_reg_pc__le
+#define A__L
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u1_p0_reg__general
+#define A__NAME arm_instr_store_w0_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w0_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p0_reg_pc__le
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u1_p0_reg__general
+#define A__NAME arm_instr_load_w0_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w0_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p0_reg_pc__le
+#define A__L
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p0_imm__general
+#define A__NAME arm_instr_store_w0_signed_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p0_imm__general
+#define A__NAME arm_instr_load_w0_signed_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le
+#define A__L
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p0_reg__general
+#define A__NAME arm_instr_store_w0_signed_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p0_reg__general
+#define A__NAME arm_instr_load_w0_signed_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le
+#define A__L
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w1.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p0_u1_w1.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p0_u1_w1.c	2022-10-18 16:37:22.080741800 +0000
@@ -0,0 +1,1444 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w1_word_u1_p0_imm__general
+#define A__NAME arm_instr_store_w1_word_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w1_word_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_word_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_word_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_word_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_word_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_word_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_word_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_word_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_word_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_word_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_word_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_word_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_word_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_word_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_word_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u1_p0_imm_pc__le
+#define A__W
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u1_p0_imm__general
+#define A__NAME arm_instr_load_w1_word_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w1_word_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_word_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_word_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_word_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_word_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_word_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_word_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_word_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_word_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_word_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_word_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_word_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_word_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_word_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_word_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u1_p0_imm_pc__le
+#define A__L
+#define A__W
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u1_p0_imm__general
+#define A__NAME arm_instr_store_w1_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w1_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p0_imm_pc__le
+#define A__W
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u1_p0_imm__general
+#define A__NAME arm_instr_load_w1_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w1_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p0_imm_pc__le
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_word_u1_p0_reg__general
+#define A__NAME arm_instr_store_w1_word_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w1_word_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_word_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_word_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_word_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_word_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_word_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_word_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_word_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_word_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_word_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_word_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_word_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_word_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_word_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_word_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u1_p0_reg_pc__le
+#define A__W
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u1_p0_reg__general
+#define A__NAME arm_instr_load_w1_word_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w1_word_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_word_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_word_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_word_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_word_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_word_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_word_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_word_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_word_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_word_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_word_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_word_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_word_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_word_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_word_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u1_p0_reg_pc__le
+#define A__L
+#define A__W
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u1_p0_reg__general
+#define A__NAME arm_instr_store_w1_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w1_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p0_reg_pc__le
+#define A__W
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u1_p0_reg__general
+#define A__NAME arm_instr_load_w1_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w1_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p0_reg_pc__le
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p0_imm__general
+#define A__NAME arm_instr_store_w1_signed_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p0_imm__general
+#define A__NAME arm_instr_load_w1_signed_byte_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p0_imm_pc__le
+#define A__W
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p0_imm_pc__le
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p0_imm__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u1_p0_imm
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p0_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p0_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p0_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p0_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p0_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p0_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p0_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p0_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p0_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p0_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p0_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p0_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p0_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p0_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p0_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p0_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p0_reg__general
+#define A__NAME arm_instr_store_w1_signed_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p0_reg__general
+#define A__NAME arm_instr_load_w1_signed_byte_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p0_reg_pc__le
+#define A__W
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p0_reg_pc__le
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p0_reg__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u1_p0_reg
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p0_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p0_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p0_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p0_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p0_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p0_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p0_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p0_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p0_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p0_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p0_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p0_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p0_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p0_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p0_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p0_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w0.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w0.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w0.c	2022-10-18 16:37:22.081742900 +0000
@@ -0,0 +1,1404 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w0_word_u0_p1_imm__general
+#define A__NAME arm_instr_store_w0_word_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w0_word_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_word_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_word_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_word_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_word_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_word_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_word_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_word_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_word_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_word_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_word_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_word_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_word_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_word_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_word_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u0_p1_imm_pc__le
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u0_p1_imm__general
+#define A__NAME arm_instr_load_w0_word_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w0_word_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_word_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_word_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_word_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_word_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_word_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_word_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_word_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_word_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_word_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_word_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_word_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_word_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_word_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_word_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u0_p1_imm_pc__le
+#define A__L
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u0_p1_imm__general
+#define A__NAME arm_instr_store_w0_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w0_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p1_imm_pc__le
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u0_p1_imm__general
+#define A__NAME arm_instr_load_w0_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w0_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p1_imm_pc__le
+#define A__L
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_word_u0_p1_reg__general
+#define A__NAME arm_instr_store_w0_word_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w0_word_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_word_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_word_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_word_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_word_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_word_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_word_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_word_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_word_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_word_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_word_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_word_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_word_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_word_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_word_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u0_p1_reg_pc__le
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u0_p1_reg__general
+#define A__NAME arm_instr_load_w0_word_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w0_word_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_word_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_word_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_word_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_word_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_word_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_word_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_word_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_word_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_word_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_word_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_word_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_word_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_word_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_word_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u0_p1_reg_pc__le
+#define A__L
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u0_p1_reg__general
+#define A__NAME arm_instr_store_w0_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w0_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p1_reg_pc__le
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u0_p1_reg__general
+#define A__NAME arm_instr_load_w0_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w0_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p1_reg_pc__le
+#define A__L
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p1_imm__general
+#define A__NAME arm_instr_store_w0_signed_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p1_imm__general
+#define A__NAME arm_instr_load_w0_signed_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p1_imm_pc__le
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p1_imm_pc__le
+#define A__L
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p1_reg__general
+#define A__NAME arm_instr_store_w0_signed_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p1_reg__general
+#define A__NAME arm_instr_load_w0_signed_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p1_reg_pc__le
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p1_reg_pc__le
+#define A__L
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w1.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u0_w1.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u0_w1.c	2022-10-18 16:37:22.082743600 +0000
@@ -0,0 +1,1444 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w1_word_u0_p1_imm__general
+#define A__NAME arm_instr_store_w1_word_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w1_word_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_word_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_word_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_word_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_word_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_word_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_word_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_word_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_word_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_word_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_word_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_word_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_word_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_word_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_word_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u0_p1_imm_pc__le
+#define A__W
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u0_p1_imm__general
+#define A__NAME arm_instr_load_w1_word_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w1_word_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_word_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_word_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_word_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_word_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_word_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_word_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_word_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_word_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_word_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_word_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_word_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_word_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_word_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_word_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u0_p1_imm_pc__le
+#define A__L
+#define A__W
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u0_p1_imm__general
+#define A__NAME arm_instr_store_w1_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w1_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p1_imm_pc__le
+#define A__W
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u0_p1_imm__general
+#define A__NAME arm_instr_load_w1_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w1_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p1_imm_pc__le
+#define A__L
+#define A__W
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_word_u0_p1_reg__general
+#define A__NAME arm_instr_store_w1_word_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w1_word_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_word_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_word_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_word_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_word_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_word_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_word_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_word_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_word_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_word_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_word_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_word_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_word_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_word_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_word_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u0_p1_reg_pc__le
+#define A__W
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u0_p1_reg__general
+#define A__NAME arm_instr_load_w1_word_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w1_word_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_word_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_word_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_word_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_word_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_word_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_word_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_word_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_word_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_word_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_word_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_word_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_word_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_word_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_word_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u0_p1_reg_pc__le
+#define A__L
+#define A__W
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u0_p1_reg__general
+#define A__NAME arm_instr_store_w1_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w1_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p1_reg_pc__le
+#define A__W
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u0_p1_reg__general
+#define A__NAME arm_instr_load_w1_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w1_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p1_reg_pc__le
+#define A__L
+#define A__W
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p1_imm__general
+#define A__NAME arm_instr_store_w1_signed_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p1_imm__general
+#define A__NAME arm_instr_load_w1_signed_byte_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__le
+#define A__W
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__le
+#define A__L
+#define A__W
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p1_imm__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u0_p1_imm
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p1_reg__general
+#define A__NAME arm_instr_store_w1_signed_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p1_reg__general
+#define A__NAME arm_instr_load_w1_signed_byte_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__le
+#define A__W
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__le
+#define A__L
+#define A__W
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p1_reg__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u0_p1_reg
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w0.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w0.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w0.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w0.c	2022-10-18 16:37:22.082743600 +0000
@@ -0,0 +1,1444 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w0_word_u1_p1_imm__general
+#define A__NAME arm_instr_store_w0_word_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w0_word_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_word_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_word_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_word_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_word_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_word_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_word_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_word_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_word_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_word_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_word_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_word_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_word_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_word_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_word_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u1_p1_imm_pc__le
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u1_p1_imm__general
+#define A__NAME arm_instr_load_w0_word_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w0_word_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_word_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_word_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_word_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_word_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_word_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_word_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_word_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_word_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_word_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_word_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_word_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_word_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_word_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_word_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u1_p1_imm_pc__le
+#define A__L
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u1_p1_imm__general
+#define A__NAME arm_instr_store_w0_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w0_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p1_imm_pc__le
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u1_p1_imm__general
+#define A__NAME arm_instr_load_w0_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w0_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p1_imm_pc__le
+#define A__L
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_word_u1_p1_reg__general
+#define A__NAME arm_instr_store_w0_word_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w0_word_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_word_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_word_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_word_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_word_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_word_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_word_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_word_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_word_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_word_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_word_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_word_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_word_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_word_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_word_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_word_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_word_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_word_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_word_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_word_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_word_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_word_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_word_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_word_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_word_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_word_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_word_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_word_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_word_u1_p1_reg_pc__le
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_word_u1_p1_reg__general
+#define A__NAME arm_instr_load_w0_word_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w0_word_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_word_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_word_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_word_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_word_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_word_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_word_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_word_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_word_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_word_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_word_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_word_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_word_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_word_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_word_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_word_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_word_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_word_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_word_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_word_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_word_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_word_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_word_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_word_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_word_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_word_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_word_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_word_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_word_u1_p1_reg_pc__le
+#define A__L
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_byte_u1_p1_reg__general
+#define A__NAME arm_instr_store_w0_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w0_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_byte_u1_p1_reg_pc__le
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_byte_u1_p1_reg__general
+#define A__NAME arm_instr_load_w0_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w0_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_byte_u1_p1_reg_pc__le
+#define A__L
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p1_imm__general
+#define A__NAME arm_instr_store_w0_signed_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p1_imm__general
+#define A__NAME arm_instr_load_w0_signed_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p1_imm_pc__le
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p1_imm_pc__le
+#define A__L
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_byte_u1_p1_reg__general
+#define A__NAME arm_instr_store_w0_signed_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_byte_u1_p1_reg__general
+#define A__NAME arm_instr_load_w0_signed_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p1_reg_pc__le
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p1_reg_pc__le
+#define A__L
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_store_w0_signed_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_load_w0_signed_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w1.c gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w1.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_loadstore_p1_u1_w1.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_loadstore_p1_u1_w1.c	2022-10-18 16:37:22.083744800 +0000
@@ -0,0 +1,1484 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "machine.h"
+#include "memory.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#define reg(x) (*((uint32_t *)(x)))
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_nothing(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
+extern void arm_pc_to_pointers(struct cpu *);
+#define A__NAME__general arm_instr_store_w1_word_u1_p1_imm__general
+#define A__NAME arm_instr_store_w1_word_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w1_word_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_word_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_word_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_word_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_word_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_word_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_word_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_word_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_word_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_word_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_word_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_word_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_word_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_word_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_word_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_imm_pc__le
+#define A__W
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u1_p1_imm__general
+#define A__NAME arm_instr_load_w1_word_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w1_word_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_word_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_word_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_word_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_word_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_word_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_word_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_word_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_word_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_word_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_word_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_word_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_word_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_word_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_word_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_imm_pc__le
+#define A__L
+#define A__W
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u1_p1_imm__general
+#define A__NAME arm_instr_store_w1_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w1_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_imm_pc__le
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u1_p1_imm__general
+#define A__NAME arm_instr_load_w1_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w1_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_imm_pc__le
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_word_u1_p1_reg__general
+#define A__NAME arm_instr_store_w1_word_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w1_word_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_word_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_word_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_word_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_word_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_word_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_word_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_word_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_word_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_word_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_word_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_word_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_word_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_word_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_word_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_word_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_word_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_word_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_word_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_word_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_word_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_word_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_word_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_word_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_word_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_word_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_word_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_word_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_word_u1_p1_reg_pc__le
+#define A__W
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_word_u1_p1_reg__general
+#define A__NAME arm_instr_load_w1_word_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w1_word_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_word_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_word_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_word_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_word_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_word_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_word_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_word_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_word_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_word_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_word_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_word_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_word_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_word_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_word_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_word_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_word_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_word_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_word_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_word_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_word_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_word_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_word_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_word_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_word_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_word_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_word_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_word_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_word_u1_p1_reg_pc__le
+#define A__L
+#define A__W
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_byte_u1_p1_reg__general
+#define A__NAME arm_instr_store_w1_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w1_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_byte_u1_p1_reg_pc__le
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_byte_u1_p1_reg__general
+#define A__NAME arm_instr_load_w1_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w1_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_byte_u1_p1_reg_pc__le
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_imm__general
+#define A__NAME arm_instr_store_w1_signed_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_imm__general
+#define A__NAME arm_instr_load_w1_signed_byte_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_imm_pc__le
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_imm_pc__le
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_imm__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_imm
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_imm__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_imm__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_imm__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_imm__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_imm__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_imm__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_imm__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_imm__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_imm__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_imm__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_imm__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_imm__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_imm__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_imm__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_imm_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_imm_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_byte_u1_p1_reg__general
+#define A__NAME arm_instr_store_w1_signed_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w1_signed_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_byte_u1_p1_reg__general
+#define A__NAME arm_instr_load_w1_signed_byte_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w1_signed_byte_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_byte_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_byte_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_byte_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_byte_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_byte_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_byte_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_byte_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_byte_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_byte_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_byte_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_byte_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_byte_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_byte_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_byte_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__B
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__B
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_store_w1_unsigned_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u1_p1_reg_pc__le
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_load_w1_unsigned_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u1_p1_reg_pc__le
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_store_w1_signed_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_store_w1_signed_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_store_w1_signed_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_store_w1_signed_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_store_w1_signed_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_store_w1_signed_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_store_w1_signed_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_store_w1_signed_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_store_w1_signed_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_store_w1_signed_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_store_w1_signed_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_store_w1_signed_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_store_w1_signed_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_store_w1_signed_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_store_w1_signed_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_store_w1_signed_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_store_w1_signed_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
+#define A__NAME__general arm_instr_load_w1_signed_halfword_u1_p1_reg__general
+#define A__NAME arm_instr_load_w1_signed_halfword_u1_p1_reg
+#define A__NAME__eq arm_instr_load_w1_signed_halfword_u1_p1_reg__eq
+#define A__NAME__ne arm_instr_load_w1_signed_halfword_u1_p1_reg__ne
+#define A__NAME__cs arm_instr_load_w1_signed_halfword_u1_p1_reg__cs
+#define A__NAME__cc arm_instr_load_w1_signed_halfword_u1_p1_reg__cc
+#define A__NAME__mi arm_instr_load_w1_signed_halfword_u1_p1_reg__mi
+#define A__NAME__pl arm_instr_load_w1_signed_halfword_u1_p1_reg__pl
+#define A__NAME__vs arm_instr_load_w1_signed_halfword_u1_p1_reg__vs
+#define A__NAME__vc arm_instr_load_w1_signed_halfword_u1_p1_reg__vc
+#define A__NAME__hi arm_instr_load_w1_signed_halfword_u1_p1_reg__hi
+#define A__NAME__ls arm_instr_load_w1_signed_halfword_u1_p1_reg__ls
+#define A__NAME__ge arm_instr_load_w1_signed_halfword_u1_p1_reg__ge
+#define A__NAME__lt arm_instr_load_w1_signed_halfword_u1_p1_reg__lt
+#define A__NAME__gt arm_instr_load_w1_signed_halfword_u1_p1_reg__gt
+#define A__NAME__le arm_instr_load_w1_signed_halfword_u1_p1_reg__le
+#define A__NAME_PC arm_instr_load_w1_signed_halfword_u1_p1_reg_pc
+#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__eq
+#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ne
+#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cs
+#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__cc
+#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__mi
+#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__pl
+#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vs
+#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__vc
+#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__hi
+#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ls
+#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__ge
+#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__lt
+#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__gt
+#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u1_p1_reg_pc__le
+#define A__SIGNED
+#define A__L
+#define A__W
+#define A__H
+#define A__U
+#define A__P
+#define A__REG
+#include "cpu_arm_instr_loadstore.c"
+#undef A__SIGNED
+#undef A__L
+#undef A__W
+#undef A__H
+#undef A__U
+#undef A__P
+#undef A__REG
+#undef A__NAME__eq
+#undef A__NAME__ne
+#undef A__NAME__cs
+#undef A__NAME__cc
+#undef A__NAME__mi
+#undef A__NAME__pl
+#undef A__NAME__vs
+#undef A__NAME__vc
+#undef A__NAME__hi
+#undef A__NAME__ls
+#undef A__NAME__ge
+#undef A__NAME__lt
+#undef A__NAME__gt
+#undef A__NAME__le
+#undef A__NAME_PC__eq
+#undef A__NAME_PC__ne
+#undef A__NAME_PC__cs
+#undef A__NAME_PC__cc
+#undef A__NAME_PC__mi
+#undef A__NAME_PC__pl
+#undef A__NAME_PC__vs
+#undef A__NAME_PC__vc
+#undef A__NAME_PC__hi
+#undef A__NAME_PC__ls
+#undef A__NAME_PC__ge
+#undef A__NAME_PC__lt
+#undef A__NAME_PC__gt
+#undef A__NAME_PC__le
+#undef A__NAME__general
+#undef A__NAME_PC
+#undef A__NAME
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_multi.c gxemul-0.7.0/src/cpus/tmp_arm_multi.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_multi.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_multi.c	2022-10-18 16:37:22.084745600 +0000
@@ -0,0 +1,9575 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#include "quick_pc_to_pointers.h"
+#include "arm_tmphead_1.h"
+
+#define instr(x) arm_instr_ ## x
+extern void arm_pc_to_pointers(struct cpu *);
+extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_bdt_load(struct cpu *, struct arm_instr_call *);
+extern void arm_instr_bdt_store(struct cpu *, struct arm_instr_call *);
+
+
+
+void arm_instr_multi_0x092ddff0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x28 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-10] = cpu->cd.arm.r[4];
+		p[-9] = cpu->cd.arm.r[5];
+		p[-8] = cpu->cd.arm.r[6];
+		p[-7] = cpu->cd.arm.r[7];
+		p[-6] = cpu->cd.arm.r[8];
+		p[-5] = cpu->cd.arm.r[9];
+		p[-4] = cpu->cd.arm.r[10];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 44;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092ddff0)
+
+void arm_instr_multi_0x091baff0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x24 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-9];
+		cpu->cd.arm.r[5] = p[-8];
+		cpu->cd.arm.r[6] = p[-7];
+		cpu->cd.arm.r[7] = p[-6];
+		cpu->cd.arm.r[8] = p[-5];
+		cpu->cd.arm.r[9] = p[-4];
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091baff0)
+
+void arm_instr_multi_0x08110003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[-1];
+		cpu->cd.arm.r[1] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08110003)
+
+void arm_instr_multi_0x092dd8f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x1c && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-7] = cpu->cd.arm.r[4];
+		p[-6] = cpu->cd.arm.r[5];
+		p[-5] = cpu->cd.arm.r[6];
+		p[-4] = cpu->cd.arm.r[7];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 32;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092dd8f0)
+
+void arm_instr_multi_0x091ba8f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x18 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-6];
+		cpu->cd.arm.r[5] = p[-5];
+		cpu->cd.arm.r[6] = p[-4];
+		cpu->cd.arm.r[7] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091ba8f0)
+
+void arm_instr_multi_0x092d4000(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 4;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d4000)
+
+void arm_instr_multi_0x08bd8000(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->pc = p[0];
+		cpu->cd.arm.r[13] += 4;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd8000)
+
+void arm_instr_multi_0x08ac000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[2];
+		p[1] = cpu->cd.arm.r[3];
+		cpu->cd.arm.r[12] += 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08ac000c)
+
+void arm_instr_multi_0x092dd830(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x14 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-5] = cpu->cd.arm.r[4];
+		p[-4] = cpu->cd.arm.r[5];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 24;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092dd830)
+
+void arm_instr_multi_0x092dddf0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x24 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-9] = cpu->cd.arm.r[4];
+		p[-8] = cpu->cd.arm.r[5];
+		p[-7] = cpu->cd.arm.r[6];
+		p[-6] = cpu->cd.arm.r[7];
+		p[-5] = cpu->cd.arm.r[8];
+		p[-4] = cpu->cd.arm.r[10];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 40;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092dddf0)
+
+void arm_instr_multi_0x092dd9f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x20 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-8] = cpu->cd.arm.r[4];
+		p[-7] = cpu->cd.arm.r[5];
+		p[-6] = cpu->cd.arm.r[6];
+		p[-5] = cpu->cd.arm.r[7];
+		p[-4] = cpu->cd.arm.r[8];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 36;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092dd9f0)
+
+void arm_instr_multi_0x091badf0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x20 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-8];
+		cpu->cd.arm.r[5] = p[-7];
+		cpu->cd.arm.r[6] = p[-6];
+		cpu->cd.arm.r[7] = p[-5];
+		cpu->cd.arm.r[8] = p[-4];
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091badf0)
+
+void arm_instr_multi_0x091ba830(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x10 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-4];
+		cpu->cd.arm.r[5] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091ba830)
+
+void arm_instr_multi_0x091ba9f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x1c && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-7];
+		cpu->cd.arm.r[5] = p[-6];
+		cpu->cd.arm.r[6] = p[-5];
+		cpu->cd.arm.r[7] = p[-4];
+		cpu->cd.arm.r[8] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091ba9f0)
+
+void arm_instr_multi_0x08930003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08930003)
+
+void arm_instr_multi_0x09040003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[0];
+		p[0] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09040003)
+
+void arm_instr_multi_0x08b051f8(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+		cpu->cd.arm.r[5] = p[2];
+		cpu->cd.arm.r[6] = p[3];
+		cpu->cd.arm.r[7] = p[4];
+		cpu->cd.arm.r[8] = p[5];
+		cpu->cd.arm.r[12] = p[6];
+		cpu->cd.arm.r[14] = p[7];
+		cpu->cd.arm.r[0] += 32;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08b051f8)
+
+void arm_instr_multi_0x08a151f8(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+		p[2] = cpu->cd.arm.r[5];
+		p[3] = cpu->cd.arm.r[6];
+		p[4] = cpu->cd.arm.r[7];
+		p[5] = cpu->cd.arm.r[8];
+		p[6] = cpu->cd.arm.r[12];
+		p[7] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[1] += 32;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a151f8)
+
+void arm_instr_multi_0x092dd810(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x10 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-4] = cpu->cd.arm.r[4];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 20;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092dd810)
+
+void arm_instr_multi_0x091ba810(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091ba810)
+
+void arm_instr_multi_0x08930006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08930006)
+
+void arm_instr_multi_0x092d4010(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[4];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d4010)
+
+void arm_instr_multi_0x092dd800(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092dd800)
+
+void arm_instr_multi_0x08830006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08830006)
+
+void arm_instr_multi_0x08920018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08920018)
+
+void arm_instr_multi_0x08a051f8(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+		p[2] = cpu->cd.arm.r[5];
+		p[3] = cpu->cd.arm.r[6];
+		p[4] = cpu->cd.arm.r[7];
+		p[5] = cpu->cd.arm.r[8];
+		p[6] = cpu->cd.arm.r[12];
+		p[7] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[0] += 32;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a051f8)
+
+void arm_instr_multi_0x08820018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08820018)
+
+void arm_instr_multi_0x08bd8010(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->pc = p[1];
+		cpu->cd.arm.r[13] += 8;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd8010)
+
+void arm_instr_multi_0x08a05018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+		p[2] = cpu->cd.arm.r[12];
+		p[3] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[0] += 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a05018)
+
+void arm_instr_multi_0x08b15018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+		cpu->cd.arm.r[12] = p[2];
+		cpu->cd.arm.r[14] = p[3];
+		cpu->cd.arm.r[1] += 16;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08b15018)
+
+void arm_instr_multi_0x092dd870(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x18 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-6] = cpu->cd.arm.r[4];
+		p[-5] = cpu->cd.arm.r[5];
+		p[-4] = cpu->cd.arm.r[6];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 28;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092dd870)
+
+void arm_instr_multi_0x091ba870(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x14 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-5];
+		cpu->cd.arm.r[5] = p[-4];
+		cpu->cd.arm.r[6] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091ba870)
+
+void arm_instr_multi_0x092d41f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x14 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-5] = cpu->cd.arm.r[4];
+		p[-4] = cpu->cd.arm.r[5];
+		p[-3] = cpu->cd.arm.r[6];
+		p[-2] = cpu->cd.arm.r[7];
+		p[-1] = cpu->cd.arm.r[8];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 24;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d41f0)
+
+void arm_instr_multi_0x08bd81f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->cd.arm.r[8] = p[4];
+		cpu->pc = p[5];
+		cpu->cd.arm.r[13] += 24;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd81f0)
+
+void arm_instr_multi_0x08971040(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[6] = p[0];
+		cpu->cd.arm.r[12] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08971040)
+
+void arm_instr_multi_0x08040006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[1];
+		p[0] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08040006)
+
+void arm_instr_multi_0x08130018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[-1];
+		cpu->cd.arm.r[4] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08130018)
+
+void arm_instr_multi_0x091ba800(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091ba800)
+
+void arm_instr_multi_0x088d1fff(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfcc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+		p[2] = cpu->cd.arm.r[2];
+		p[3] = cpu->cd.arm.r[3];
+		p[4] = cpu->cd.arm.r[4];
+		p[5] = cpu->cd.arm.r[5];
+		p[6] = cpu->cd.arm.r[6];
+		p[7] = cpu->cd.arm.r[7];
+		p[8] = cpu->cd.arm.r[8];
+		p[9] = cpu->cd.arm.r[9];
+		p[10] = cpu->cd.arm.r[10];
+		p[11] = cpu->cd.arm.r[11];
+		p[12] = cpu->cd.arm.r[12];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d1fff)
+
+void arm_instr_multi_0x091b6800(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b6800)
+
+void arm_instr_multi_0x08950006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08950006)
+
+void arm_instr_multi_0x0911000f(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[-3];
+		cpu->cd.arm.r[1] = p[-2];
+		cpu->cd.arm.r[2] = p[-1];
+		cpu->cd.arm.r[3] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0911000f)
+
+void arm_instr_multi_0x090d000f(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-3] = cpu->cd.arm.r[0];
+		p[-2] = cpu->cd.arm.r[1];
+		p[-1] = cpu->cd.arm.r[2];
+		p[0] = cpu->cd.arm.r[3];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x090d000f)
+
+void arm_instr_multi_0x08850006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08850006)
+
+void arm_instr_multi_0x092d4070(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-3] = cpu->cd.arm.r[4];
+		p[-2] = cpu->cd.arm.r[5];
+		p[-1] = cpu->cd.arm.r[6];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d4070)
+
+void arm_instr_multi_0x08bd8070(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->pc = p[3];
+		cpu->cd.arm.r[13] += 16;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd8070)
+
+void arm_instr_multi_0x08900006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08900006)
+
+void arm_instr_multi_0x08800006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08800006)
+
+void arm_instr_multi_0x089e0018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089e0018)
+
+void arm_instr_multi_0x08870006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08870006)
+
+void arm_instr_multi_0x088e0018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088e0018)
+
+void arm_instr_multi_0x08b00fc0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[6] = p[0];
+		cpu->cd.arm.r[7] = p[1];
+		cpu->cd.arm.r[8] = p[2];
+		cpu->cd.arm.r[9] = p[3];
+		cpu->cd.arm.r[10] = p[4];
+		cpu->cd.arm.r[11] = p[5];
+		cpu->cd.arm.r[0] += 24;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08b00fc0)
+
+void arm_instr_multi_0x08b000c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[6] = p[0];
+		cpu->cd.arm.r[7] = p[1];
+		cpu->cd.arm.r[0] += 8;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08b000c0)
+
+void arm_instr_multi_0x08970006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08970006)
+
+void arm_instr_multi_0x08930060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[0];
+		cpu->cd.arm.r[6] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08930060)
+
+void arm_instr_multi_0x091b6ff0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x24 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-9];
+		cpu->cd.arm.r[5] = p[-8];
+		cpu->cd.arm.r[6] = p[-7];
+		cpu->cd.arm.r[7] = p[-6];
+		cpu->cd.arm.r[8] = p[-5];
+		cpu->cd.arm.r[9] = p[-4];
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b6ff0)
+
+void arm_instr_multi_0x092d4030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-2] = cpu->cd.arm.r[4];
+		p[-1] = cpu->cd.arm.r[5];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 12;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d4030)
+
+void arm_instr_multi_0x08bd8030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->pc = p[2];
+		cpu->cd.arm.r[13] += 12;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd8030)
+
+void arm_instr_multi_0x091b6830(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x10 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-4];
+		cpu->cd.arm.r[5] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b6830)
+
+void arm_instr_multi_0x092ddc30(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x18 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-6] = cpu->cd.arm.r[4];
+		p[-5] = cpu->cd.arm.r[5];
+		p[-4] = cpu->cd.arm.r[10];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 28;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092ddc30)
+
+void arm_instr_multi_0x091bac30(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x14 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-5];
+		cpu->cd.arm.r[5] = p[-4];
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091bac30)
+
+void arm_instr_multi_0x092d4001(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[0];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d4001)
+
+void arm_instr_multi_0x08bd8001(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->pc = p[1];
+		cpu->cd.arm.r[13] += 8;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd8001)
+
+void arm_instr_multi_0x09205018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-3] = cpu->cd.arm.r[3];
+		p[-2] = cpu->cd.arm.r[4];
+		p[-1] = cpu->cd.arm.r[12];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[0] -= 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09205018)
+
+void arm_instr_multi_0x09315018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[-3];
+		cpu->cd.arm.r[4] = p[-2];
+		cpu->cd.arm.r[12] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+		cpu->cd.arm.r[1] -= 16;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09315018)
+
+void arm_instr_multi_0x092ddbf0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x24 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-9] = cpu->cd.arm.r[4];
+		p[-8] = cpu->cd.arm.r[5];
+		p[-7] = cpu->cd.arm.r[6];
+		p[-6] = cpu->cd.arm.r[7];
+		p[-5] = cpu->cd.arm.r[8];
+		p[-4] = cpu->cd.arm.r[9];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 40;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092ddbf0)
+
+void arm_instr_multi_0x091babf0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x20 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-8];
+		cpu->cd.arm.r[5] = p[-7];
+		cpu->cd.arm.r[6] = p[-6];
+		cpu->cd.arm.r[7] = p[-5];
+		cpu->cd.arm.r[8] = p[-4];
+		cpu->cd.arm.r[9] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091babf0)
+
+void arm_instr_multi_0x091bac70(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x18 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-6];
+		cpu->cd.arm.r[5] = p[-5];
+		cpu->cd.arm.r[6] = p[-4];
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091bac70)
+
+void arm_instr_multi_0x092ddc70(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x1c && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-7] = cpu->cd.arm.r[4];
+		p[-6] = cpu->cd.arm.r[5];
+		p[-5] = cpu->cd.arm.r[6];
+		p[-4] = cpu->cd.arm.r[10];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 32;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092ddc70)
+
+void arm_instr_multi_0x080c0030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[4];
+		p[0] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x080c0030)
+
+void arm_instr_multi_0x092ddcf0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x20 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-8] = cpu->cd.arm.r[4];
+		p[-7] = cpu->cd.arm.r[5];
+		p[-6] = cpu->cd.arm.r[6];
+		p[-5] = cpu->cd.arm.r[7];
+		p[-4] = cpu->cd.arm.r[10];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 36;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092ddcf0)
+
+void arm_instr_multi_0x091bacf0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x1c && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-7];
+		cpu->cd.arm.r[5] = p[-6];
+		cpu->cd.arm.r[6] = p[-5];
+		cpu->cd.arm.r[7] = p[-4];
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091bacf0)
+
+void arm_instr_multi_0x0892000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[2] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0892000c)
+
+void arm_instr_multi_0x08930180(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[7] = p[0];
+		cpu->cd.arm.r[8] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08930180)
+
+void arm_instr_multi_0x08150003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[-1];
+		cpu->cd.arm.r[1] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08150003)
+
+void arm_instr_multi_0x08020003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[0];
+		p[0] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08020003)
+
+void arm_instr_multi_0x08920006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08920006)
+
+void arm_instr_multi_0x0817000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[2] = p[-1];
+		cpu->cd.arm.r[3] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0817000c)
+
+void arm_instr_multi_0x09870018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09870018)
+
+void arm_instr_multi_0x099c0180(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[7] = p[0];
+		cpu->cd.arm.r[8] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x099c0180)
+
+void arm_instr_multi_0x091b69f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x1c && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-7];
+		cpu->cd.arm.r[5] = p[-6];
+		cpu->cd.arm.r[6] = p[-5];
+		cpu->cd.arm.r[7] = p[-4];
+		cpu->cd.arm.r[8] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b69f0)
+
+void arm_instr_multi_0x08950003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08950003)
+
+void arm_instr_multi_0x088c0060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[5];
+		p[1] = cpu->cd.arm.r[6];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088c0060)
+
+void arm_instr_multi_0x0891000e(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+		cpu->cd.arm.r[3] = p[2];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0891000e)
+
+void arm_instr_multi_0x08bd0400(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[10] = p[0];
+		cpu->cd.arm.r[13] += 4;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd0400)
+
+void arm_instr_multi_0x092d0030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[4];
+		p[0] = cpu->cd.arm.r[5];
+		cpu->cd.arm.r[13] -= 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d0030)
+
+void arm_instr_multi_0x08bd0030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[13] += 8;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd0030)
+
+void arm_instr_multi_0x08810018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08810018)
+
+void arm_instr_multi_0x08880018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[8];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08880018)
+
+void arm_instr_multi_0x08820003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08820003)
+
+void arm_instr_multi_0x08980060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[8];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[0];
+		cpu->cd.arm.r[6] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08980060)
+
+void arm_instr_multi_0x08bd0010(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[13] += 4;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd0010)
+
+void arm_instr_multi_0x092d0010(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		cpu->cd.arm.r[13] -= 4;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d0010)
+
+void arm_instr_multi_0x08bd4010(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[14] = p[1];
+		cpu->cd.arm.r[13] += 8;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd4010)
+
+void arm_instr_multi_0x08100009(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[-1];
+		cpu->cd.arm.r[3] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08100009)
+
+void arm_instr_multi_0x08910003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08910003)
+
+void arm_instr_multi_0x08830030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08830030)
+
+void arm_instr_multi_0x08980018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[8];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08980018)
+
+void arm_instr_multi_0x08930018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08930018)
+
+void arm_instr_multi_0x08880006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[8];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08880006)
+
+void arm_instr_multi_0x088c0018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088c0018)
+
+void arm_instr_multi_0x08910006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08910006)
+
+void arm_instr_multi_0x08940003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08940003)
+
+void arm_instr_multi_0x08850003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08850003)
+
+void arm_instr_multi_0x08890006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08890006)
+
+void arm_instr_multi_0x092d40f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x10 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-4] = cpu->cd.arm.r[4];
+		p[-3] = cpu->cd.arm.r[5];
+		p[-2] = cpu->cd.arm.r[6];
+		p[-1] = cpu->cd.arm.r[7];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 20;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d40f0)
+
+void arm_instr_multi_0x08840003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08840003)
+
+void arm_instr_multi_0x08820030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08820030)
+
+void arm_instr_multi_0x09160060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[-1];
+		cpu->cd.arm.r[6] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09160060)
+
+void arm_instr_multi_0x08930600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[9] = p[0];
+		cpu->cd.arm.r[10] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08930600)
+
+void arm_instr_multi_0x092d0ff0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x1c && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-7] = cpu->cd.arm.r[4];
+		p[-6] = cpu->cd.arm.r[5];
+		p[-5] = cpu->cd.arm.r[6];
+		p[-4] = cpu->cd.arm.r[7];
+		p[-3] = cpu->cd.arm.r[8];
+		p[-2] = cpu->cd.arm.r[9];
+		p[-1] = cpu->cd.arm.r[10];
+		p[0] = cpu->cd.arm.r[11];
+		cpu->cd.arm.r[13] -= 32;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d0ff0)
+
+void arm_instr_multi_0x08bd0ff0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->cd.arm.r[8] = p[4];
+		cpu->cd.arm.r[9] = p[5];
+		cpu->cd.arm.r[10] = p[6];
+		cpu->cd.arm.r[11] = p[7];
+		cpu->cd.arm.r[13] += 32;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd0ff0)
+
+void arm_instr_multi_0x089e000a(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089e000a)
+
+void arm_instr_multi_0x09930006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09930006)
+
+void arm_instr_multi_0x080c0003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[0];
+		p[0] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x080c0003)
+
+void arm_instr_multi_0x0804000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[2];
+		p[0] = cpu->cd.arm.r[3];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x0804000c)
+
+void arm_instr_multi_0x08830060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[5];
+		p[1] = cpu->cd.arm.r[6];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08830060)
+
+void arm_instr_multi_0x08130003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[-1];
+		cpu->cd.arm.r[1] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08130003)
+
+void arm_instr_multi_0x09830006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09830006)
+
+void arm_instr_multi_0x08b00300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[8] = p[0];
+		cpu->cd.arm.r[9] = p[1];
+		cpu->cd.arm.r[0] += 8;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08b00300)
+
+void arm_instr_multi_0x088e1002(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[12];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088e1002)
+
+void arm_instr_multi_0x0894000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[2] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0894000c)
+
+void arm_instr_multi_0x0885000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[2];
+		p[1] = cpu->cd.arm.r[3];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x0885000c)
+
+void arm_instr_multi_0x08840600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[9];
+		p[1] = cpu->cd.arm.r[10];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08840600)
+
+void arm_instr_multi_0x091b6df0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x20 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-8];
+		cpu->cd.arm.r[5] = p[-7];
+		cpu->cd.arm.r[6] = p[-6];
+		cpu->cd.arm.r[7] = p[-5];
+		cpu->cd.arm.r[8] = p[-4];
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b6df0)
+
+void arm_instr_multi_0x088c0006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088c0006)
+
+void arm_instr_multi_0x092d47f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x1c && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-7] = cpu->cd.arm.r[4];
+		p[-6] = cpu->cd.arm.r[5];
+		p[-5] = cpu->cd.arm.r[6];
+		p[-4] = cpu->cd.arm.r[7];
+		p[-3] = cpu->cd.arm.r[8];
+		p[-2] = cpu->cd.arm.r[9];
+		p[-1] = cpu->cd.arm.r[10];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 32;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d47f0)
+
+void arm_instr_multi_0x08bd87f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->cd.arm.r[8] = p[4];
+		cpu->cd.arm.r[9] = p[5];
+		cpu->cd.arm.r[10] = p[6];
+		cpu->pc = p[7];
+		cpu->cd.arm.r[13] += 32;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd87f0)
+
+void arm_instr_multi_0x08800018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08800018)
+
+void arm_instr_multi_0x099b0030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x099b0030)
+
+void arm_instr_multi_0x08a100c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[6];
+		p[1] = cpu->cd.arm.r[7];
+		cpu->cd.arm.r[1] += 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a100c0)
+
+void arm_instr_multi_0x089c0006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089c0006)
+
+void arm_instr_multi_0x099b0180(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[7] = p[0];
+		cpu->cd.arm.r[8] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x099b0180)
+
+void arm_instr_multi_0x08910030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08910030)
+
+void arm_instr_multi_0x09150018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[-1];
+		cpu->cd.arm.r[4] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09150018)
+
+void arm_instr_multi_0x091a0600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[10];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[9] = p[-1];
+		cpu->cd.arm.r[10] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091a0600)
+
+void arm_instr_multi_0x090a0300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[10];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[8];
+		p[0] = cpu->cd.arm.r[9];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x090a0300)
+
+void arm_instr_multi_0x08bd40f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfec && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->cd.arm.r[14] = p[4];
+		cpu->cd.arm.r[13] += 20;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd40f0)
+
+void arm_instr_multi_0x089c0300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[8] = p[0];
+		cpu->cd.arm.r[9] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089c0300)
+
+void arm_instr_multi_0x09150006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[-1];
+		cpu->cd.arm.r[2] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09150006)
+
+void arm_instr_multi_0x08a10300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[8];
+		p[1] = cpu->cd.arm.r[9];
+		cpu->cd.arm.r[1] += 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a10300)
+
+void arm_instr_multi_0x08a01008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[12];
+		cpu->cd.arm.r[0] += 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a01008)
+
+void arm_instr_multi_0x08b11008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[12] = p[1];
+		cpu->cd.arm.r[1] += 8;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08b11008)
+
+void arm_instr_multi_0x08bd80f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfec && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->pc = p[4];
+		cpu->cd.arm.r[13] += 20;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd80f0)
+
+void arm_instr_multi_0x08a05008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[12];
+		p[2] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[0] += 12;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a05008)
+
+void arm_instr_multi_0x08b15008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[12] = p[1];
+		cpu->cd.arm.r[14] = p[2];
+		cpu->cd.arm.r[1] += 12;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08b15008)
+
+void arm_instr_multi_0x08900018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08900018)
+
+void arm_instr_multi_0x092ddc00(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	uint32_t tmp_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page) / sizeof(struct arm_instr_call);
+	tmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)
+	    << ARM_INSTR_ALIGNMENT_SHIFT)))
+	    + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x10 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-4] = cpu->cd.arm.r[10];
+		p[-3] = cpu->cd.arm.r[11];
+		p[-2] = cpu->cd.arm.r[12];
+		p[-1] = cpu->cd.arm.r[14];
+		p[0] = tmp_pc;
+		cpu->cd.arm.r[13] -= 20;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092ddc00)
+
+void arm_instr_multi_0x088c0003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088c0003)
+
+void arm_instr_multi_0x08830600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[9];
+		p[1] = cpu->cd.arm.r[10];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08830600)
+
+void arm_instr_multi_0x08920003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08920003)
+
+void arm_instr_multi_0x088d1100(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[8];
+		p[1] = cpu->cd.arm.r[12];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d1100)
+
+void arm_instr_multi_0x09900120(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[0];
+		cpu->cd.arm.r[8] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09900120)
+
+void arm_instr_multi_0x091bac00(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[10] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->pc = p[0];
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091bac00)
+
+void arm_instr_multi_0x092d45f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x18 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-6] = cpu->cd.arm.r[4];
+		p[-5] = cpu->cd.arm.r[5];
+		p[-4] = cpu->cd.arm.r[6];
+		p[-3] = cpu->cd.arm.r[7];
+		p[-2] = cpu->cd.arm.r[8];
+		p[-1] = cpu->cd.arm.r[10];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 28;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d45f0)
+
+void arm_instr_multi_0x08bd85f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->cd.arm.r[8] = p[4];
+		cpu->cd.arm.r[10] = p[5];
+		cpu->pc = p[6];
+		cpu->cd.arm.r[13] += 28;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd85f0)
+
+void arm_instr_multi_0x09940018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09940018)
+
+void arm_instr_multi_0x09850014(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[2];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09850014)
+
+void arm_instr_multi_0x08860006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08860006)
+
+void arm_instr_multi_0x09120006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[-1];
+		cpu->cd.arm.r[2] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09120006)
+
+void arm_instr_multi_0x089c0018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089c0018)
+
+void arm_instr_multi_0x091b6870(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x14 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-5];
+		cpu->cd.arm.r[5] = p[-4];
+		cpu->cd.arm.r[6] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b6870)
+
+void arm_instr_multi_0x08950030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08950030)
+
+void arm_instr_multi_0x09900018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09900018)
+
+void arm_instr_multi_0x098d0030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x098d0030)
+
+void arm_instr_multi_0x088d0088(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[7];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d0088)
+
+void arm_instr_multi_0x08900060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[0];
+		cpu->cd.arm.r[6] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08900060)
+
+void arm_instr_multi_0x08900003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08900003)
+
+void arm_instr_multi_0x08990018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08990018)
+
+void arm_instr_multi_0x08810600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[9];
+		p[1] = cpu->cd.arm.r[10];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08810600)
+
+void arm_instr_multi_0x092d0c1f(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x18 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-6] = cpu->cd.arm.r[0];
+		p[-5] = cpu->cd.arm.r[1];
+		p[-4] = cpu->cd.arm.r[2];
+		p[-3] = cpu->cd.arm.r[3];
+		p[-2] = cpu->cd.arm.r[4];
+		p[-1] = cpu->cd.arm.r[10];
+		p[0] = cpu->cd.arm.r[11];
+		cpu->cd.arm.r[13] -= 28;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d0c1f)
+
+void arm_instr_multi_0x08bd4c1f(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+		cpu->cd.arm.r[2] = p[2];
+		cpu->cd.arm.r[3] = p[3];
+		cpu->cd.arm.r[4] = p[4];
+		cpu->cd.arm.r[10] = p[5];
+		cpu->cd.arm.r[11] = p[6];
+		cpu->cd.arm.r[14] = p[7];
+		cpu->cd.arm.r[13] += 32;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd4c1f)
+
+void arm_instr_multi_0x088d1010(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[12];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d1010)
+
+void arm_instr_multi_0x09311008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[-1];
+		cpu->cd.arm.r[12] = p[0];
+		cpu->cd.arm.r[1] -= 8;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09311008)
+
+void arm_instr_multi_0x09201008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[3];
+		p[0] = cpu->cd.arm.r[12];
+		cpu->cd.arm.r[0] -= 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09201008)
+
+void arm_instr_multi_0x08a10f00(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[8];
+		p[1] = cpu->cd.arm.r[9];
+		p[2] = cpu->cd.arm.r[10];
+		p[3] = cpu->cd.arm.r[11];
+		cpu->cd.arm.r[1] += 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a10f00)
+
+void arm_instr_multi_0x08931008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[12] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08931008)
+
+void arm_instr_multi_0x098b0003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x098b0003)
+
+void arm_instr_multi_0x08820180(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[7];
+		p[1] = cpu->cd.arm.r[8];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08820180)
+
+void arm_instr_multi_0x08830300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[8];
+		p[1] = cpu->cd.arm.r[9];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08830300)
+
+void arm_instr_multi_0x08800030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08800030)
+
+void arm_instr_multi_0x09315008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[-2];
+		cpu->cd.arm.r[12] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+		cpu->cd.arm.r[1] -= 12;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09315008)
+
+void arm_instr_multi_0x09205008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-2] = cpu->cd.arm.r[3];
+		p[-1] = cpu->cd.arm.r[12];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[0] -= 12;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09205008)
+
+void arm_instr_multi_0x08970300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[8] = p[0];
+		cpu->cd.arm.r[9] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08970300)
+
+void arm_instr_multi_0x08970030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08970030)
+
+void arm_instr_multi_0x08920030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08920030)
+
+void arm_instr_multi_0x08970600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[9] = p[0];
+		cpu->cd.arm.r[10] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08970600)
+
+void arm_instr_multi_0x08160060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[-1];
+		cpu->cd.arm.r[6] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08160060)
+
+void arm_instr_multi_0x08807ff0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfd4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+		p[2] = cpu->cd.arm.r[6];
+		p[3] = cpu->cd.arm.r[7];
+		p[4] = cpu->cd.arm.r[8];
+		p[5] = cpu->cd.arm.r[9];
+		p[6] = cpu->cd.arm.r[10];
+		p[7] = cpu->cd.arm.r[11];
+		p[8] = cpu->cd.arm.r[12];
+		p[9] = cpu->cd.arm.r[13];
+		p[10] = cpu->cd.arm.r[14];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08807ff0)
+
+void arm_instr_multi_0x092d0070(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-2] = cpu->cd.arm.r[4];
+		p[-1] = cpu->cd.arm.r[5];
+		p[0] = cpu->cd.arm.r[6];
+		cpu->cd.arm.r[13] -= 12;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d0070)
+
+void arm_instr_multi_0x08bd0070(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[13] += 12;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd0070)
+
+void arm_instr_multi_0x08800180(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[7];
+		p[1] = cpu->cd.arm.r[8];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08800180)
+
+void arm_instr_multi_0x088e000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[2];
+		p[1] = cpu->cd.arm.r[3];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088e000c)
+
+void arm_instr_multi_0x088d0030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d0030)
+
+void arm_instr_multi_0x08830003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08830003)
+
+void arm_instr_multi_0x089e0030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089e0030)
+
+void arm_instr_multi_0x091b6810(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b6810)
+
+void arm_instr_multi_0x08970180(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[7];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[7] = p[0];
+		cpu->cd.arm.r[8] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08970180)
+
+void arm_instr_multi_0x0896000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[2] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0896000c)
+
+void arm_instr_multi_0x089200c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[6] = p[0];
+		cpu->cd.arm.r[7] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089200c0)
+
+void arm_instr_multi_0x088e00c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[6];
+		p[1] = cpu->cd.arm.r[7];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088e00c0)
+
+void arm_instr_multi_0x08940012(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08940012)
+
+void arm_instr_multi_0x089100c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[6] = p[0];
+		cpu->cd.arm.r[7] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089100c0)
+
+void arm_instr_multi_0x0813000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[2] = p[-1];
+		cpu->cd.arm.r[3] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0813000c)
+
+void arm_instr_multi_0x089c000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[2] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089c000c)
+
+void arm_instr_multi_0x09920003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09920003)
+
+void arm_instr_multi_0x08950060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[0];
+		cpu->cd.arm.r[6] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08950060)
+
+void arm_instr_multi_0x09860006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09860006)
+
+void arm_instr_multi_0x088d4010(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[14];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d4010)
+
+void arm_instr_multi_0x09160006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[-1];
+		cpu->cd.arm.r[2] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09160006)
+
+void arm_instr_multi_0x08990600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[9] = p[0];
+		cpu->cd.arm.r[10] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08990600)
+
+void arm_instr_multi_0x08980006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[8];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08980006)
+
+void arm_instr_multi_0x091c0006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[-1];
+		cpu->cd.arm.r[2] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091c0006)
+
+void arm_instr_multi_0x080c0600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[9];
+		p[0] = cpu->cd.arm.r[10];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x080c0600)
+
+void arm_instr_multi_0x0894000a(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0894000a)
+
+void arm_instr_multi_0x09311038(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[-3];
+		cpu->cd.arm.r[4] = p[-2];
+		cpu->cd.arm.r[5] = p[-1];
+		cpu->cd.arm.r[12] = p[0];
+		cpu->cd.arm.r[1] -= 16;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09311038)
+
+void arm_instr_multi_0x09205030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-3] = cpu->cd.arm.r[4];
+		p[-2] = cpu->cd.arm.r[5];
+		p[-1] = cpu->cd.arm.r[12];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[0] -= 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09205030)
+
+void arm_instr_multi_0x08850018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[5];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08850018)
+
+void arm_instr_multi_0x09190300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[8] = p[-1];
+		cpu->cd.arm.r[9] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09190300)
+
+void arm_instr_multi_0x088d0180(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[7];
+		p[1] = cpu->cd.arm.r[8];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d0180)
+
+void arm_instr_multi_0x08980003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[8];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08980003)
+
+void arm_instr_multi_0x098d000e(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+		p[2] = cpu->cd.arm.r[3];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x098d000e)
+
+void arm_instr_multi_0x098c0006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[1];
+		p[1] = cpu->cd.arm.r[2];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x098c0006)
+
+void arm_instr_multi_0x09010018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[3];
+		p[0] = cpu->cd.arm.r[4];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09010018)
+
+void arm_instr_multi_0x09860030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x09860030)
+
+void arm_instr_multi_0x092d4400(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-1] = cpu->cd.arm.r[10];
+		p[0] = cpu->cd.arm.r[14];
+		cpu->cd.arm.r[13] -= 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d4400)
+
+void arm_instr_multi_0x08bd8400(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[10] = p[0];
+		cpu->pc = p[1];
+		cpu->cd.arm.r[13] += 8;
+		quick_pc_to_pointers(cpu);
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd8400)
+
+void arm_instr_multi_0x089e0060(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[5] = p[0];
+		cpu->cd.arm.r[6] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089e0060)
+
+void arm_instr_multi_0x088c00c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[3];
+		p[1] = cpu->cd.arm.r[6];
+		p[2] = cpu->cd.arm.r[7];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088c00c8)
+
+void arm_instr_multi_0x0893000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[2] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x0893000c)
+
+void arm_instr_multi_0x09110003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[1];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[-1];
+		cpu->cd.arm.r[1] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09110003)
+
+void arm_instr_multi_0x08ac000f(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+		p[2] = cpu->cd.arm.r[2];
+		p[3] = cpu->cd.arm.r[3];
+		cpu->cd.arm.r[12] += 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08ac000f)
+
+void arm_instr_multi_0x08be000f(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[14];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+		cpu->cd.arm.r[2] = p[2];
+		cpu->cd.arm.r[3] = p[3];
+		cpu->cd.arm.r[14] += 16;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08be000f)
+
+void arm_instr_multi_0x08940018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[4] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08940018)
+
+void arm_instr_multi_0x091b68f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[11];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x18 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[-6];
+		cpu->cd.arm.r[5] = p[-5];
+		cpu->cd.arm.r[6] = p[-4];
+		cpu->cd.arm.r[7] = p[-3];
+		cpu->cd.arm.r[11] = p[-2];
+		cpu->cd.arm.r[13] = p[-1];
+		cpu->cd.arm.r[14] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x091b68f0)
+
+void arm_instr_multi_0x09140018(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	addr -= 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0x4 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[-1];
+		cpu->cd.arm.r[4] = p[0];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09140018)
+
+void arm_instr_multi_0x08940009(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[4];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[3] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08940009)
+
+void arm_instr_multi_0x08bd41f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xfe8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->cd.arm.r[8] = p[4];
+		cpu->cd.arm.r[14] = p[5];
+		cpu->cd.arm.r[13] += 24;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd41f0)
+
+void arm_instr_multi_0x08a20600(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[9];
+		p[1] = cpu->cd.arm.r[10];
+		cpu->cd.arm.r[2] += 8;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08a20600)
+
+void arm_instr_multi_0x08990003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08990003)
+
+void arm_instr_multi_0x09904008(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[0];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[3] = p[0];
+		cpu->cd.arm.r[14] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x09904008)
+
+void arm_instr_multi_0x098c0003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[0];
+		p[1] = cpu->cd.arm.r[1];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x098c0003)
+
+void arm_instr_multi_0x088900c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[6];
+		p[1] = cpu->cd.arm.r[7];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088900c0)
+
+void arm_instr_multi_0x088200c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[2];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[6];
+		p[1] = cpu->cd.arm.r[7];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088200c0)
+
+void arm_instr_multi_0x088300c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[6];
+		p[1] = cpu->cd.arm.r[7];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088300c0)
+
+void arm_instr_multi_0x089300c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[3];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[6] = p[0];
+		cpu->cd.arm.r[7] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089300c0)
+
+void arm_instr_multi_0x092d00f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	addr -= 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr >= 0xc && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[-3] = cpu->cd.arm.r[4];
+		p[-2] = cpu->cd.arm.r[5];
+		p[-1] = cpu->cd.arm.r[6];
+		p[0] = cpu->cd.arm.r[7];
+		cpu->cd.arm.r[13] -= 16;
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x092d00f0)
+
+void arm_instr_multi_0x08bd00f0(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff0 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+		cpu->cd.arm.r[6] = p[2];
+		cpu->cd.arm.r[7] = p[3];
+		cpu->cd.arm.r[13] += 16;
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08bd00f0)
+
+void arm_instr_multi_0x08960030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[6];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[4] = p[0];
+		cpu->cd.arm.r[5] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08960030)
+
+void arm_instr_multi_0x08980300(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[8];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[8] = p[0];
+		cpu->cd.arm.r[9] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08980300)
+
+void arm_instr_multi_0x089c5000(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[12];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[12] = p[0];
+		cpu->cd.arm.r[14] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x089c5000)
+
+void arm_instr_multi_0x088d1020(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[13];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[5];
+		p[1] = cpu->cd.arm.r[12];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x088d1020)
+
+void arm_instr_multi_0x08990006(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[1] = p[0];
+		cpu->cd.arm.r[2] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x08990006)
+
+void arm_instr_multi_0x08890030(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[4];
+		p[1] = cpu->cd.arm.r[5];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x08890030)
+
+void arm_instr_multi_0x099a0003(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[10];
+	addr += 4;
+	page = cpu->cd.arm.host_load[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		cpu->cd.arm.r[0] = p[0];
+		cpu->cd.arm.r[1] = p[1];
+	} else
+		instr(bdt_load)(cpu, ic);
+}
+Y(multi_0x099a0003)
+
+void arm_instr_multi_0x0989000c(struct cpu *cpu, struct arm_instr_call *ic) {
+	unsigned char *page;
+	uint32_t addr = cpu->cd.arm.r[9];
+	addr += 4;
+	page = cpu->cd.arm.host_store[addr >> 12];
+	addr &= 0xffc;
+	if (addr <= 0xff8 && page != NULL) {
+		uint32_t *p = (uint32_t *) (page + addr);
+		p[0] = cpu->cd.arm.r[2];
+		p[1] = cpu->cd.arm.r[3];
+	} else
+		instr(bdt_store)(cpu, ic);
+}
+Y(multi_0x0989000c)
+
+uint32_t multi_opcode_0[4] = {
+	0x08020003,
+	0x09201008,
+	0x09205008,
+0 };
+
+uint32_t multi_opcode_1[1] = {
+0 };
+
+uint32_t multi_opcode_2[3] = {
+	0x09205018,
+	0x09205030,
+0 };
+
+uint32_t multi_opcode_3[1] = {
+0 };
+
+uint32_t multi_opcode_4[1] = {
+0 };
+
+uint32_t multi_opcode_5[1] = {
+0 };
+
+uint32_t multi_opcode_6[1] = {
+0 };
+
+uint32_t multi_opcode_7[1] = {
+0 };
+
+uint32_t multi_opcode_8[2] = {
+	0x090a0300,
+0 };
+
+uint32_t multi_opcode_9[1] = {
+0 };
+
+uint32_t multi_opcode_10[1] = {
+0 };
+
+uint32_t multi_opcode_11[1] = {
+0 };
+
+uint32_t multi_opcode_12[1] = {
+0 };
+
+uint32_t multi_opcode_13[1] = {
+0 };
+
+uint32_t multi_opcode_14[1] = {
+0 };
+
+uint32_t multi_opcode_15[1] = {
+0 };
+
+uint32_t multi_opcode_16[1] = {
+0 };
+
+uint32_t multi_opcode_17[1] = {
+0 };
+
+uint32_t multi_opcode_18[2] = {
+	0x09010018,
+0 };
+
+uint32_t multi_opcode_19[1] = {
+0 };
+
+uint32_t multi_opcode_20[1] = {
+0 };
+
+uint32_t multi_opcode_21[1] = {
+0 };
+
+uint32_t multi_opcode_22[1] = {
+0 };
+
+uint32_t multi_opcode_23[1] = {
+0 };
+
+uint32_t multi_opcode_24[1] = {
+0 };
+
+uint32_t multi_opcode_25[1] = {
+0 };
+
+uint32_t multi_opcode_26[1] = {
+0 };
+
+uint32_t multi_opcode_27[1] = {
+0 };
+
+uint32_t multi_opcode_28[1] = {
+0 };
+
+uint32_t multi_opcode_29[1] = {
+0 };
+
+uint32_t multi_opcode_30[1] = {
+0 };
+
+uint32_t multi_opcode_31[1] = {
+0 };
+
+uint32_t multi_opcode_32[4] = {
+	0x09040003,
+	0x080c0003,
+	0x080c0600,
+0 };
+
+uint32_t multi_opcode_33[3] = {
+	0x08040006,
+	0x0804000c,
+0 };
+
+uint32_t multi_opcode_34[2] = {
+	0x080c0030,
+0 };
+
+uint32_t multi_opcode_35[1] = {
+0 };
+
+uint32_t multi_opcode_36[1] = {
+0 };
+
+uint32_t multi_opcode_37[1] = {
+0 };
+
+uint32_t multi_opcode_38[1] = {
+0 };
+
+uint32_t multi_opcode_39[1] = {
+0 };
+
+uint32_t multi_opcode_40[1] = {
+0 };
+
+uint32_t multi_opcode_41[1] = {
+0 };
+
+uint32_t multi_opcode_42[1] = {
+0 };
+
+uint32_t multi_opcode_43[1] = {
+0 };
+
+uint32_t multi_opcode_44[1] = {
+0 };
+
+uint32_t multi_opcode_45[1] = {
+0 };
+
+uint32_t multi_opcode_46[1] = {
+0 };
+
+uint32_t multi_opcode_47[1] = {
+0 };
+
+uint32_t multi_opcode_48[6] = {
+	0x092d4000,
+	0x092dd800,
+	0x092d4001,
+	0x092ddc00,
+	0x092d4400,
+0 };
+
+uint32_t multi_opcode_49[2] = {
+	0x090d000f,
+0 };
+
+uint32_t multi_opcode_50[8] = {
+	0x092dd830,
+	0x092dd810,
+	0x092d4010,
+	0x092d4030,
+	0x092ddc30,
+	0x092d0030,
+	0x092d0010,
+0 };
+
+uint32_t multi_opcode_51[2] = {
+	0x092d0c1f,
+0 };
+
+uint32_t multi_opcode_52[1] = {
+0 };
+
+uint32_t multi_opcode_53[1] = {
+0 };
+
+uint32_t multi_opcode_54[9] = {
+	0x092dd8f0,
+	0x092dd870,
+	0x092d4070,
+	0x092ddc70,
+	0x092ddcf0,
+	0x092d40f0,
+	0x092d0070,
+	0x092d00f0,
+0 };
+
+uint32_t multi_opcode_55[1] = {
+0 };
+
+uint32_t multi_opcode_56[1] = {
+0 };
+
+uint32_t multi_opcode_57[1] = {
+0 };
+
+uint32_t multi_opcode_58[1] = {
+0 };
+
+uint32_t multi_opcode_59[1] = {
+0 };
+
+uint32_t multi_opcode_60[1] = {
+0 };
+
+uint32_t multi_opcode_61[1] = {
+0 };
+
+uint32_t multi_opcode_62[9] = {
+	0x092ddff0,
+	0x092dddf0,
+	0x092dd9f0,
+	0x092d41f0,
+	0x092ddbf0,
+	0x092d0ff0,
+	0x092d47f0,
+	0x092d45f0,
+0 };
+
+uint32_t multi_opcode_63[1] = {
+0 };
+
+uint32_t multi_opcode_64[3] = {
+	0x08100009,
+	0x091a0600,
+0 };
+
+uint32_t multi_opcode_65[2] = {
+	0x09120006,
+0 };
+
+uint32_t multi_opcode_66[1] = {
+0 };
+
+uint32_t multi_opcode_67[1] = {
+0 };
+
+uint32_t multi_opcode_68[1] = {
+0 };
+
+uint32_t multi_opcode_69[1] = {
+0 };
+
+uint32_t multi_opcode_70[1] = {
+0 };
+
+uint32_t multi_opcode_71[1] = {
+0 };
+
+uint32_t multi_opcode_72[1] = {
+0 };
+
+uint32_t multi_opcode_73[1] = {
+0 };
+
+uint32_t multi_opcode_74[1] = {
+0 };
+
+uint32_t multi_opcode_75[1] = {
+0 };
+
+uint32_t multi_opcode_76[1] = {
+0 };
+
+uint32_t multi_opcode_77[1] = {
+0 };
+
+uint32_t multi_opcode_78[1] = {
+0 };
+
+uint32_t multi_opcode_79[1] = {
+0 };
+
+uint32_t multi_opcode_80[9] = {
+	0x08110003,
+	0x091ba800,
+	0x091b6800,
+	0x08130003,
+	0x091bac00,
+	0x09311008,
+	0x09315008,
+	0x09110003,
+0 };
+
+uint32_t multi_opcode_81[3] = {
+	0x0911000f,
+	0x0813000c,
+0 };
+
+uint32_t multi_opcode_82[9] = {
+	0x091ba830,
+	0x091ba810,
+	0x08130018,
+	0x091b6830,
+	0x091bac30,
+	0x09315018,
+	0x091b6810,
+	0x09311038,
+0 };
+
+uint32_t multi_opcode_83[1] = {
+0 };
+
+uint32_t multi_opcode_84[1] = {
+0 };
+
+uint32_t multi_opcode_85[1] = {
+0 };
+
+uint32_t multi_opcode_86[7] = {
+	0x091ba8f0,
+	0x091ba870,
+	0x091bac70,
+	0x091bacf0,
+	0x091b6870,
+	0x091b68f0,
+0 };
+
+uint32_t multi_opcode_87[1] = {
+0 };
+
+uint32_t multi_opcode_88[2] = {
+	0x09190300,
+0 };
+
+uint32_t multi_opcode_89[1] = {
+0 };
+
+uint32_t multi_opcode_90[1] = {
+0 };
+
+uint32_t multi_opcode_91[1] = {
+0 };
+
+uint32_t multi_opcode_92[1] = {
+0 };
+
+uint32_t multi_opcode_93[1] = {
+0 };
+
+uint32_t multi_opcode_94[8] = {
+	0x091baff0,
+	0x091badf0,
+	0x091ba9f0,
+	0x091b6ff0,
+	0x091babf0,
+	0x091b69f0,
+	0x091b6df0,
+0 };
+
+uint32_t multi_opcode_95[1] = {
+0 };
+
+uint32_t multi_opcode_96[1] = {
+0 };
+
+uint32_t multi_opcode_97[3] = {
+	0x09160006,
+	0x091c0006,
+0 };
+
+uint32_t multi_opcode_98[2] = {
+	0x09140018,
+0 };
+
+uint32_t multi_opcode_99[1] = {
+0 };
+
+uint32_t multi_opcode_100[3] = {
+	0x09160060,
+	0x08160060,
+0 };
+
+uint32_t multi_opcode_101[1] = {
+0 };
+
+uint32_t multi_opcode_102[1] = {
+0 };
+
+uint32_t multi_opcode_103[1] = {
+0 };
+
+uint32_t multi_opcode_104[1] = {
+0 };
+
+uint32_t multi_opcode_105[1] = {
+0 };
+
+uint32_t multi_opcode_106[1] = {
+0 };
+
+uint32_t multi_opcode_107[1] = {
+0 };
+
+uint32_t multi_opcode_108[1] = {
+0 };
+
+uint32_t multi_opcode_109[1] = {
+0 };
+
+uint32_t multi_opcode_110[1] = {
+0 };
+
+uint32_t multi_opcode_111[1] = {
+0 };
+
+uint32_t multi_opcode_112[2] = {
+	0x08150003,
+0 };
+
+uint32_t multi_opcode_113[3] = {
+	0x0817000c,
+	0x09150006,
+0 };
+
+uint32_t multi_opcode_114[2] = {
+	0x09150018,
+0 };
+
+uint32_t multi_opcode_115[1] = {
+0 };
+
+uint32_t multi_opcode_116[1] = {
+0 };
+
+uint32_t multi_opcode_117[1] = {
+0 };
+
+uint32_t multi_opcode_118[1] = {
+0 };
+
+uint32_t multi_opcode_119[1] = {
+0 };
+
+uint32_t multi_opcode_120[1] = {
+0 };
+
+uint32_t multi_opcode_121[1] = {
+0 };
+
+uint32_t multi_opcode_122[1] = {
+0 };
+
+uint32_t multi_opcode_123[1] = {
+0 };
+
+uint32_t multi_opcode_124[1] = {
+0 };
+
+uint32_t multi_opcode_125[1] = {
+0 };
+
+uint32_t multi_opcode_126[1] = {
+0 };
+
+uint32_t multi_opcode_127[1] = {
+0 };
+
+uint32_t multi_opcode_128[5] = {
+	0x08820003,
+	0x08a01008,
+	0x08a05008,
+	0x08a20600,
+0 };
+
+uint32_t multi_opcode_129[3] = {
+	0x08800006,
+	0x08880006,
+0 };
+
+uint32_t multi_opcode_130[7] = {
+	0x08820018,
+	0x08a05018,
+	0x08880018,
+	0x08820030,
+	0x08800018,
+	0x08800030,
+0 };
+
+uint32_t multi_opcode_131[1] = {
+0 };
+
+uint32_t multi_opcode_132[2] = {
+	0x088200c0,
+0 };
+
+uint32_t multi_opcode_133[1] = {
+0 };
+
+uint32_t multi_opcode_134[1] = {
+0 };
+
+uint32_t multi_opcode_135[1] = {
+0 };
+
+uint32_t multi_opcode_136[3] = {
+	0x08820180,
+	0x08800180,
+0 };
+
+uint32_t multi_opcode_137[1] = {
+0 };
+
+uint32_t multi_opcode_138[1] = {
+0 };
+
+uint32_t multi_opcode_139[1] = {
+0 };
+
+uint32_t multi_opcode_140[1] = {
+0 };
+
+uint32_t multi_opcode_141[1] = {
+0 };
+
+uint32_t multi_opcode_142[3] = {
+	0x08a051f8,
+	0x08807ff0,
+0 };
+
+uint32_t multi_opcode_143[1] = {
+0 };
+
+uint32_t multi_opcode_144[5] = {
+	0x08830600,
+	0x08810600,
+	0x098b0003,
+	0x08830003,
+0 };
+
+uint32_t multi_opcode_145[5] = {
+	0x08830006,
+	0x08890006,
+	0x09830006,
+	0x0989000c,
+0 };
+
+uint32_t multi_opcode_146[4] = {
+	0x08810018,
+	0x08830030,
+	0x08890030,
+0 };
+
+uint32_t multi_opcode_147[1] = {
+0 };
+
+uint32_t multi_opcode_148[5] = {
+	0x08830060,
+	0x08a100c0,
+	0x088900c0,
+	0x088300c0,
+0 };
+
+uint32_t multi_opcode_149[1] = {
+0 };
+
+uint32_t multi_opcode_150[1] = {
+0 };
+
+uint32_t multi_opcode_151[1] = {
+0 };
+
+uint32_t multi_opcode_152[4] = {
+	0x08a10300,
+	0x08a10f00,
+	0x08830300,
+0 };
+
+uint32_t multi_opcode_153[1] = {
+0 };
+
+uint32_t multi_opcode_154[1] = {
+0 };
+
+uint32_t multi_opcode_155[1] = {
+0 };
+
+uint32_t multi_opcode_156[1] = {
+0 };
+
+uint32_t multi_opcode_157[1] = {
+0 };
+
+uint32_t multi_opcode_158[2] = {
+	0x08a151f8,
+0 };
+
+uint32_t multi_opcode_159[1] = {
+0 };
+
+uint32_t multi_opcode_160[6] = {
+	0x08840003,
+	0x088e1002,
+	0x08840600,
+	0x088c0003,
+	0x098c0003,
+0 };
+
+uint32_t multi_opcode_161[8] = {
+	0x08ac000c,
+	0x088c0006,
+	0x08860006,
+	0x088e000c,
+	0x09860006,
+	0x098c0006,
+	0x08ac000f,
+0 };
+
+uint32_t multi_opcode_162[4] = {
+	0x088e0018,
+	0x088c0018,
+	0x09860030,
+0 };
+
+uint32_t multi_opcode_163[1] = {
+0 };
+
+uint32_t multi_opcode_164[4] = {
+	0x088c0060,
+	0x088e00c0,
+	0x088c00c8,
+0 };
+
+uint32_t multi_opcode_165[1] = {
+0 };
+
+uint32_t multi_opcode_166[1] = {
+0 };
+
+uint32_t multi_opcode_167[1] = {
+0 };
+
+uint32_t multi_opcode_168[1] = {
+0 };
+
+uint32_t multi_opcode_169[1] = {
+0 };
+
+uint32_t multi_opcode_170[1] = {
+0 };
+
+uint32_t multi_opcode_171[1] = {
+0 };
+
+uint32_t multi_opcode_172[1] = {
+0 };
+
+uint32_t multi_opcode_173[1] = {
+0 };
+
+uint32_t multi_opcode_174[1] = {
+0 };
+
+uint32_t multi_opcode_175[1] = {
+0 };
+
+uint32_t multi_opcode_176[4] = {
+	0x08850003,
+	0x088d0088,
+	0x088d1020,
+0 };
+
+uint32_t multi_opcode_177[5] = {
+	0x08850006,
+	0x08870006,
+	0x0885000c,
+	0x098d000e,
+0 };
+
+uint32_t multi_opcode_178[7] = {
+	0x09870018,
+	0x098d0030,
+	0x088d1010,
+	0x088d0030,
+	0x088d4010,
+	0x08850018,
+0 };
+
+uint32_t multi_opcode_179[2] = {
+	0x09850014,
+0 };
+
+uint32_t multi_opcode_180[1] = {
+0 };
+
+uint32_t multi_opcode_181[1] = {
+0 };
+
+uint32_t multi_opcode_182[1] = {
+0 };
+
+uint32_t multi_opcode_183[1] = {
+0 };
+
+uint32_t multi_opcode_184[3] = {
+	0x088d1100,
+	0x088d0180,
+0 };
+
+uint32_t multi_opcode_185[1] = {
+0 };
+
+uint32_t multi_opcode_186[1] = {
+0 };
+
+uint32_t multi_opcode_187[1] = {
+0 };
+
+uint32_t multi_opcode_188[1] = {
+0 };
+
+uint32_t multi_opcode_189[1] = {
+0 };
+
+uint32_t multi_opcode_190[1] = {
+0 };
+
+uint32_t multi_opcode_191[2] = {
+	0x088d1fff,
+0 };
+
+uint32_t multi_opcode_192[7] = {
+	0x08920003,
+	0x08900003,
+	0x09920003,
+	0x08980003,
+	0x09904008,
+	0x099a0003,
+0 };
+
+uint32_t multi_opcode_193[5] = {
+	0x08900006,
+	0x0892000c,
+	0x08920006,
+	0x08980006,
+0 };
+
+uint32_t multi_opcode_194[6] = {
+	0x08920018,
+	0x08980018,
+	0x08900018,
+	0x09900018,
+	0x08920030,
+0 };
+
+uint32_t multi_opcode_195[1] = {
+0 };
+
+uint32_t multi_opcode_196[5] = {
+	0x08b000c0,
+	0x08980060,
+	0x08900060,
+	0x089200c0,
+0 };
+
+uint32_t multi_opcode_197[1] = {
+0 };
+
+uint32_t multi_opcode_198[1] = {
+0 };
+
+uint32_t multi_opcode_199[1] = {
+0 };
+
+uint32_t multi_opcode_200[4] = {
+	0x08b00300,
+	0x09900120,
+	0x08980300,
+0 };
+
+uint32_t multi_opcode_201[1] = {
+0 };
+
+uint32_t multi_opcode_202[1] = {
+0 };
+
+uint32_t multi_opcode_203[1] = {
+0 };
+
+uint32_t multi_opcode_204[2] = {
+	0x08b00fc0,
+0 };
+
+uint32_t multi_opcode_205[1] = {
+0 };
+
+uint32_t multi_opcode_206[2] = {
+	0x08b051f8,
+0 };
+
+uint32_t multi_opcode_207[1] = {
+0 };
+
+uint32_t multi_opcode_208[9] = {
+	0x08930003,
+	0x08910003,
+	0x08930600,
+	0x08b11008,
+	0x08b15008,
+	0x08931008,
+	0x08990600,
+	0x08990003,
+0 };
+
+uint32_t multi_opcode_209[7] = {
+	0x08930006,
+	0x0891000e,
+	0x08910006,
+	0x09930006,
+	0x0893000c,
+	0x08990006,
+0 };
+
+uint32_t multi_opcode_210[6] = {
+	0x08b15018,
+	0x08930018,
+	0x099b0030,
+	0x08910030,
+	0x08990018,
+0 };
+
+uint32_t multi_opcode_211[1] = {
+0 };
+
+uint32_t multi_opcode_212[4] = {
+	0x08930060,
+	0x089100c0,
+	0x089300c0,
+0 };
+
+uint32_t multi_opcode_213[1] = {
+0 };
+
+uint32_t multi_opcode_214[1] = {
+0 };
+
+uint32_t multi_opcode_215[1] = {
+0 };
+
+uint32_t multi_opcode_216[3] = {
+	0x08930180,
+	0x099b0180,
+0 };
+
+uint32_t multi_opcode_217[1] = {
+0 };
+
+uint32_t multi_opcode_218[1] = {
+0 };
+
+uint32_t multi_opcode_219[1] = {
+0 };
+
+uint32_t multi_opcode_220[1] = {
+0 };
+
+uint32_t multi_opcode_221[1] = {
+0 };
+
+uint32_t multi_opcode_222[1] = {
+0 };
+
+uint32_t multi_opcode_223[1] = {
+0 };
+
+uint32_t multi_opcode_224[6] = {
+	0x08940003,
+	0x089e000a,
+	0x0894000a,
+	0x08940009,
+	0x089c5000,
+0 };
+
+uint32_t multi_opcode_225[6] = {
+	0x0894000c,
+	0x089c0006,
+	0x0896000c,
+	0x089c000c,
+	0x08be000f,
+0 };
+
+uint32_t multi_opcode_226[8] = {
+	0x089e0018,
+	0x09940018,
+	0x089c0018,
+	0x089e0030,
+	0x08940012,
+	0x08940018,
+	0x08960030,
+0 };
+
+uint32_t multi_opcode_227[1] = {
+0 };
+
+uint32_t multi_opcode_228[2] = {
+	0x089e0060,
+0 };
+
+uint32_t multi_opcode_229[1] = {
+0 };
+
+uint32_t multi_opcode_230[1] = {
+0 };
+
+uint32_t multi_opcode_231[1] = {
+0 };
+
+uint32_t multi_opcode_232[3] = {
+	0x099c0180,
+	0x089c0300,
+0 };
+
+uint32_t multi_opcode_233[1] = {
+0 };
+
+uint32_t multi_opcode_234[1] = {
+0 };
+
+uint32_t multi_opcode_235[1] = {
+0 };
+
+uint32_t multi_opcode_236[1] = {
+0 };
+
+uint32_t multi_opcode_237[1] = {
+0 };
+
+uint32_t multi_opcode_238[1] = {
+0 };
+
+uint32_t multi_opcode_239[1] = {
+0 };
+
+uint32_t multi_opcode_240[7] = {
+	0x08bd8000,
+	0x08bd8001,
+	0x08950003,
+	0x08bd0400,
+	0x08970600,
+	0x08bd8400,
+0 };
+
+uint32_t multi_opcode_241[3] = {
+	0x08950006,
+	0x08970006,
+0 };
+
+uint32_t multi_opcode_242[8] = {
+	0x08bd8010,
+	0x08bd8030,
+	0x08bd0030,
+	0x08bd0010,
+	0x08bd4010,
+	0x08950030,
+	0x08970030,
+0 };
+
+uint32_t multi_opcode_243[2] = {
+	0x08bd4c1f,
+0 };
+
+uint32_t multi_opcode_244[3] = {
+	0x08971040,
+	0x08950060,
+0 };
+
+uint32_t multi_opcode_245[1] = {
+0 };
+
+uint32_t multi_opcode_246[6] = {
+	0x08bd8070,
+	0x08bd40f0,
+	0x08bd80f0,
+	0x08bd0070,
+	0x08bd00f0,
+0 };
+
+uint32_t multi_opcode_247[1] = {
+0 };
+
+uint32_t multi_opcode_248[3] = {
+	0x08970300,
+	0x08970180,
+0 };
+
+uint32_t multi_opcode_249[1] = {
+0 };
+
+uint32_t multi_opcode_250[1] = {
+0 };
+
+uint32_t multi_opcode_251[1] = {
+0 };
+
+uint32_t multi_opcode_252[1] = {
+0 };
+
+uint32_t multi_opcode_253[1] = {
+0 };
+
+uint32_t multi_opcode_254[6] = {
+	0x08bd81f0,
+	0x08bd0ff0,
+	0x08bd87f0,
+	0x08bd85f0,
+	0x08bd41f0,
+0 };
+
+uint32_t multi_opcode_255[1] = {
+0 };
+void (*multi_opcode_f_0[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08020003__eq,
+	arm_instr_multi_0x08020003__ne,
+	arm_instr_multi_0x08020003__cs,
+	arm_instr_multi_0x08020003__cc,
+	arm_instr_multi_0x08020003__mi,
+	arm_instr_multi_0x08020003__pl,
+	arm_instr_multi_0x08020003__vs,
+	arm_instr_multi_0x08020003__vc,
+	arm_instr_multi_0x08020003__hi,
+	arm_instr_multi_0x08020003__ls,
+	arm_instr_multi_0x08020003__ge,
+	arm_instr_multi_0x08020003__lt,
+	arm_instr_multi_0x08020003__gt,
+	arm_instr_multi_0x08020003__le,
+	arm_instr_multi_0x08020003,
+	arm_instr_nop,
+	arm_instr_multi_0x09201008__eq,
+	arm_instr_multi_0x09201008__ne,
+	arm_instr_multi_0x09201008__cs,
+	arm_instr_multi_0x09201008__cc,
+	arm_instr_multi_0x09201008__mi,
+	arm_instr_multi_0x09201008__pl,
+	arm_instr_multi_0x09201008__vs,
+	arm_instr_multi_0x09201008__vc,
+	arm_instr_multi_0x09201008__hi,
+	arm_instr_multi_0x09201008__ls,
+	arm_instr_multi_0x09201008__ge,
+	arm_instr_multi_0x09201008__lt,
+	arm_instr_multi_0x09201008__gt,
+	arm_instr_multi_0x09201008__le,
+	arm_instr_multi_0x09201008,
+	arm_instr_nop,
+	arm_instr_multi_0x09205008__eq,
+	arm_instr_multi_0x09205008__ne,
+	arm_instr_multi_0x09205008__cs,
+	arm_instr_multi_0x09205008__cc,
+	arm_instr_multi_0x09205008__mi,
+	arm_instr_multi_0x09205008__pl,
+	arm_instr_multi_0x09205008__vs,
+	arm_instr_multi_0x09205008__vc,
+	arm_instr_multi_0x09205008__hi,
+	arm_instr_multi_0x09205008__ls,
+	arm_instr_multi_0x09205008__ge,
+	arm_instr_multi_0x09205008__lt,
+	arm_instr_multi_0x09205008__gt,
+	arm_instr_multi_0x09205008__le,
+	arm_instr_multi_0x09205008,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_2[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09205018__eq,
+	arm_instr_multi_0x09205018__ne,
+	arm_instr_multi_0x09205018__cs,
+	arm_instr_multi_0x09205018__cc,
+	arm_instr_multi_0x09205018__mi,
+	arm_instr_multi_0x09205018__pl,
+	arm_instr_multi_0x09205018__vs,
+	arm_instr_multi_0x09205018__vc,
+	arm_instr_multi_0x09205018__hi,
+	arm_instr_multi_0x09205018__ls,
+	arm_instr_multi_0x09205018__ge,
+	arm_instr_multi_0x09205018__lt,
+	arm_instr_multi_0x09205018__gt,
+	arm_instr_multi_0x09205018__le,
+	arm_instr_multi_0x09205018,
+	arm_instr_nop,
+	arm_instr_multi_0x09205030__eq,
+	arm_instr_multi_0x09205030__ne,
+	arm_instr_multi_0x09205030__cs,
+	arm_instr_multi_0x09205030__cc,
+	arm_instr_multi_0x09205030__mi,
+	arm_instr_multi_0x09205030__pl,
+	arm_instr_multi_0x09205030__vs,
+	arm_instr_multi_0x09205030__vc,
+	arm_instr_multi_0x09205030__hi,
+	arm_instr_multi_0x09205030__ls,
+	arm_instr_multi_0x09205030__ge,
+	arm_instr_multi_0x09205030__lt,
+	arm_instr_multi_0x09205030__gt,
+	arm_instr_multi_0x09205030__le,
+	arm_instr_multi_0x09205030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_8[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x090a0300__eq,
+	arm_instr_multi_0x090a0300__ne,
+	arm_instr_multi_0x090a0300__cs,
+	arm_instr_multi_0x090a0300__cc,
+	arm_instr_multi_0x090a0300__mi,
+	arm_instr_multi_0x090a0300__pl,
+	arm_instr_multi_0x090a0300__vs,
+	arm_instr_multi_0x090a0300__vc,
+	arm_instr_multi_0x090a0300__hi,
+	arm_instr_multi_0x090a0300__ls,
+	arm_instr_multi_0x090a0300__ge,
+	arm_instr_multi_0x090a0300__lt,
+	arm_instr_multi_0x090a0300__gt,
+	arm_instr_multi_0x090a0300__le,
+	arm_instr_multi_0x090a0300,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_18[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09010018__eq,
+	arm_instr_multi_0x09010018__ne,
+	arm_instr_multi_0x09010018__cs,
+	arm_instr_multi_0x09010018__cc,
+	arm_instr_multi_0x09010018__mi,
+	arm_instr_multi_0x09010018__pl,
+	arm_instr_multi_0x09010018__vs,
+	arm_instr_multi_0x09010018__vc,
+	arm_instr_multi_0x09010018__hi,
+	arm_instr_multi_0x09010018__ls,
+	arm_instr_multi_0x09010018__ge,
+	arm_instr_multi_0x09010018__lt,
+	arm_instr_multi_0x09010018__gt,
+	arm_instr_multi_0x09010018__le,
+	arm_instr_multi_0x09010018,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_32[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09040003__eq,
+	arm_instr_multi_0x09040003__ne,
+	arm_instr_multi_0x09040003__cs,
+	arm_instr_multi_0x09040003__cc,
+	arm_instr_multi_0x09040003__mi,
+	arm_instr_multi_0x09040003__pl,
+	arm_instr_multi_0x09040003__vs,
+	arm_instr_multi_0x09040003__vc,
+	arm_instr_multi_0x09040003__hi,
+	arm_instr_multi_0x09040003__ls,
+	arm_instr_multi_0x09040003__ge,
+	arm_instr_multi_0x09040003__lt,
+	arm_instr_multi_0x09040003__gt,
+	arm_instr_multi_0x09040003__le,
+	arm_instr_multi_0x09040003,
+	arm_instr_nop,
+	arm_instr_multi_0x080c0003__eq,
+	arm_instr_multi_0x080c0003__ne,
+	arm_instr_multi_0x080c0003__cs,
+	arm_instr_multi_0x080c0003__cc,
+	arm_instr_multi_0x080c0003__mi,
+	arm_instr_multi_0x080c0003__pl,
+	arm_instr_multi_0x080c0003__vs,
+	arm_instr_multi_0x080c0003__vc,
+	arm_instr_multi_0x080c0003__hi,
+	arm_instr_multi_0x080c0003__ls,
+	arm_instr_multi_0x080c0003__ge,
+	arm_instr_multi_0x080c0003__lt,
+	arm_instr_multi_0x080c0003__gt,
+	arm_instr_multi_0x080c0003__le,
+	arm_instr_multi_0x080c0003,
+	arm_instr_nop,
+	arm_instr_multi_0x080c0600__eq,
+	arm_instr_multi_0x080c0600__ne,
+	arm_instr_multi_0x080c0600__cs,
+	arm_instr_multi_0x080c0600__cc,
+	arm_instr_multi_0x080c0600__mi,
+	arm_instr_multi_0x080c0600__pl,
+	arm_instr_multi_0x080c0600__vs,
+	arm_instr_multi_0x080c0600__vc,
+	arm_instr_multi_0x080c0600__hi,
+	arm_instr_multi_0x080c0600__ls,
+	arm_instr_multi_0x080c0600__ge,
+	arm_instr_multi_0x080c0600__lt,
+	arm_instr_multi_0x080c0600__gt,
+	arm_instr_multi_0x080c0600__le,
+	arm_instr_multi_0x080c0600,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_33[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08040006__eq,
+	arm_instr_multi_0x08040006__ne,
+	arm_instr_multi_0x08040006__cs,
+	arm_instr_multi_0x08040006__cc,
+	arm_instr_multi_0x08040006__mi,
+	arm_instr_multi_0x08040006__pl,
+	arm_instr_multi_0x08040006__vs,
+	arm_instr_multi_0x08040006__vc,
+	arm_instr_multi_0x08040006__hi,
+	arm_instr_multi_0x08040006__ls,
+	arm_instr_multi_0x08040006__ge,
+	arm_instr_multi_0x08040006__lt,
+	arm_instr_multi_0x08040006__gt,
+	arm_instr_multi_0x08040006__le,
+	arm_instr_multi_0x08040006,
+	arm_instr_nop,
+	arm_instr_multi_0x0804000c__eq,
+	arm_instr_multi_0x0804000c__ne,
+	arm_instr_multi_0x0804000c__cs,
+	arm_instr_multi_0x0804000c__cc,
+	arm_instr_multi_0x0804000c__mi,
+	arm_instr_multi_0x0804000c__pl,
+	arm_instr_multi_0x0804000c__vs,
+	arm_instr_multi_0x0804000c__vc,
+	arm_instr_multi_0x0804000c__hi,
+	arm_instr_multi_0x0804000c__ls,
+	arm_instr_multi_0x0804000c__ge,
+	arm_instr_multi_0x0804000c__lt,
+	arm_instr_multi_0x0804000c__gt,
+	arm_instr_multi_0x0804000c__le,
+	arm_instr_multi_0x0804000c,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_34[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x080c0030__eq,
+	arm_instr_multi_0x080c0030__ne,
+	arm_instr_multi_0x080c0030__cs,
+	arm_instr_multi_0x080c0030__cc,
+	arm_instr_multi_0x080c0030__mi,
+	arm_instr_multi_0x080c0030__pl,
+	arm_instr_multi_0x080c0030__vs,
+	arm_instr_multi_0x080c0030__vc,
+	arm_instr_multi_0x080c0030__hi,
+	arm_instr_multi_0x080c0030__ls,
+	arm_instr_multi_0x080c0030__ge,
+	arm_instr_multi_0x080c0030__lt,
+	arm_instr_multi_0x080c0030__gt,
+	arm_instr_multi_0x080c0030__le,
+	arm_instr_multi_0x080c0030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_48[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x092d4000__eq,
+	arm_instr_multi_0x092d4000__ne,
+	arm_instr_multi_0x092d4000__cs,
+	arm_instr_multi_0x092d4000__cc,
+	arm_instr_multi_0x092d4000__mi,
+	arm_instr_multi_0x092d4000__pl,
+	arm_instr_multi_0x092d4000__vs,
+	arm_instr_multi_0x092d4000__vc,
+	arm_instr_multi_0x092d4000__hi,
+	arm_instr_multi_0x092d4000__ls,
+	arm_instr_multi_0x092d4000__ge,
+	arm_instr_multi_0x092d4000__lt,
+	arm_instr_multi_0x092d4000__gt,
+	arm_instr_multi_0x092d4000__le,
+	arm_instr_multi_0x092d4000,
+	arm_instr_nop,
+	arm_instr_multi_0x092dd800__eq,
+	arm_instr_multi_0x092dd800__ne,
+	arm_instr_multi_0x092dd800__cs,
+	arm_instr_multi_0x092dd800__cc,
+	arm_instr_multi_0x092dd800__mi,
+	arm_instr_multi_0x092dd800__pl,
+	arm_instr_multi_0x092dd800__vs,
+	arm_instr_multi_0x092dd800__vc,
+	arm_instr_multi_0x092dd800__hi,
+	arm_instr_multi_0x092dd800__ls,
+	arm_instr_multi_0x092dd800__ge,
+	arm_instr_multi_0x092dd800__lt,
+	arm_instr_multi_0x092dd800__gt,
+	arm_instr_multi_0x092dd800__le,
+	arm_instr_multi_0x092dd800,
+	arm_instr_nop,
+	arm_instr_multi_0x092d4001__eq,
+	arm_instr_multi_0x092d4001__ne,
+	arm_instr_multi_0x092d4001__cs,
+	arm_instr_multi_0x092d4001__cc,
+	arm_instr_multi_0x092d4001__mi,
+	arm_instr_multi_0x092d4001__pl,
+	arm_instr_multi_0x092d4001__vs,
+	arm_instr_multi_0x092d4001__vc,
+	arm_instr_multi_0x092d4001__hi,
+	arm_instr_multi_0x092d4001__ls,
+	arm_instr_multi_0x092d4001__ge,
+	arm_instr_multi_0x092d4001__lt,
+	arm_instr_multi_0x092d4001__gt,
+	arm_instr_multi_0x092d4001__le,
+	arm_instr_multi_0x092d4001,
+	arm_instr_nop,
+	arm_instr_multi_0x092ddc00__eq,
+	arm_instr_multi_0x092ddc00__ne,
+	arm_instr_multi_0x092ddc00__cs,
+	arm_instr_multi_0x092ddc00__cc,
+	arm_instr_multi_0x092ddc00__mi,
+	arm_instr_multi_0x092ddc00__pl,
+	arm_instr_multi_0x092ddc00__vs,
+	arm_instr_multi_0x092ddc00__vc,
+	arm_instr_multi_0x092ddc00__hi,
+	arm_instr_multi_0x092ddc00__ls,
+	arm_instr_multi_0x092ddc00__ge,
+	arm_instr_multi_0x092ddc00__lt,
+	arm_instr_multi_0x092ddc00__gt,
+	arm_instr_multi_0x092ddc00__le,
+	arm_instr_multi_0x092ddc00,
+	arm_instr_nop,
+	arm_instr_multi_0x092d4400__eq,
+	arm_instr_multi_0x092d4400__ne,
+	arm_instr_multi_0x092d4400__cs,
+	arm_instr_multi_0x092d4400__cc,
+	arm_instr_multi_0x092d4400__mi,
+	arm_instr_multi_0x092d4400__pl,
+	arm_instr_multi_0x092d4400__vs,
+	arm_instr_multi_0x092d4400__vc,
+	arm_instr_multi_0x092d4400__hi,
+	arm_instr_multi_0x092d4400__ls,
+	arm_instr_multi_0x092d4400__ge,
+	arm_instr_multi_0x092d4400__lt,
+	arm_instr_multi_0x092d4400__gt,
+	arm_instr_multi_0x092d4400__le,
+	arm_instr_multi_0x092d4400,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_49[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x090d000f__eq,
+	arm_instr_multi_0x090d000f__ne,
+	arm_instr_multi_0x090d000f__cs,
+	arm_instr_multi_0x090d000f__cc,
+	arm_instr_multi_0x090d000f__mi,
+	arm_instr_multi_0x090d000f__pl,
+	arm_instr_multi_0x090d000f__vs,
+	arm_instr_multi_0x090d000f__vc,
+	arm_instr_multi_0x090d000f__hi,
+	arm_instr_multi_0x090d000f__ls,
+	arm_instr_multi_0x090d000f__ge,
+	arm_instr_multi_0x090d000f__lt,
+	arm_instr_multi_0x090d000f__gt,
+	arm_instr_multi_0x090d000f__le,
+	arm_instr_multi_0x090d000f,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_50[112])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x092dd830__eq,
+	arm_instr_multi_0x092dd830__ne,
+	arm_instr_multi_0x092dd830__cs,
+	arm_instr_multi_0x092dd830__cc,
+	arm_instr_multi_0x092dd830__mi,
+	arm_instr_multi_0x092dd830__pl,
+	arm_instr_multi_0x092dd830__vs,
+	arm_instr_multi_0x092dd830__vc,
+	arm_instr_multi_0x092dd830__hi,
+	arm_instr_multi_0x092dd830__ls,
+	arm_instr_multi_0x092dd830__ge,
+	arm_instr_multi_0x092dd830__lt,
+	arm_instr_multi_0x092dd830__gt,
+	arm_instr_multi_0x092dd830__le,
+	arm_instr_multi_0x092dd830,
+	arm_instr_nop,
+	arm_instr_multi_0x092dd810__eq,
+	arm_instr_multi_0x092dd810__ne,
+	arm_instr_multi_0x092dd810__cs,
+	arm_instr_multi_0x092dd810__cc,
+	arm_instr_multi_0x092dd810__mi,
+	arm_instr_multi_0x092dd810__pl,
+	arm_instr_multi_0x092dd810__vs,
+	arm_instr_multi_0x092dd810__vc,
+	arm_instr_multi_0x092dd810__hi,
+	arm_instr_multi_0x092dd810__ls,
+	arm_instr_multi_0x092dd810__ge,
+	arm_instr_multi_0x092dd810__lt,
+	arm_instr_multi_0x092dd810__gt,
+	arm_instr_multi_0x092dd810__le,
+	arm_instr_multi_0x092dd810,
+	arm_instr_nop,
+	arm_instr_multi_0x092d4010__eq,
+	arm_instr_multi_0x092d4010__ne,
+	arm_instr_multi_0x092d4010__cs,
+	arm_instr_multi_0x092d4010__cc,
+	arm_instr_multi_0x092d4010__mi,
+	arm_instr_multi_0x092d4010__pl,
+	arm_instr_multi_0x092d4010__vs,
+	arm_instr_multi_0x092d4010__vc,
+	arm_instr_multi_0x092d4010__hi,
+	arm_instr_multi_0x092d4010__ls,
+	arm_instr_multi_0x092d4010__ge,
+	arm_instr_multi_0x092d4010__lt,
+	arm_instr_multi_0x092d4010__gt,
+	arm_instr_multi_0x092d4010__le,
+	arm_instr_multi_0x092d4010,
+	arm_instr_nop,
+	arm_instr_multi_0x092d4030__eq,
+	arm_instr_multi_0x092d4030__ne,
+	arm_instr_multi_0x092d4030__cs,
+	arm_instr_multi_0x092d4030__cc,
+	arm_instr_multi_0x092d4030__mi,
+	arm_instr_multi_0x092d4030__pl,
+	arm_instr_multi_0x092d4030__vs,
+	arm_instr_multi_0x092d4030__vc,
+	arm_instr_multi_0x092d4030__hi,
+	arm_instr_multi_0x092d4030__ls,
+	arm_instr_multi_0x092d4030__ge,
+	arm_instr_multi_0x092d4030__lt,
+	arm_instr_multi_0x092d4030__gt,
+	arm_instr_multi_0x092d4030__le,
+	arm_instr_multi_0x092d4030,
+	arm_instr_nop,
+	arm_instr_multi_0x092ddc30__eq,
+	arm_instr_multi_0x092ddc30__ne,
+	arm_instr_multi_0x092ddc30__cs,
+	arm_instr_multi_0x092ddc30__cc,
+	arm_instr_multi_0x092ddc30__mi,
+	arm_instr_multi_0x092ddc30__pl,
+	arm_instr_multi_0x092ddc30__vs,
+	arm_instr_multi_0x092ddc30__vc,
+	arm_instr_multi_0x092ddc30__hi,
+	arm_instr_multi_0x092ddc30__ls,
+	arm_instr_multi_0x092ddc30__ge,
+	arm_instr_multi_0x092ddc30__lt,
+	arm_instr_multi_0x092ddc30__gt,
+	arm_instr_multi_0x092ddc30__le,
+	arm_instr_multi_0x092ddc30,
+	arm_instr_nop,
+	arm_instr_multi_0x092d0030__eq,
+	arm_instr_multi_0x092d0030__ne,
+	arm_instr_multi_0x092d0030__cs,
+	arm_instr_multi_0x092d0030__cc,
+	arm_instr_multi_0x092d0030__mi,
+	arm_instr_multi_0x092d0030__pl,
+	arm_instr_multi_0x092d0030__vs,
+	arm_instr_multi_0x092d0030__vc,
+	arm_instr_multi_0x092d0030__hi,
+	arm_instr_multi_0x092d0030__ls,
+	arm_instr_multi_0x092d0030__ge,
+	arm_instr_multi_0x092d0030__lt,
+	arm_instr_multi_0x092d0030__gt,
+	arm_instr_multi_0x092d0030__le,
+	arm_instr_multi_0x092d0030,
+	arm_instr_nop,
+	arm_instr_multi_0x092d0010__eq,
+	arm_instr_multi_0x092d0010__ne,
+	arm_instr_multi_0x092d0010__cs,
+	arm_instr_multi_0x092d0010__cc,
+	arm_instr_multi_0x092d0010__mi,
+	arm_instr_multi_0x092d0010__pl,
+	arm_instr_multi_0x092d0010__vs,
+	arm_instr_multi_0x092d0010__vc,
+	arm_instr_multi_0x092d0010__hi,
+	arm_instr_multi_0x092d0010__ls,
+	arm_instr_multi_0x092d0010__ge,
+	arm_instr_multi_0x092d0010__lt,
+	arm_instr_multi_0x092d0010__gt,
+	arm_instr_multi_0x092d0010__le,
+	arm_instr_multi_0x092d0010,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_51[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x092d0c1f__eq,
+	arm_instr_multi_0x092d0c1f__ne,
+	arm_instr_multi_0x092d0c1f__cs,
+	arm_instr_multi_0x092d0c1f__cc,
+	arm_instr_multi_0x092d0c1f__mi,
+	arm_instr_multi_0x092d0c1f__pl,
+	arm_instr_multi_0x092d0c1f__vs,
+	arm_instr_multi_0x092d0c1f__vc,
+	arm_instr_multi_0x092d0c1f__hi,
+	arm_instr_multi_0x092d0c1f__ls,
+	arm_instr_multi_0x092d0c1f__ge,
+	arm_instr_multi_0x092d0c1f__lt,
+	arm_instr_multi_0x092d0c1f__gt,
+	arm_instr_multi_0x092d0c1f__le,
+	arm_instr_multi_0x092d0c1f,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_54[128])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x092dd8f0__eq,
+	arm_instr_multi_0x092dd8f0__ne,
+	arm_instr_multi_0x092dd8f0__cs,
+	arm_instr_multi_0x092dd8f0__cc,
+	arm_instr_multi_0x092dd8f0__mi,
+	arm_instr_multi_0x092dd8f0__pl,
+	arm_instr_multi_0x092dd8f0__vs,
+	arm_instr_multi_0x092dd8f0__vc,
+	arm_instr_multi_0x092dd8f0__hi,
+	arm_instr_multi_0x092dd8f0__ls,
+	arm_instr_multi_0x092dd8f0__ge,
+	arm_instr_multi_0x092dd8f0__lt,
+	arm_instr_multi_0x092dd8f0__gt,
+	arm_instr_multi_0x092dd8f0__le,
+	arm_instr_multi_0x092dd8f0,
+	arm_instr_nop,
+	arm_instr_multi_0x092dd870__eq,
+	arm_instr_multi_0x092dd870__ne,
+	arm_instr_multi_0x092dd870__cs,
+	arm_instr_multi_0x092dd870__cc,
+	arm_instr_multi_0x092dd870__mi,
+	arm_instr_multi_0x092dd870__pl,
+	arm_instr_multi_0x092dd870__vs,
+	arm_instr_multi_0x092dd870__vc,
+	arm_instr_multi_0x092dd870__hi,
+	arm_instr_multi_0x092dd870__ls,
+	arm_instr_multi_0x092dd870__ge,
+	arm_instr_multi_0x092dd870__lt,
+	arm_instr_multi_0x092dd870__gt,
+	arm_instr_multi_0x092dd870__le,
+	arm_instr_multi_0x092dd870,
+	arm_instr_nop,
+	arm_instr_multi_0x092d4070__eq,
+	arm_instr_multi_0x092d4070__ne,
+	arm_instr_multi_0x092d4070__cs,
+	arm_instr_multi_0x092d4070__cc,
+	arm_instr_multi_0x092d4070__mi,
+	arm_instr_multi_0x092d4070__pl,
+	arm_instr_multi_0x092d4070__vs,
+	arm_instr_multi_0x092d4070__vc,
+	arm_instr_multi_0x092d4070__hi,
+	arm_instr_multi_0x092d4070__ls,
+	arm_instr_multi_0x092d4070__ge,
+	arm_instr_multi_0x092d4070__lt,
+	arm_instr_multi_0x092d4070__gt,
+	arm_instr_multi_0x092d4070__le,
+	arm_instr_multi_0x092d4070,
+	arm_instr_nop,
+	arm_instr_multi_0x092ddc70__eq,
+	arm_instr_multi_0x092ddc70__ne,
+	arm_instr_multi_0x092ddc70__cs,
+	arm_instr_multi_0x092ddc70__cc,
+	arm_instr_multi_0x092ddc70__mi,
+	arm_instr_multi_0x092ddc70__pl,
+	arm_instr_multi_0x092ddc70__vs,
+	arm_instr_multi_0x092ddc70__vc,
+	arm_instr_multi_0x092ddc70__hi,
+	arm_instr_multi_0x092ddc70__ls,
+	arm_instr_multi_0x092ddc70__ge,
+	arm_instr_multi_0x092ddc70__lt,
+	arm_instr_multi_0x092ddc70__gt,
+	arm_instr_multi_0x092ddc70__le,
+	arm_instr_multi_0x092ddc70,
+	arm_instr_nop,
+	arm_instr_multi_0x092ddcf0__eq,
+	arm_instr_multi_0x092ddcf0__ne,
+	arm_instr_multi_0x092ddcf0__cs,
+	arm_instr_multi_0x092ddcf0__cc,
+	arm_instr_multi_0x092ddcf0__mi,
+	arm_instr_multi_0x092ddcf0__pl,
+	arm_instr_multi_0x092ddcf0__vs,
+	arm_instr_multi_0x092ddcf0__vc,
+	arm_instr_multi_0x092ddcf0__hi,
+	arm_instr_multi_0x092ddcf0__ls,
+	arm_instr_multi_0x092ddcf0__ge,
+	arm_instr_multi_0x092ddcf0__lt,
+	arm_instr_multi_0x092ddcf0__gt,
+	arm_instr_multi_0x092ddcf0__le,
+	arm_instr_multi_0x092ddcf0,
+	arm_instr_nop,
+	arm_instr_multi_0x092d40f0__eq,
+	arm_instr_multi_0x092d40f0__ne,
+	arm_instr_multi_0x092d40f0__cs,
+	arm_instr_multi_0x092d40f0__cc,
+	arm_instr_multi_0x092d40f0__mi,
+	arm_instr_multi_0x092d40f0__pl,
+	arm_instr_multi_0x092d40f0__vs,
+	arm_instr_multi_0x092d40f0__vc,
+	arm_instr_multi_0x092d40f0__hi,
+	arm_instr_multi_0x092d40f0__ls,
+	arm_instr_multi_0x092d40f0__ge,
+	arm_instr_multi_0x092d40f0__lt,
+	arm_instr_multi_0x092d40f0__gt,
+	arm_instr_multi_0x092d40f0__le,
+	arm_instr_multi_0x092d40f0,
+	arm_instr_nop,
+	arm_instr_multi_0x092d0070__eq,
+	arm_instr_multi_0x092d0070__ne,
+	arm_instr_multi_0x092d0070__cs,
+	arm_instr_multi_0x092d0070__cc,
+	arm_instr_multi_0x092d0070__mi,
+	arm_instr_multi_0x092d0070__pl,
+	arm_instr_multi_0x092d0070__vs,
+	arm_instr_multi_0x092d0070__vc,
+	arm_instr_multi_0x092d0070__hi,
+	arm_instr_multi_0x092d0070__ls,
+	arm_instr_multi_0x092d0070__ge,
+	arm_instr_multi_0x092d0070__lt,
+	arm_instr_multi_0x092d0070__gt,
+	arm_instr_multi_0x092d0070__le,
+	arm_instr_multi_0x092d0070,
+	arm_instr_nop,
+	arm_instr_multi_0x092d00f0__eq,
+	arm_instr_multi_0x092d00f0__ne,
+	arm_instr_multi_0x092d00f0__cs,
+	arm_instr_multi_0x092d00f0__cc,
+	arm_instr_multi_0x092d00f0__mi,
+	arm_instr_multi_0x092d00f0__pl,
+	arm_instr_multi_0x092d00f0__vs,
+	arm_instr_multi_0x092d00f0__vc,
+	arm_instr_multi_0x092d00f0__hi,
+	arm_instr_multi_0x092d00f0__ls,
+	arm_instr_multi_0x092d00f0__ge,
+	arm_instr_multi_0x092d00f0__lt,
+	arm_instr_multi_0x092d00f0__gt,
+	arm_instr_multi_0x092d00f0__le,
+	arm_instr_multi_0x092d00f0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_62[128])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x092ddff0__eq,
+	arm_instr_multi_0x092ddff0__ne,
+	arm_instr_multi_0x092ddff0__cs,
+	arm_instr_multi_0x092ddff0__cc,
+	arm_instr_multi_0x092ddff0__mi,
+	arm_instr_multi_0x092ddff0__pl,
+	arm_instr_multi_0x092ddff0__vs,
+	arm_instr_multi_0x092ddff0__vc,
+	arm_instr_multi_0x092ddff0__hi,
+	arm_instr_multi_0x092ddff0__ls,
+	arm_instr_multi_0x092ddff0__ge,
+	arm_instr_multi_0x092ddff0__lt,
+	arm_instr_multi_0x092ddff0__gt,
+	arm_instr_multi_0x092ddff0__le,
+	arm_instr_multi_0x092ddff0,
+	arm_instr_nop,
+	arm_instr_multi_0x092dddf0__eq,
+	arm_instr_multi_0x092dddf0__ne,
+	arm_instr_multi_0x092dddf0__cs,
+	arm_instr_multi_0x092dddf0__cc,
+	arm_instr_multi_0x092dddf0__mi,
+	arm_instr_multi_0x092dddf0__pl,
+	arm_instr_multi_0x092dddf0__vs,
+	arm_instr_multi_0x092dddf0__vc,
+	arm_instr_multi_0x092dddf0__hi,
+	arm_instr_multi_0x092dddf0__ls,
+	arm_instr_multi_0x092dddf0__ge,
+	arm_instr_multi_0x092dddf0__lt,
+	arm_instr_multi_0x092dddf0__gt,
+	arm_instr_multi_0x092dddf0__le,
+	arm_instr_multi_0x092dddf0,
+	arm_instr_nop,
+	arm_instr_multi_0x092dd9f0__eq,
+	arm_instr_multi_0x092dd9f0__ne,
+	arm_instr_multi_0x092dd9f0__cs,
+	arm_instr_multi_0x092dd9f0__cc,
+	arm_instr_multi_0x092dd9f0__mi,
+	arm_instr_multi_0x092dd9f0__pl,
+	arm_instr_multi_0x092dd9f0__vs,
+	arm_instr_multi_0x092dd9f0__vc,
+	arm_instr_multi_0x092dd9f0__hi,
+	arm_instr_multi_0x092dd9f0__ls,
+	arm_instr_multi_0x092dd9f0__ge,
+	arm_instr_multi_0x092dd9f0__lt,
+	arm_instr_multi_0x092dd9f0__gt,
+	arm_instr_multi_0x092dd9f0__le,
+	arm_instr_multi_0x092dd9f0,
+	arm_instr_nop,
+	arm_instr_multi_0x092d41f0__eq,
+	arm_instr_multi_0x092d41f0__ne,
+	arm_instr_multi_0x092d41f0__cs,
+	arm_instr_multi_0x092d41f0__cc,
+	arm_instr_multi_0x092d41f0__mi,
+	arm_instr_multi_0x092d41f0__pl,
+	arm_instr_multi_0x092d41f0__vs,
+	arm_instr_multi_0x092d41f0__vc,
+	arm_instr_multi_0x092d41f0__hi,
+	arm_instr_multi_0x092d41f0__ls,
+	arm_instr_multi_0x092d41f0__ge,
+	arm_instr_multi_0x092d41f0__lt,
+	arm_instr_multi_0x092d41f0__gt,
+	arm_instr_multi_0x092d41f0__le,
+	arm_instr_multi_0x092d41f0,
+	arm_instr_nop,
+	arm_instr_multi_0x092ddbf0__eq,
+	arm_instr_multi_0x092ddbf0__ne,
+	arm_instr_multi_0x092ddbf0__cs,
+	arm_instr_multi_0x092ddbf0__cc,
+	arm_instr_multi_0x092ddbf0__mi,
+	arm_instr_multi_0x092ddbf0__pl,
+	arm_instr_multi_0x092ddbf0__vs,
+	arm_instr_multi_0x092ddbf0__vc,
+	arm_instr_multi_0x092ddbf0__hi,
+	arm_instr_multi_0x092ddbf0__ls,
+	arm_instr_multi_0x092ddbf0__ge,
+	arm_instr_multi_0x092ddbf0__lt,
+	arm_instr_multi_0x092ddbf0__gt,
+	arm_instr_multi_0x092ddbf0__le,
+	arm_instr_multi_0x092ddbf0,
+	arm_instr_nop,
+	arm_instr_multi_0x092d0ff0__eq,
+	arm_instr_multi_0x092d0ff0__ne,
+	arm_instr_multi_0x092d0ff0__cs,
+	arm_instr_multi_0x092d0ff0__cc,
+	arm_instr_multi_0x092d0ff0__mi,
+	arm_instr_multi_0x092d0ff0__pl,
+	arm_instr_multi_0x092d0ff0__vs,
+	arm_instr_multi_0x092d0ff0__vc,
+	arm_instr_multi_0x092d0ff0__hi,
+	arm_instr_multi_0x092d0ff0__ls,
+	arm_instr_multi_0x092d0ff0__ge,
+	arm_instr_multi_0x092d0ff0__lt,
+	arm_instr_multi_0x092d0ff0__gt,
+	arm_instr_multi_0x092d0ff0__le,
+	arm_instr_multi_0x092d0ff0,
+	arm_instr_nop,
+	arm_instr_multi_0x092d47f0__eq,
+	arm_instr_multi_0x092d47f0__ne,
+	arm_instr_multi_0x092d47f0__cs,
+	arm_instr_multi_0x092d47f0__cc,
+	arm_instr_multi_0x092d47f0__mi,
+	arm_instr_multi_0x092d47f0__pl,
+	arm_instr_multi_0x092d47f0__vs,
+	arm_instr_multi_0x092d47f0__vc,
+	arm_instr_multi_0x092d47f0__hi,
+	arm_instr_multi_0x092d47f0__ls,
+	arm_instr_multi_0x092d47f0__ge,
+	arm_instr_multi_0x092d47f0__lt,
+	arm_instr_multi_0x092d47f0__gt,
+	arm_instr_multi_0x092d47f0__le,
+	arm_instr_multi_0x092d47f0,
+	arm_instr_nop,
+	arm_instr_multi_0x092d45f0__eq,
+	arm_instr_multi_0x092d45f0__ne,
+	arm_instr_multi_0x092d45f0__cs,
+	arm_instr_multi_0x092d45f0__cc,
+	arm_instr_multi_0x092d45f0__mi,
+	arm_instr_multi_0x092d45f0__pl,
+	arm_instr_multi_0x092d45f0__vs,
+	arm_instr_multi_0x092d45f0__vc,
+	arm_instr_multi_0x092d45f0__hi,
+	arm_instr_multi_0x092d45f0__ls,
+	arm_instr_multi_0x092d45f0__ge,
+	arm_instr_multi_0x092d45f0__lt,
+	arm_instr_multi_0x092d45f0__gt,
+	arm_instr_multi_0x092d45f0__le,
+	arm_instr_multi_0x092d45f0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_64[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08100009__eq,
+	arm_instr_multi_0x08100009__ne,
+	arm_instr_multi_0x08100009__cs,
+	arm_instr_multi_0x08100009__cc,
+	arm_instr_multi_0x08100009__mi,
+	arm_instr_multi_0x08100009__pl,
+	arm_instr_multi_0x08100009__vs,
+	arm_instr_multi_0x08100009__vc,
+	arm_instr_multi_0x08100009__hi,
+	arm_instr_multi_0x08100009__ls,
+	arm_instr_multi_0x08100009__ge,
+	arm_instr_multi_0x08100009__lt,
+	arm_instr_multi_0x08100009__gt,
+	arm_instr_multi_0x08100009__le,
+	arm_instr_multi_0x08100009,
+	arm_instr_nop,
+	arm_instr_multi_0x091a0600__eq,
+	arm_instr_multi_0x091a0600__ne,
+	arm_instr_multi_0x091a0600__cs,
+	arm_instr_multi_0x091a0600__cc,
+	arm_instr_multi_0x091a0600__mi,
+	arm_instr_multi_0x091a0600__pl,
+	arm_instr_multi_0x091a0600__vs,
+	arm_instr_multi_0x091a0600__vc,
+	arm_instr_multi_0x091a0600__hi,
+	arm_instr_multi_0x091a0600__ls,
+	arm_instr_multi_0x091a0600__ge,
+	arm_instr_multi_0x091a0600__lt,
+	arm_instr_multi_0x091a0600__gt,
+	arm_instr_multi_0x091a0600__le,
+	arm_instr_multi_0x091a0600,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_65[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09120006__eq,
+	arm_instr_multi_0x09120006__ne,
+	arm_instr_multi_0x09120006__cs,
+	arm_instr_multi_0x09120006__cc,
+	arm_instr_multi_0x09120006__mi,
+	arm_instr_multi_0x09120006__pl,
+	arm_instr_multi_0x09120006__vs,
+	arm_instr_multi_0x09120006__vc,
+	arm_instr_multi_0x09120006__hi,
+	arm_instr_multi_0x09120006__ls,
+	arm_instr_multi_0x09120006__ge,
+	arm_instr_multi_0x09120006__lt,
+	arm_instr_multi_0x09120006__gt,
+	arm_instr_multi_0x09120006__le,
+	arm_instr_multi_0x09120006,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_80[128])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08110003__eq,
+	arm_instr_multi_0x08110003__ne,
+	arm_instr_multi_0x08110003__cs,
+	arm_instr_multi_0x08110003__cc,
+	arm_instr_multi_0x08110003__mi,
+	arm_instr_multi_0x08110003__pl,
+	arm_instr_multi_0x08110003__vs,
+	arm_instr_multi_0x08110003__vc,
+	arm_instr_multi_0x08110003__hi,
+	arm_instr_multi_0x08110003__ls,
+	arm_instr_multi_0x08110003__ge,
+	arm_instr_multi_0x08110003__lt,
+	arm_instr_multi_0x08110003__gt,
+	arm_instr_multi_0x08110003__le,
+	arm_instr_multi_0x08110003,
+	arm_instr_nop,
+	arm_instr_multi_0x091ba800__eq,
+	arm_instr_multi_0x091ba800__ne,
+	arm_instr_multi_0x091ba800__cs,
+	arm_instr_multi_0x091ba800__cc,
+	arm_instr_multi_0x091ba800__mi,
+	arm_instr_multi_0x091ba800__pl,
+	arm_instr_multi_0x091ba800__vs,
+	arm_instr_multi_0x091ba800__vc,
+	arm_instr_multi_0x091ba800__hi,
+	arm_instr_multi_0x091ba800__ls,
+	arm_instr_multi_0x091ba800__ge,
+	arm_instr_multi_0x091ba800__lt,
+	arm_instr_multi_0x091ba800__gt,
+	arm_instr_multi_0x091ba800__le,
+	arm_instr_multi_0x091ba800,
+	arm_instr_nop,
+	arm_instr_multi_0x091b6800__eq,
+	arm_instr_multi_0x091b6800__ne,
+	arm_instr_multi_0x091b6800__cs,
+	arm_instr_multi_0x091b6800__cc,
+	arm_instr_multi_0x091b6800__mi,
+	arm_instr_multi_0x091b6800__pl,
+	arm_instr_multi_0x091b6800__vs,
+	arm_instr_multi_0x091b6800__vc,
+	arm_instr_multi_0x091b6800__hi,
+	arm_instr_multi_0x091b6800__ls,
+	arm_instr_multi_0x091b6800__ge,
+	arm_instr_multi_0x091b6800__lt,
+	arm_instr_multi_0x091b6800__gt,
+	arm_instr_multi_0x091b6800__le,
+	arm_instr_multi_0x091b6800,
+	arm_instr_nop,
+	arm_instr_multi_0x08130003__eq,
+	arm_instr_multi_0x08130003__ne,
+	arm_instr_multi_0x08130003__cs,
+	arm_instr_multi_0x08130003__cc,
+	arm_instr_multi_0x08130003__mi,
+	arm_instr_multi_0x08130003__pl,
+	arm_instr_multi_0x08130003__vs,
+	arm_instr_multi_0x08130003__vc,
+	arm_instr_multi_0x08130003__hi,
+	arm_instr_multi_0x08130003__ls,
+	arm_instr_multi_0x08130003__ge,
+	arm_instr_multi_0x08130003__lt,
+	arm_instr_multi_0x08130003__gt,
+	arm_instr_multi_0x08130003__le,
+	arm_instr_multi_0x08130003,
+	arm_instr_nop,
+	arm_instr_multi_0x091bac00__eq,
+	arm_instr_multi_0x091bac00__ne,
+	arm_instr_multi_0x091bac00__cs,
+	arm_instr_multi_0x091bac00__cc,
+	arm_instr_multi_0x091bac00__mi,
+	arm_instr_multi_0x091bac00__pl,
+	arm_instr_multi_0x091bac00__vs,
+	arm_instr_multi_0x091bac00__vc,
+	arm_instr_multi_0x091bac00__hi,
+	arm_instr_multi_0x091bac00__ls,
+	arm_instr_multi_0x091bac00__ge,
+	arm_instr_multi_0x091bac00__lt,
+	arm_instr_multi_0x091bac00__gt,
+	arm_instr_multi_0x091bac00__le,
+	arm_instr_multi_0x091bac00,
+	arm_instr_nop,
+	arm_instr_multi_0x09311008__eq,
+	arm_instr_multi_0x09311008__ne,
+	arm_instr_multi_0x09311008__cs,
+	arm_instr_multi_0x09311008__cc,
+	arm_instr_multi_0x09311008__mi,
+	arm_instr_multi_0x09311008__pl,
+	arm_instr_multi_0x09311008__vs,
+	arm_instr_multi_0x09311008__vc,
+	arm_instr_multi_0x09311008__hi,
+	arm_instr_multi_0x09311008__ls,
+	arm_instr_multi_0x09311008__ge,
+	arm_instr_multi_0x09311008__lt,
+	arm_instr_multi_0x09311008__gt,
+	arm_instr_multi_0x09311008__le,
+	arm_instr_multi_0x09311008,
+	arm_instr_nop,
+	arm_instr_multi_0x09315008__eq,
+	arm_instr_multi_0x09315008__ne,
+	arm_instr_multi_0x09315008__cs,
+	arm_instr_multi_0x09315008__cc,
+	arm_instr_multi_0x09315008__mi,
+	arm_instr_multi_0x09315008__pl,
+	arm_instr_multi_0x09315008__vs,
+	arm_instr_multi_0x09315008__vc,
+	arm_instr_multi_0x09315008__hi,
+	arm_instr_multi_0x09315008__ls,
+	arm_instr_multi_0x09315008__ge,
+	arm_instr_multi_0x09315008__lt,
+	arm_instr_multi_0x09315008__gt,
+	arm_instr_multi_0x09315008__le,
+	arm_instr_multi_0x09315008,
+	arm_instr_nop,
+	arm_instr_multi_0x09110003__eq,
+	arm_instr_multi_0x09110003__ne,
+	arm_instr_multi_0x09110003__cs,
+	arm_instr_multi_0x09110003__cc,
+	arm_instr_multi_0x09110003__mi,
+	arm_instr_multi_0x09110003__pl,
+	arm_instr_multi_0x09110003__vs,
+	arm_instr_multi_0x09110003__vc,
+	arm_instr_multi_0x09110003__hi,
+	arm_instr_multi_0x09110003__ls,
+	arm_instr_multi_0x09110003__ge,
+	arm_instr_multi_0x09110003__lt,
+	arm_instr_multi_0x09110003__gt,
+	arm_instr_multi_0x09110003__le,
+	arm_instr_multi_0x09110003,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_81[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x0911000f__eq,
+	arm_instr_multi_0x0911000f__ne,
+	arm_instr_multi_0x0911000f__cs,
+	arm_instr_multi_0x0911000f__cc,
+	arm_instr_multi_0x0911000f__mi,
+	arm_instr_multi_0x0911000f__pl,
+	arm_instr_multi_0x0911000f__vs,
+	arm_instr_multi_0x0911000f__vc,
+	arm_instr_multi_0x0911000f__hi,
+	arm_instr_multi_0x0911000f__ls,
+	arm_instr_multi_0x0911000f__ge,
+	arm_instr_multi_0x0911000f__lt,
+	arm_instr_multi_0x0911000f__gt,
+	arm_instr_multi_0x0911000f__le,
+	arm_instr_multi_0x0911000f,
+	arm_instr_nop,
+	arm_instr_multi_0x0813000c__eq,
+	arm_instr_multi_0x0813000c__ne,
+	arm_instr_multi_0x0813000c__cs,
+	arm_instr_multi_0x0813000c__cc,
+	arm_instr_multi_0x0813000c__mi,
+	arm_instr_multi_0x0813000c__pl,
+	arm_instr_multi_0x0813000c__vs,
+	arm_instr_multi_0x0813000c__vc,
+	arm_instr_multi_0x0813000c__hi,
+	arm_instr_multi_0x0813000c__ls,
+	arm_instr_multi_0x0813000c__ge,
+	arm_instr_multi_0x0813000c__lt,
+	arm_instr_multi_0x0813000c__gt,
+	arm_instr_multi_0x0813000c__le,
+	arm_instr_multi_0x0813000c,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_82[128])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x091ba830__eq,
+	arm_instr_multi_0x091ba830__ne,
+	arm_instr_multi_0x091ba830__cs,
+	arm_instr_multi_0x091ba830__cc,
+	arm_instr_multi_0x091ba830__mi,
+	arm_instr_multi_0x091ba830__pl,
+	arm_instr_multi_0x091ba830__vs,
+	arm_instr_multi_0x091ba830__vc,
+	arm_instr_multi_0x091ba830__hi,
+	arm_instr_multi_0x091ba830__ls,
+	arm_instr_multi_0x091ba830__ge,
+	arm_instr_multi_0x091ba830__lt,
+	arm_instr_multi_0x091ba830__gt,
+	arm_instr_multi_0x091ba830__le,
+	arm_instr_multi_0x091ba830,
+	arm_instr_nop,
+	arm_instr_multi_0x091ba810__eq,
+	arm_instr_multi_0x091ba810__ne,
+	arm_instr_multi_0x091ba810__cs,
+	arm_instr_multi_0x091ba810__cc,
+	arm_instr_multi_0x091ba810__mi,
+	arm_instr_multi_0x091ba810__pl,
+	arm_instr_multi_0x091ba810__vs,
+	arm_instr_multi_0x091ba810__vc,
+	arm_instr_multi_0x091ba810__hi,
+	arm_instr_multi_0x091ba810__ls,
+	arm_instr_multi_0x091ba810__ge,
+	arm_instr_multi_0x091ba810__lt,
+	arm_instr_multi_0x091ba810__gt,
+	arm_instr_multi_0x091ba810__le,
+	arm_instr_multi_0x091ba810,
+	arm_instr_nop,
+	arm_instr_multi_0x08130018__eq,
+	arm_instr_multi_0x08130018__ne,
+	arm_instr_multi_0x08130018__cs,
+	arm_instr_multi_0x08130018__cc,
+	arm_instr_multi_0x08130018__mi,
+	arm_instr_multi_0x08130018__pl,
+	arm_instr_multi_0x08130018__vs,
+	arm_instr_multi_0x08130018__vc,
+	arm_instr_multi_0x08130018__hi,
+	arm_instr_multi_0x08130018__ls,
+	arm_instr_multi_0x08130018__ge,
+	arm_instr_multi_0x08130018__lt,
+	arm_instr_multi_0x08130018__gt,
+	arm_instr_multi_0x08130018__le,
+	arm_instr_multi_0x08130018,
+	arm_instr_nop,
+	arm_instr_multi_0x091b6830__eq,
+	arm_instr_multi_0x091b6830__ne,
+	arm_instr_multi_0x091b6830__cs,
+	arm_instr_multi_0x091b6830__cc,
+	arm_instr_multi_0x091b6830__mi,
+	arm_instr_multi_0x091b6830__pl,
+	arm_instr_multi_0x091b6830__vs,
+	arm_instr_multi_0x091b6830__vc,
+	arm_instr_multi_0x091b6830__hi,
+	arm_instr_multi_0x091b6830__ls,
+	arm_instr_multi_0x091b6830__ge,
+	arm_instr_multi_0x091b6830__lt,
+	arm_instr_multi_0x091b6830__gt,
+	arm_instr_multi_0x091b6830__le,
+	arm_instr_multi_0x091b6830,
+	arm_instr_nop,
+	arm_instr_multi_0x091bac30__eq,
+	arm_instr_multi_0x091bac30__ne,
+	arm_instr_multi_0x091bac30__cs,
+	arm_instr_multi_0x091bac30__cc,
+	arm_instr_multi_0x091bac30__mi,
+	arm_instr_multi_0x091bac30__pl,
+	arm_instr_multi_0x091bac30__vs,
+	arm_instr_multi_0x091bac30__vc,
+	arm_instr_multi_0x091bac30__hi,
+	arm_instr_multi_0x091bac30__ls,
+	arm_instr_multi_0x091bac30__ge,
+	arm_instr_multi_0x091bac30__lt,
+	arm_instr_multi_0x091bac30__gt,
+	arm_instr_multi_0x091bac30__le,
+	arm_instr_multi_0x091bac30,
+	arm_instr_nop,
+	arm_instr_multi_0x09315018__eq,
+	arm_instr_multi_0x09315018__ne,
+	arm_instr_multi_0x09315018__cs,
+	arm_instr_multi_0x09315018__cc,
+	arm_instr_multi_0x09315018__mi,
+	arm_instr_multi_0x09315018__pl,
+	arm_instr_multi_0x09315018__vs,
+	arm_instr_multi_0x09315018__vc,
+	arm_instr_multi_0x09315018__hi,
+	arm_instr_multi_0x09315018__ls,
+	arm_instr_multi_0x09315018__ge,
+	arm_instr_multi_0x09315018__lt,
+	arm_instr_multi_0x09315018__gt,
+	arm_instr_multi_0x09315018__le,
+	arm_instr_multi_0x09315018,
+	arm_instr_nop,
+	arm_instr_multi_0x091b6810__eq,
+	arm_instr_multi_0x091b6810__ne,
+	arm_instr_multi_0x091b6810__cs,
+	arm_instr_multi_0x091b6810__cc,
+	arm_instr_multi_0x091b6810__mi,
+	arm_instr_multi_0x091b6810__pl,
+	arm_instr_multi_0x091b6810__vs,
+	arm_instr_multi_0x091b6810__vc,
+	arm_instr_multi_0x091b6810__hi,
+	arm_instr_multi_0x091b6810__ls,
+	arm_instr_multi_0x091b6810__ge,
+	arm_instr_multi_0x091b6810__lt,
+	arm_instr_multi_0x091b6810__gt,
+	arm_instr_multi_0x091b6810__le,
+	arm_instr_multi_0x091b6810,
+	arm_instr_nop,
+	arm_instr_multi_0x09311038__eq,
+	arm_instr_multi_0x09311038__ne,
+	arm_instr_multi_0x09311038__cs,
+	arm_instr_multi_0x09311038__cc,
+	arm_instr_multi_0x09311038__mi,
+	arm_instr_multi_0x09311038__pl,
+	arm_instr_multi_0x09311038__vs,
+	arm_instr_multi_0x09311038__vc,
+	arm_instr_multi_0x09311038__hi,
+	arm_instr_multi_0x09311038__ls,
+	arm_instr_multi_0x09311038__ge,
+	arm_instr_multi_0x09311038__lt,
+	arm_instr_multi_0x09311038__gt,
+	arm_instr_multi_0x09311038__le,
+	arm_instr_multi_0x09311038,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_86[96])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x091ba8f0__eq,
+	arm_instr_multi_0x091ba8f0__ne,
+	arm_instr_multi_0x091ba8f0__cs,
+	arm_instr_multi_0x091ba8f0__cc,
+	arm_instr_multi_0x091ba8f0__mi,
+	arm_instr_multi_0x091ba8f0__pl,
+	arm_instr_multi_0x091ba8f0__vs,
+	arm_instr_multi_0x091ba8f0__vc,
+	arm_instr_multi_0x091ba8f0__hi,
+	arm_instr_multi_0x091ba8f0__ls,
+	arm_instr_multi_0x091ba8f0__ge,
+	arm_instr_multi_0x091ba8f0__lt,
+	arm_instr_multi_0x091ba8f0__gt,
+	arm_instr_multi_0x091ba8f0__le,
+	arm_instr_multi_0x091ba8f0,
+	arm_instr_nop,
+	arm_instr_multi_0x091ba870__eq,
+	arm_instr_multi_0x091ba870__ne,
+	arm_instr_multi_0x091ba870__cs,
+	arm_instr_multi_0x091ba870__cc,
+	arm_instr_multi_0x091ba870__mi,
+	arm_instr_multi_0x091ba870__pl,
+	arm_instr_multi_0x091ba870__vs,
+	arm_instr_multi_0x091ba870__vc,
+	arm_instr_multi_0x091ba870__hi,
+	arm_instr_multi_0x091ba870__ls,
+	arm_instr_multi_0x091ba870__ge,
+	arm_instr_multi_0x091ba870__lt,
+	arm_instr_multi_0x091ba870__gt,
+	arm_instr_multi_0x091ba870__le,
+	arm_instr_multi_0x091ba870,
+	arm_instr_nop,
+	arm_instr_multi_0x091bac70__eq,
+	arm_instr_multi_0x091bac70__ne,
+	arm_instr_multi_0x091bac70__cs,
+	arm_instr_multi_0x091bac70__cc,
+	arm_instr_multi_0x091bac70__mi,
+	arm_instr_multi_0x091bac70__pl,
+	arm_instr_multi_0x091bac70__vs,
+	arm_instr_multi_0x091bac70__vc,
+	arm_instr_multi_0x091bac70__hi,
+	arm_instr_multi_0x091bac70__ls,
+	arm_instr_multi_0x091bac70__ge,
+	arm_instr_multi_0x091bac70__lt,
+	arm_instr_multi_0x091bac70__gt,
+	arm_instr_multi_0x091bac70__le,
+	arm_instr_multi_0x091bac70,
+	arm_instr_nop,
+	arm_instr_multi_0x091bacf0__eq,
+	arm_instr_multi_0x091bacf0__ne,
+	arm_instr_multi_0x091bacf0__cs,
+	arm_instr_multi_0x091bacf0__cc,
+	arm_instr_multi_0x091bacf0__mi,
+	arm_instr_multi_0x091bacf0__pl,
+	arm_instr_multi_0x091bacf0__vs,
+	arm_instr_multi_0x091bacf0__vc,
+	arm_instr_multi_0x091bacf0__hi,
+	arm_instr_multi_0x091bacf0__ls,
+	arm_instr_multi_0x091bacf0__ge,
+	arm_instr_multi_0x091bacf0__lt,
+	arm_instr_multi_0x091bacf0__gt,
+	arm_instr_multi_0x091bacf0__le,
+	arm_instr_multi_0x091bacf0,
+	arm_instr_nop,
+	arm_instr_multi_0x091b6870__eq,
+	arm_instr_multi_0x091b6870__ne,
+	arm_instr_multi_0x091b6870__cs,
+	arm_instr_multi_0x091b6870__cc,
+	arm_instr_multi_0x091b6870__mi,
+	arm_instr_multi_0x091b6870__pl,
+	arm_instr_multi_0x091b6870__vs,
+	arm_instr_multi_0x091b6870__vc,
+	arm_instr_multi_0x091b6870__hi,
+	arm_instr_multi_0x091b6870__ls,
+	arm_instr_multi_0x091b6870__ge,
+	arm_instr_multi_0x091b6870__lt,
+	arm_instr_multi_0x091b6870__gt,
+	arm_instr_multi_0x091b6870__le,
+	arm_instr_multi_0x091b6870,
+	arm_instr_nop,
+	arm_instr_multi_0x091b68f0__eq,
+	arm_instr_multi_0x091b68f0__ne,
+	arm_instr_multi_0x091b68f0__cs,
+	arm_instr_multi_0x091b68f0__cc,
+	arm_instr_multi_0x091b68f0__mi,
+	arm_instr_multi_0x091b68f0__pl,
+	arm_instr_multi_0x091b68f0__vs,
+	arm_instr_multi_0x091b68f0__vc,
+	arm_instr_multi_0x091b68f0__hi,
+	arm_instr_multi_0x091b68f0__ls,
+	arm_instr_multi_0x091b68f0__ge,
+	arm_instr_multi_0x091b68f0__lt,
+	arm_instr_multi_0x091b68f0__gt,
+	arm_instr_multi_0x091b68f0__le,
+	arm_instr_multi_0x091b68f0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_88[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09190300__eq,
+	arm_instr_multi_0x09190300__ne,
+	arm_instr_multi_0x09190300__cs,
+	arm_instr_multi_0x09190300__cc,
+	arm_instr_multi_0x09190300__mi,
+	arm_instr_multi_0x09190300__pl,
+	arm_instr_multi_0x09190300__vs,
+	arm_instr_multi_0x09190300__vc,
+	arm_instr_multi_0x09190300__hi,
+	arm_instr_multi_0x09190300__ls,
+	arm_instr_multi_0x09190300__ge,
+	arm_instr_multi_0x09190300__lt,
+	arm_instr_multi_0x09190300__gt,
+	arm_instr_multi_0x09190300__le,
+	arm_instr_multi_0x09190300,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_94[112])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x091baff0__eq,
+	arm_instr_multi_0x091baff0__ne,
+	arm_instr_multi_0x091baff0__cs,
+	arm_instr_multi_0x091baff0__cc,
+	arm_instr_multi_0x091baff0__mi,
+	arm_instr_multi_0x091baff0__pl,
+	arm_instr_multi_0x091baff0__vs,
+	arm_instr_multi_0x091baff0__vc,
+	arm_instr_multi_0x091baff0__hi,
+	arm_instr_multi_0x091baff0__ls,
+	arm_instr_multi_0x091baff0__ge,
+	arm_instr_multi_0x091baff0__lt,
+	arm_instr_multi_0x091baff0__gt,
+	arm_instr_multi_0x091baff0__le,
+	arm_instr_multi_0x091baff0,
+	arm_instr_nop,
+	arm_instr_multi_0x091badf0__eq,
+	arm_instr_multi_0x091badf0__ne,
+	arm_instr_multi_0x091badf0__cs,
+	arm_instr_multi_0x091badf0__cc,
+	arm_instr_multi_0x091badf0__mi,
+	arm_instr_multi_0x091badf0__pl,
+	arm_instr_multi_0x091badf0__vs,
+	arm_instr_multi_0x091badf0__vc,
+	arm_instr_multi_0x091badf0__hi,
+	arm_instr_multi_0x091badf0__ls,
+	arm_instr_multi_0x091badf0__ge,
+	arm_instr_multi_0x091badf0__lt,
+	arm_instr_multi_0x091badf0__gt,
+	arm_instr_multi_0x091badf0__le,
+	arm_instr_multi_0x091badf0,
+	arm_instr_nop,
+	arm_instr_multi_0x091ba9f0__eq,
+	arm_instr_multi_0x091ba9f0__ne,
+	arm_instr_multi_0x091ba9f0__cs,
+	arm_instr_multi_0x091ba9f0__cc,
+	arm_instr_multi_0x091ba9f0__mi,
+	arm_instr_multi_0x091ba9f0__pl,
+	arm_instr_multi_0x091ba9f0__vs,
+	arm_instr_multi_0x091ba9f0__vc,
+	arm_instr_multi_0x091ba9f0__hi,
+	arm_instr_multi_0x091ba9f0__ls,
+	arm_instr_multi_0x091ba9f0__ge,
+	arm_instr_multi_0x091ba9f0__lt,
+	arm_instr_multi_0x091ba9f0__gt,
+	arm_instr_multi_0x091ba9f0__le,
+	arm_instr_multi_0x091ba9f0,
+	arm_instr_nop,
+	arm_instr_multi_0x091b6ff0__eq,
+	arm_instr_multi_0x091b6ff0__ne,
+	arm_instr_multi_0x091b6ff0__cs,
+	arm_instr_multi_0x091b6ff0__cc,
+	arm_instr_multi_0x091b6ff0__mi,
+	arm_instr_multi_0x091b6ff0__pl,
+	arm_instr_multi_0x091b6ff0__vs,
+	arm_instr_multi_0x091b6ff0__vc,
+	arm_instr_multi_0x091b6ff0__hi,
+	arm_instr_multi_0x091b6ff0__ls,
+	arm_instr_multi_0x091b6ff0__ge,
+	arm_instr_multi_0x091b6ff0__lt,
+	arm_instr_multi_0x091b6ff0__gt,
+	arm_instr_multi_0x091b6ff0__le,
+	arm_instr_multi_0x091b6ff0,
+	arm_instr_nop,
+	arm_instr_multi_0x091babf0__eq,
+	arm_instr_multi_0x091babf0__ne,
+	arm_instr_multi_0x091babf0__cs,
+	arm_instr_multi_0x091babf0__cc,
+	arm_instr_multi_0x091babf0__mi,
+	arm_instr_multi_0x091babf0__pl,
+	arm_instr_multi_0x091babf0__vs,
+	arm_instr_multi_0x091babf0__vc,
+	arm_instr_multi_0x091babf0__hi,
+	arm_instr_multi_0x091babf0__ls,
+	arm_instr_multi_0x091babf0__ge,
+	arm_instr_multi_0x091babf0__lt,
+	arm_instr_multi_0x091babf0__gt,
+	arm_instr_multi_0x091babf0__le,
+	arm_instr_multi_0x091babf0,
+	arm_instr_nop,
+	arm_instr_multi_0x091b69f0__eq,
+	arm_instr_multi_0x091b69f0__ne,
+	arm_instr_multi_0x091b69f0__cs,
+	arm_instr_multi_0x091b69f0__cc,
+	arm_instr_multi_0x091b69f0__mi,
+	arm_instr_multi_0x091b69f0__pl,
+	arm_instr_multi_0x091b69f0__vs,
+	arm_instr_multi_0x091b69f0__vc,
+	arm_instr_multi_0x091b69f0__hi,
+	arm_instr_multi_0x091b69f0__ls,
+	arm_instr_multi_0x091b69f0__ge,
+	arm_instr_multi_0x091b69f0__lt,
+	arm_instr_multi_0x091b69f0__gt,
+	arm_instr_multi_0x091b69f0__le,
+	arm_instr_multi_0x091b69f0,
+	arm_instr_nop,
+	arm_instr_multi_0x091b6df0__eq,
+	arm_instr_multi_0x091b6df0__ne,
+	arm_instr_multi_0x091b6df0__cs,
+	arm_instr_multi_0x091b6df0__cc,
+	arm_instr_multi_0x091b6df0__mi,
+	arm_instr_multi_0x091b6df0__pl,
+	arm_instr_multi_0x091b6df0__vs,
+	arm_instr_multi_0x091b6df0__vc,
+	arm_instr_multi_0x091b6df0__hi,
+	arm_instr_multi_0x091b6df0__ls,
+	arm_instr_multi_0x091b6df0__ge,
+	arm_instr_multi_0x091b6df0__lt,
+	arm_instr_multi_0x091b6df0__gt,
+	arm_instr_multi_0x091b6df0__le,
+	arm_instr_multi_0x091b6df0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_97[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09160006__eq,
+	arm_instr_multi_0x09160006__ne,
+	arm_instr_multi_0x09160006__cs,
+	arm_instr_multi_0x09160006__cc,
+	arm_instr_multi_0x09160006__mi,
+	arm_instr_multi_0x09160006__pl,
+	arm_instr_multi_0x09160006__vs,
+	arm_instr_multi_0x09160006__vc,
+	arm_instr_multi_0x09160006__hi,
+	arm_instr_multi_0x09160006__ls,
+	arm_instr_multi_0x09160006__ge,
+	arm_instr_multi_0x09160006__lt,
+	arm_instr_multi_0x09160006__gt,
+	arm_instr_multi_0x09160006__le,
+	arm_instr_multi_0x09160006,
+	arm_instr_nop,
+	arm_instr_multi_0x091c0006__eq,
+	arm_instr_multi_0x091c0006__ne,
+	arm_instr_multi_0x091c0006__cs,
+	arm_instr_multi_0x091c0006__cc,
+	arm_instr_multi_0x091c0006__mi,
+	arm_instr_multi_0x091c0006__pl,
+	arm_instr_multi_0x091c0006__vs,
+	arm_instr_multi_0x091c0006__vc,
+	arm_instr_multi_0x091c0006__hi,
+	arm_instr_multi_0x091c0006__ls,
+	arm_instr_multi_0x091c0006__ge,
+	arm_instr_multi_0x091c0006__lt,
+	arm_instr_multi_0x091c0006__gt,
+	arm_instr_multi_0x091c0006__le,
+	arm_instr_multi_0x091c0006,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_98[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09140018__eq,
+	arm_instr_multi_0x09140018__ne,
+	arm_instr_multi_0x09140018__cs,
+	arm_instr_multi_0x09140018__cc,
+	arm_instr_multi_0x09140018__mi,
+	arm_instr_multi_0x09140018__pl,
+	arm_instr_multi_0x09140018__vs,
+	arm_instr_multi_0x09140018__vc,
+	arm_instr_multi_0x09140018__hi,
+	arm_instr_multi_0x09140018__ls,
+	arm_instr_multi_0x09140018__ge,
+	arm_instr_multi_0x09140018__lt,
+	arm_instr_multi_0x09140018__gt,
+	arm_instr_multi_0x09140018__le,
+	arm_instr_multi_0x09140018,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_100[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09160060__eq,
+	arm_instr_multi_0x09160060__ne,
+	arm_instr_multi_0x09160060__cs,
+	arm_instr_multi_0x09160060__cc,
+	arm_instr_multi_0x09160060__mi,
+	arm_instr_multi_0x09160060__pl,
+	arm_instr_multi_0x09160060__vs,
+	arm_instr_multi_0x09160060__vc,
+	arm_instr_multi_0x09160060__hi,
+	arm_instr_multi_0x09160060__ls,
+	arm_instr_multi_0x09160060__ge,
+	arm_instr_multi_0x09160060__lt,
+	arm_instr_multi_0x09160060__gt,
+	arm_instr_multi_0x09160060__le,
+	arm_instr_multi_0x09160060,
+	arm_instr_nop,
+	arm_instr_multi_0x08160060__eq,
+	arm_instr_multi_0x08160060__ne,
+	arm_instr_multi_0x08160060__cs,
+	arm_instr_multi_0x08160060__cc,
+	arm_instr_multi_0x08160060__mi,
+	arm_instr_multi_0x08160060__pl,
+	arm_instr_multi_0x08160060__vs,
+	arm_instr_multi_0x08160060__vc,
+	arm_instr_multi_0x08160060__hi,
+	arm_instr_multi_0x08160060__ls,
+	arm_instr_multi_0x08160060__ge,
+	arm_instr_multi_0x08160060__lt,
+	arm_instr_multi_0x08160060__gt,
+	arm_instr_multi_0x08160060__le,
+	arm_instr_multi_0x08160060,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_112[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08150003__eq,
+	arm_instr_multi_0x08150003__ne,
+	arm_instr_multi_0x08150003__cs,
+	arm_instr_multi_0x08150003__cc,
+	arm_instr_multi_0x08150003__mi,
+	arm_instr_multi_0x08150003__pl,
+	arm_instr_multi_0x08150003__vs,
+	arm_instr_multi_0x08150003__vc,
+	arm_instr_multi_0x08150003__hi,
+	arm_instr_multi_0x08150003__ls,
+	arm_instr_multi_0x08150003__ge,
+	arm_instr_multi_0x08150003__lt,
+	arm_instr_multi_0x08150003__gt,
+	arm_instr_multi_0x08150003__le,
+	arm_instr_multi_0x08150003,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_113[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x0817000c__eq,
+	arm_instr_multi_0x0817000c__ne,
+	arm_instr_multi_0x0817000c__cs,
+	arm_instr_multi_0x0817000c__cc,
+	arm_instr_multi_0x0817000c__mi,
+	arm_instr_multi_0x0817000c__pl,
+	arm_instr_multi_0x0817000c__vs,
+	arm_instr_multi_0x0817000c__vc,
+	arm_instr_multi_0x0817000c__hi,
+	arm_instr_multi_0x0817000c__ls,
+	arm_instr_multi_0x0817000c__ge,
+	arm_instr_multi_0x0817000c__lt,
+	arm_instr_multi_0x0817000c__gt,
+	arm_instr_multi_0x0817000c__le,
+	arm_instr_multi_0x0817000c,
+	arm_instr_nop,
+	arm_instr_multi_0x09150006__eq,
+	arm_instr_multi_0x09150006__ne,
+	arm_instr_multi_0x09150006__cs,
+	arm_instr_multi_0x09150006__cc,
+	arm_instr_multi_0x09150006__mi,
+	arm_instr_multi_0x09150006__pl,
+	arm_instr_multi_0x09150006__vs,
+	arm_instr_multi_0x09150006__vc,
+	arm_instr_multi_0x09150006__hi,
+	arm_instr_multi_0x09150006__ls,
+	arm_instr_multi_0x09150006__ge,
+	arm_instr_multi_0x09150006__lt,
+	arm_instr_multi_0x09150006__gt,
+	arm_instr_multi_0x09150006__le,
+	arm_instr_multi_0x09150006,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_114[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09150018__eq,
+	arm_instr_multi_0x09150018__ne,
+	arm_instr_multi_0x09150018__cs,
+	arm_instr_multi_0x09150018__cc,
+	arm_instr_multi_0x09150018__mi,
+	arm_instr_multi_0x09150018__pl,
+	arm_instr_multi_0x09150018__vs,
+	arm_instr_multi_0x09150018__vc,
+	arm_instr_multi_0x09150018__hi,
+	arm_instr_multi_0x09150018__ls,
+	arm_instr_multi_0x09150018__ge,
+	arm_instr_multi_0x09150018__lt,
+	arm_instr_multi_0x09150018__gt,
+	arm_instr_multi_0x09150018__le,
+	arm_instr_multi_0x09150018,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_128[64])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08820003__eq,
+	arm_instr_multi_0x08820003__ne,
+	arm_instr_multi_0x08820003__cs,
+	arm_instr_multi_0x08820003__cc,
+	arm_instr_multi_0x08820003__mi,
+	arm_instr_multi_0x08820003__pl,
+	arm_instr_multi_0x08820003__vs,
+	arm_instr_multi_0x08820003__vc,
+	arm_instr_multi_0x08820003__hi,
+	arm_instr_multi_0x08820003__ls,
+	arm_instr_multi_0x08820003__ge,
+	arm_instr_multi_0x08820003__lt,
+	arm_instr_multi_0x08820003__gt,
+	arm_instr_multi_0x08820003__le,
+	arm_instr_multi_0x08820003,
+	arm_instr_nop,
+	arm_instr_multi_0x08a01008__eq,
+	arm_instr_multi_0x08a01008__ne,
+	arm_instr_multi_0x08a01008__cs,
+	arm_instr_multi_0x08a01008__cc,
+	arm_instr_multi_0x08a01008__mi,
+	arm_instr_multi_0x08a01008__pl,
+	arm_instr_multi_0x08a01008__vs,
+	arm_instr_multi_0x08a01008__vc,
+	arm_instr_multi_0x08a01008__hi,
+	arm_instr_multi_0x08a01008__ls,
+	arm_instr_multi_0x08a01008__ge,
+	arm_instr_multi_0x08a01008__lt,
+	arm_instr_multi_0x08a01008__gt,
+	arm_instr_multi_0x08a01008__le,
+	arm_instr_multi_0x08a01008,
+	arm_instr_nop,
+	arm_instr_multi_0x08a05008__eq,
+	arm_instr_multi_0x08a05008__ne,
+	arm_instr_multi_0x08a05008__cs,
+	arm_instr_multi_0x08a05008__cc,
+	arm_instr_multi_0x08a05008__mi,
+	arm_instr_multi_0x08a05008__pl,
+	arm_instr_multi_0x08a05008__vs,
+	arm_instr_multi_0x08a05008__vc,
+	arm_instr_multi_0x08a05008__hi,
+	arm_instr_multi_0x08a05008__ls,
+	arm_instr_multi_0x08a05008__ge,
+	arm_instr_multi_0x08a05008__lt,
+	arm_instr_multi_0x08a05008__gt,
+	arm_instr_multi_0x08a05008__le,
+	arm_instr_multi_0x08a05008,
+	arm_instr_nop,
+	arm_instr_multi_0x08a20600__eq,
+	arm_instr_multi_0x08a20600__ne,
+	arm_instr_multi_0x08a20600__cs,
+	arm_instr_multi_0x08a20600__cc,
+	arm_instr_multi_0x08a20600__mi,
+	arm_instr_multi_0x08a20600__pl,
+	arm_instr_multi_0x08a20600__vs,
+	arm_instr_multi_0x08a20600__vc,
+	arm_instr_multi_0x08a20600__hi,
+	arm_instr_multi_0x08a20600__ls,
+	arm_instr_multi_0x08a20600__ge,
+	arm_instr_multi_0x08a20600__lt,
+	arm_instr_multi_0x08a20600__gt,
+	arm_instr_multi_0x08a20600__le,
+	arm_instr_multi_0x08a20600,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_129[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08800006__eq,
+	arm_instr_multi_0x08800006__ne,
+	arm_instr_multi_0x08800006__cs,
+	arm_instr_multi_0x08800006__cc,
+	arm_instr_multi_0x08800006__mi,
+	arm_instr_multi_0x08800006__pl,
+	arm_instr_multi_0x08800006__vs,
+	arm_instr_multi_0x08800006__vc,
+	arm_instr_multi_0x08800006__hi,
+	arm_instr_multi_0x08800006__ls,
+	arm_instr_multi_0x08800006__ge,
+	arm_instr_multi_0x08800006__lt,
+	arm_instr_multi_0x08800006__gt,
+	arm_instr_multi_0x08800006__le,
+	arm_instr_multi_0x08800006,
+	arm_instr_nop,
+	arm_instr_multi_0x08880006__eq,
+	arm_instr_multi_0x08880006__ne,
+	arm_instr_multi_0x08880006__cs,
+	arm_instr_multi_0x08880006__cc,
+	arm_instr_multi_0x08880006__mi,
+	arm_instr_multi_0x08880006__pl,
+	arm_instr_multi_0x08880006__vs,
+	arm_instr_multi_0x08880006__vc,
+	arm_instr_multi_0x08880006__hi,
+	arm_instr_multi_0x08880006__ls,
+	arm_instr_multi_0x08880006__ge,
+	arm_instr_multi_0x08880006__lt,
+	arm_instr_multi_0x08880006__gt,
+	arm_instr_multi_0x08880006__le,
+	arm_instr_multi_0x08880006,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_130[96])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08820018__eq,
+	arm_instr_multi_0x08820018__ne,
+	arm_instr_multi_0x08820018__cs,
+	arm_instr_multi_0x08820018__cc,
+	arm_instr_multi_0x08820018__mi,
+	arm_instr_multi_0x08820018__pl,
+	arm_instr_multi_0x08820018__vs,
+	arm_instr_multi_0x08820018__vc,
+	arm_instr_multi_0x08820018__hi,
+	arm_instr_multi_0x08820018__ls,
+	arm_instr_multi_0x08820018__ge,
+	arm_instr_multi_0x08820018__lt,
+	arm_instr_multi_0x08820018__gt,
+	arm_instr_multi_0x08820018__le,
+	arm_instr_multi_0x08820018,
+	arm_instr_nop,
+	arm_instr_multi_0x08a05018__eq,
+	arm_instr_multi_0x08a05018__ne,
+	arm_instr_multi_0x08a05018__cs,
+	arm_instr_multi_0x08a05018__cc,
+	arm_instr_multi_0x08a05018__mi,
+	arm_instr_multi_0x08a05018__pl,
+	arm_instr_multi_0x08a05018__vs,
+	arm_instr_multi_0x08a05018__vc,
+	arm_instr_multi_0x08a05018__hi,
+	arm_instr_multi_0x08a05018__ls,
+	arm_instr_multi_0x08a05018__ge,
+	arm_instr_multi_0x08a05018__lt,
+	arm_instr_multi_0x08a05018__gt,
+	arm_instr_multi_0x08a05018__le,
+	arm_instr_multi_0x08a05018,
+	arm_instr_nop,
+	arm_instr_multi_0x08880018__eq,
+	arm_instr_multi_0x08880018__ne,
+	arm_instr_multi_0x08880018__cs,
+	arm_instr_multi_0x08880018__cc,
+	arm_instr_multi_0x08880018__mi,
+	arm_instr_multi_0x08880018__pl,
+	arm_instr_multi_0x08880018__vs,
+	arm_instr_multi_0x08880018__vc,
+	arm_instr_multi_0x08880018__hi,
+	arm_instr_multi_0x08880018__ls,
+	arm_instr_multi_0x08880018__ge,
+	arm_instr_multi_0x08880018__lt,
+	arm_instr_multi_0x08880018__gt,
+	arm_instr_multi_0x08880018__le,
+	arm_instr_multi_0x08880018,
+	arm_instr_nop,
+	arm_instr_multi_0x08820030__eq,
+	arm_instr_multi_0x08820030__ne,
+	arm_instr_multi_0x08820030__cs,
+	arm_instr_multi_0x08820030__cc,
+	arm_instr_multi_0x08820030__mi,
+	arm_instr_multi_0x08820030__pl,
+	arm_instr_multi_0x08820030__vs,
+	arm_instr_multi_0x08820030__vc,
+	arm_instr_multi_0x08820030__hi,
+	arm_instr_multi_0x08820030__ls,
+	arm_instr_multi_0x08820030__ge,
+	arm_instr_multi_0x08820030__lt,
+	arm_instr_multi_0x08820030__gt,
+	arm_instr_multi_0x08820030__le,
+	arm_instr_multi_0x08820030,
+	arm_instr_nop,
+	arm_instr_multi_0x08800018__eq,
+	arm_instr_multi_0x08800018__ne,
+	arm_instr_multi_0x08800018__cs,
+	arm_instr_multi_0x08800018__cc,
+	arm_instr_multi_0x08800018__mi,
+	arm_instr_multi_0x08800018__pl,
+	arm_instr_multi_0x08800018__vs,
+	arm_instr_multi_0x08800018__vc,
+	arm_instr_multi_0x08800018__hi,
+	arm_instr_multi_0x08800018__ls,
+	arm_instr_multi_0x08800018__ge,
+	arm_instr_multi_0x08800018__lt,
+	arm_instr_multi_0x08800018__gt,
+	arm_instr_multi_0x08800018__le,
+	arm_instr_multi_0x08800018,
+	arm_instr_nop,
+	arm_instr_multi_0x08800030__eq,
+	arm_instr_multi_0x08800030__ne,
+	arm_instr_multi_0x08800030__cs,
+	arm_instr_multi_0x08800030__cc,
+	arm_instr_multi_0x08800030__mi,
+	arm_instr_multi_0x08800030__pl,
+	arm_instr_multi_0x08800030__vs,
+	arm_instr_multi_0x08800030__vc,
+	arm_instr_multi_0x08800030__hi,
+	arm_instr_multi_0x08800030__ls,
+	arm_instr_multi_0x08800030__ge,
+	arm_instr_multi_0x08800030__lt,
+	arm_instr_multi_0x08800030__gt,
+	arm_instr_multi_0x08800030__le,
+	arm_instr_multi_0x08800030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_132[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x088200c0__eq,
+	arm_instr_multi_0x088200c0__ne,
+	arm_instr_multi_0x088200c0__cs,
+	arm_instr_multi_0x088200c0__cc,
+	arm_instr_multi_0x088200c0__mi,
+	arm_instr_multi_0x088200c0__pl,
+	arm_instr_multi_0x088200c0__vs,
+	arm_instr_multi_0x088200c0__vc,
+	arm_instr_multi_0x088200c0__hi,
+	arm_instr_multi_0x088200c0__ls,
+	arm_instr_multi_0x088200c0__ge,
+	arm_instr_multi_0x088200c0__lt,
+	arm_instr_multi_0x088200c0__gt,
+	arm_instr_multi_0x088200c0__le,
+	arm_instr_multi_0x088200c0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_136[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08820180__eq,
+	arm_instr_multi_0x08820180__ne,
+	arm_instr_multi_0x08820180__cs,
+	arm_instr_multi_0x08820180__cc,
+	arm_instr_multi_0x08820180__mi,
+	arm_instr_multi_0x08820180__pl,
+	arm_instr_multi_0x08820180__vs,
+	arm_instr_multi_0x08820180__vc,
+	arm_instr_multi_0x08820180__hi,
+	arm_instr_multi_0x08820180__ls,
+	arm_instr_multi_0x08820180__ge,
+	arm_instr_multi_0x08820180__lt,
+	arm_instr_multi_0x08820180__gt,
+	arm_instr_multi_0x08820180__le,
+	arm_instr_multi_0x08820180,
+	arm_instr_nop,
+	arm_instr_multi_0x08800180__eq,
+	arm_instr_multi_0x08800180__ne,
+	arm_instr_multi_0x08800180__cs,
+	arm_instr_multi_0x08800180__cc,
+	arm_instr_multi_0x08800180__mi,
+	arm_instr_multi_0x08800180__pl,
+	arm_instr_multi_0x08800180__vs,
+	arm_instr_multi_0x08800180__vc,
+	arm_instr_multi_0x08800180__hi,
+	arm_instr_multi_0x08800180__ls,
+	arm_instr_multi_0x08800180__ge,
+	arm_instr_multi_0x08800180__lt,
+	arm_instr_multi_0x08800180__gt,
+	arm_instr_multi_0x08800180__le,
+	arm_instr_multi_0x08800180,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_142[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08a051f8__eq,
+	arm_instr_multi_0x08a051f8__ne,
+	arm_instr_multi_0x08a051f8__cs,
+	arm_instr_multi_0x08a051f8__cc,
+	arm_instr_multi_0x08a051f8__mi,
+	arm_instr_multi_0x08a051f8__pl,
+	arm_instr_multi_0x08a051f8__vs,
+	arm_instr_multi_0x08a051f8__vc,
+	arm_instr_multi_0x08a051f8__hi,
+	arm_instr_multi_0x08a051f8__ls,
+	arm_instr_multi_0x08a051f8__ge,
+	arm_instr_multi_0x08a051f8__lt,
+	arm_instr_multi_0x08a051f8__gt,
+	arm_instr_multi_0x08a051f8__le,
+	arm_instr_multi_0x08a051f8,
+	arm_instr_nop,
+	arm_instr_multi_0x08807ff0__eq,
+	arm_instr_multi_0x08807ff0__ne,
+	arm_instr_multi_0x08807ff0__cs,
+	arm_instr_multi_0x08807ff0__cc,
+	arm_instr_multi_0x08807ff0__mi,
+	arm_instr_multi_0x08807ff0__pl,
+	arm_instr_multi_0x08807ff0__vs,
+	arm_instr_multi_0x08807ff0__vc,
+	arm_instr_multi_0x08807ff0__hi,
+	arm_instr_multi_0x08807ff0__ls,
+	arm_instr_multi_0x08807ff0__ge,
+	arm_instr_multi_0x08807ff0__lt,
+	arm_instr_multi_0x08807ff0__gt,
+	arm_instr_multi_0x08807ff0__le,
+	arm_instr_multi_0x08807ff0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_144[64])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08830600__eq,
+	arm_instr_multi_0x08830600__ne,
+	arm_instr_multi_0x08830600__cs,
+	arm_instr_multi_0x08830600__cc,
+	arm_instr_multi_0x08830600__mi,
+	arm_instr_multi_0x08830600__pl,
+	arm_instr_multi_0x08830600__vs,
+	arm_instr_multi_0x08830600__vc,
+	arm_instr_multi_0x08830600__hi,
+	arm_instr_multi_0x08830600__ls,
+	arm_instr_multi_0x08830600__ge,
+	arm_instr_multi_0x08830600__lt,
+	arm_instr_multi_0x08830600__gt,
+	arm_instr_multi_0x08830600__le,
+	arm_instr_multi_0x08830600,
+	arm_instr_nop,
+	arm_instr_multi_0x08810600__eq,
+	arm_instr_multi_0x08810600__ne,
+	arm_instr_multi_0x08810600__cs,
+	arm_instr_multi_0x08810600__cc,
+	arm_instr_multi_0x08810600__mi,
+	arm_instr_multi_0x08810600__pl,
+	arm_instr_multi_0x08810600__vs,
+	arm_instr_multi_0x08810600__vc,
+	arm_instr_multi_0x08810600__hi,
+	arm_instr_multi_0x08810600__ls,
+	arm_instr_multi_0x08810600__ge,
+	arm_instr_multi_0x08810600__lt,
+	arm_instr_multi_0x08810600__gt,
+	arm_instr_multi_0x08810600__le,
+	arm_instr_multi_0x08810600,
+	arm_instr_nop,
+	arm_instr_multi_0x098b0003__eq,
+	arm_instr_multi_0x098b0003__ne,
+	arm_instr_multi_0x098b0003__cs,
+	arm_instr_multi_0x098b0003__cc,
+	arm_instr_multi_0x098b0003__mi,
+	arm_instr_multi_0x098b0003__pl,
+	arm_instr_multi_0x098b0003__vs,
+	arm_instr_multi_0x098b0003__vc,
+	arm_instr_multi_0x098b0003__hi,
+	arm_instr_multi_0x098b0003__ls,
+	arm_instr_multi_0x098b0003__ge,
+	arm_instr_multi_0x098b0003__lt,
+	arm_instr_multi_0x098b0003__gt,
+	arm_instr_multi_0x098b0003__le,
+	arm_instr_multi_0x098b0003,
+	arm_instr_nop,
+	arm_instr_multi_0x08830003__eq,
+	arm_instr_multi_0x08830003__ne,
+	arm_instr_multi_0x08830003__cs,
+	arm_instr_multi_0x08830003__cc,
+	arm_instr_multi_0x08830003__mi,
+	arm_instr_multi_0x08830003__pl,
+	arm_instr_multi_0x08830003__vs,
+	arm_instr_multi_0x08830003__vc,
+	arm_instr_multi_0x08830003__hi,
+	arm_instr_multi_0x08830003__ls,
+	arm_instr_multi_0x08830003__ge,
+	arm_instr_multi_0x08830003__lt,
+	arm_instr_multi_0x08830003__gt,
+	arm_instr_multi_0x08830003__le,
+	arm_instr_multi_0x08830003,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_145[64])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08830006__eq,
+	arm_instr_multi_0x08830006__ne,
+	arm_instr_multi_0x08830006__cs,
+	arm_instr_multi_0x08830006__cc,
+	arm_instr_multi_0x08830006__mi,
+	arm_instr_multi_0x08830006__pl,
+	arm_instr_multi_0x08830006__vs,
+	arm_instr_multi_0x08830006__vc,
+	arm_instr_multi_0x08830006__hi,
+	arm_instr_multi_0x08830006__ls,
+	arm_instr_multi_0x08830006__ge,
+	arm_instr_multi_0x08830006__lt,
+	arm_instr_multi_0x08830006__gt,
+	arm_instr_multi_0x08830006__le,
+	arm_instr_multi_0x08830006,
+	arm_instr_nop,
+	arm_instr_multi_0x08890006__eq,
+	arm_instr_multi_0x08890006__ne,
+	arm_instr_multi_0x08890006__cs,
+	arm_instr_multi_0x08890006__cc,
+	arm_instr_multi_0x08890006__mi,
+	arm_instr_multi_0x08890006__pl,
+	arm_instr_multi_0x08890006__vs,
+	arm_instr_multi_0x08890006__vc,
+	arm_instr_multi_0x08890006__hi,
+	arm_instr_multi_0x08890006__ls,
+	arm_instr_multi_0x08890006__ge,
+	arm_instr_multi_0x08890006__lt,
+	arm_instr_multi_0x08890006__gt,
+	arm_instr_multi_0x08890006__le,
+	arm_instr_multi_0x08890006,
+	arm_instr_nop,
+	arm_instr_multi_0x09830006__eq,
+	arm_instr_multi_0x09830006__ne,
+	arm_instr_multi_0x09830006__cs,
+	arm_instr_multi_0x09830006__cc,
+	arm_instr_multi_0x09830006__mi,
+	arm_instr_multi_0x09830006__pl,
+	arm_instr_multi_0x09830006__vs,
+	arm_instr_multi_0x09830006__vc,
+	arm_instr_multi_0x09830006__hi,
+	arm_instr_multi_0x09830006__ls,
+	arm_instr_multi_0x09830006__ge,
+	arm_instr_multi_0x09830006__lt,
+	arm_instr_multi_0x09830006__gt,
+	arm_instr_multi_0x09830006__le,
+	arm_instr_multi_0x09830006,
+	arm_instr_nop,
+	arm_instr_multi_0x0989000c__eq,
+	arm_instr_multi_0x0989000c__ne,
+	arm_instr_multi_0x0989000c__cs,
+	arm_instr_multi_0x0989000c__cc,
+	arm_instr_multi_0x0989000c__mi,
+	arm_instr_multi_0x0989000c__pl,
+	arm_instr_multi_0x0989000c__vs,
+	arm_instr_multi_0x0989000c__vc,
+	arm_instr_multi_0x0989000c__hi,
+	arm_instr_multi_0x0989000c__ls,
+	arm_instr_multi_0x0989000c__ge,
+	arm_instr_multi_0x0989000c__lt,
+	arm_instr_multi_0x0989000c__gt,
+	arm_instr_multi_0x0989000c__le,
+	arm_instr_multi_0x0989000c,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_146[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08810018__eq,
+	arm_instr_multi_0x08810018__ne,
+	arm_instr_multi_0x08810018__cs,
+	arm_instr_multi_0x08810018__cc,
+	arm_instr_multi_0x08810018__mi,
+	arm_instr_multi_0x08810018__pl,
+	arm_instr_multi_0x08810018__vs,
+	arm_instr_multi_0x08810018__vc,
+	arm_instr_multi_0x08810018__hi,
+	arm_instr_multi_0x08810018__ls,
+	arm_instr_multi_0x08810018__ge,
+	arm_instr_multi_0x08810018__lt,
+	arm_instr_multi_0x08810018__gt,
+	arm_instr_multi_0x08810018__le,
+	arm_instr_multi_0x08810018,
+	arm_instr_nop,
+	arm_instr_multi_0x08830030__eq,
+	arm_instr_multi_0x08830030__ne,
+	arm_instr_multi_0x08830030__cs,
+	arm_instr_multi_0x08830030__cc,
+	arm_instr_multi_0x08830030__mi,
+	arm_instr_multi_0x08830030__pl,
+	arm_instr_multi_0x08830030__vs,
+	arm_instr_multi_0x08830030__vc,
+	arm_instr_multi_0x08830030__hi,
+	arm_instr_multi_0x08830030__ls,
+	arm_instr_multi_0x08830030__ge,
+	arm_instr_multi_0x08830030__lt,
+	arm_instr_multi_0x08830030__gt,
+	arm_instr_multi_0x08830030__le,
+	arm_instr_multi_0x08830030,
+	arm_instr_nop,
+	arm_instr_multi_0x08890030__eq,
+	arm_instr_multi_0x08890030__ne,
+	arm_instr_multi_0x08890030__cs,
+	arm_instr_multi_0x08890030__cc,
+	arm_instr_multi_0x08890030__mi,
+	arm_instr_multi_0x08890030__pl,
+	arm_instr_multi_0x08890030__vs,
+	arm_instr_multi_0x08890030__vc,
+	arm_instr_multi_0x08890030__hi,
+	arm_instr_multi_0x08890030__ls,
+	arm_instr_multi_0x08890030__ge,
+	arm_instr_multi_0x08890030__lt,
+	arm_instr_multi_0x08890030__gt,
+	arm_instr_multi_0x08890030__le,
+	arm_instr_multi_0x08890030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_148[64])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08830060__eq,
+	arm_instr_multi_0x08830060__ne,
+	arm_instr_multi_0x08830060__cs,
+	arm_instr_multi_0x08830060__cc,
+	arm_instr_multi_0x08830060__mi,
+	arm_instr_multi_0x08830060__pl,
+	arm_instr_multi_0x08830060__vs,
+	arm_instr_multi_0x08830060__vc,
+	arm_instr_multi_0x08830060__hi,
+	arm_instr_multi_0x08830060__ls,
+	arm_instr_multi_0x08830060__ge,
+	arm_instr_multi_0x08830060__lt,
+	arm_instr_multi_0x08830060__gt,
+	arm_instr_multi_0x08830060__le,
+	arm_instr_multi_0x08830060,
+	arm_instr_nop,
+	arm_instr_multi_0x08a100c0__eq,
+	arm_instr_multi_0x08a100c0__ne,
+	arm_instr_multi_0x08a100c0__cs,
+	arm_instr_multi_0x08a100c0__cc,
+	arm_instr_multi_0x08a100c0__mi,
+	arm_instr_multi_0x08a100c0__pl,
+	arm_instr_multi_0x08a100c0__vs,
+	arm_instr_multi_0x08a100c0__vc,
+	arm_instr_multi_0x08a100c0__hi,
+	arm_instr_multi_0x08a100c0__ls,
+	arm_instr_multi_0x08a100c0__ge,
+	arm_instr_multi_0x08a100c0__lt,
+	arm_instr_multi_0x08a100c0__gt,
+	arm_instr_multi_0x08a100c0__le,
+	arm_instr_multi_0x08a100c0,
+	arm_instr_nop,
+	arm_instr_multi_0x088900c0__eq,
+	arm_instr_multi_0x088900c0__ne,
+	arm_instr_multi_0x088900c0__cs,
+	arm_instr_multi_0x088900c0__cc,
+	arm_instr_multi_0x088900c0__mi,
+	arm_instr_multi_0x088900c0__pl,
+	arm_instr_multi_0x088900c0__vs,
+	arm_instr_multi_0x088900c0__vc,
+	arm_instr_multi_0x088900c0__hi,
+	arm_instr_multi_0x088900c0__ls,
+	arm_instr_multi_0x088900c0__ge,
+	arm_instr_multi_0x088900c0__lt,
+	arm_instr_multi_0x088900c0__gt,
+	arm_instr_multi_0x088900c0__le,
+	arm_instr_multi_0x088900c0,
+	arm_instr_nop,
+	arm_instr_multi_0x088300c0__eq,
+	arm_instr_multi_0x088300c0__ne,
+	arm_instr_multi_0x088300c0__cs,
+	arm_instr_multi_0x088300c0__cc,
+	arm_instr_multi_0x088300c0__mi,
+	arm_instr_multi_0x088300c0__pl,
+	arm_instr_multi_0x088300c0__vs,
+	arm_instr_multi_0x088300c0__vc,
+	arm_instr_multi_0x088300c0__hi,
+	arm_instr_multi_0x088300c0__ls,
+	arm_instr_multi_0x088300c0__ge,
+	arm_instr_multi_0x088300c0__lt,
+	arm_instr_multi_0x088300c0__gt,
+	arm_instr_multi_0x088300c0__le,
+	arm_instr_multi_0x088300c0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_152[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08a10300__eq,
+	arm_instr_multi_0x08a10300__ne,
+	arm_instr_multi_0x08a10300__cs,
+	arm_instr_multi_0x08a10300__cc,
+	arm_instr_multi_0x08a10300__mi,
+	arm_instr_multi_0x08a10300__pl,
+	arm_instr_multi_0x08a10300__vs,
+	arm_instr_multi_0x08a10300__vc,
+	arm_instr_multi_0x08a10300__hi,
+	arm_instr_multi_0x08a10300__ls,
+	arm_instr_multi_0x08a10300__ge,
+	arm_instr_multi_0x08a10300__lt,
+	arm_instr_multi_0x08a10300__gt,
+	arm_instr_multi_0x08a10300__le,
+	arm_instr_multi_0x08a10300,
+	arm_instr_nop,
+	arm_instr_multi_0x08a10f00__eq,
+	arm_instr_multi_0x08a10f00__ne,
+	arm_instr_multi_0x08a10f00__cs,
+	arm_instr_multi_0x08a10f00__cc,
+	arm_instr_multi_0x08a10f00__mi,
+	arm_instr_multi_0x08a10f00__pl,
+	arm_instr_multi_0x08a10f00__vs,
+	arm_instr_multi_0x08a10f00__vc,
+	arm_instr_multi_0x08a10f00__hi,
+	arm_instr_multi_0x08a10f00__ls,
+	arm_instr_multi_0x08a10f00__ge,
+	arm_instr_multi_0x08a10f00__lt,
+	arm_instr_multi_0x08a10f00__gt,
+	arm_instr_multi_0x08a10f00__le,
+	arm_instr_multi_0x08a10f00,
+	arm_instr_nop,
+	arm_instr_multi_0x08830300__eq,
+	arm_instr_multi_0x08830300__ne,
+	arm_instr_multi_0x08830300__cs,
+	arm_instr_multi_0x08830300__cc,
+	arm_instr_multi_0x08830300__mi,
+	arm_instr_multi_0x08830300__pl,
+	arm_instr_multi_0x08830300__vs,
+	arm_instr_multi_0x08830300__vc,
+	arm_instr_multi_0x08830300__hi,
+	arm_instr_multi_0x08830300__ls,
+	arm_instr_multi_0x08830300__ge,
+	arm_instr_multi_0x08830300__lt,
+	arm_instr_multi_0x08830300__gt,
+	arm_instr_multi_0x08830300__le,
+	arm_instr_multi_0x08830300,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_158[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08a151f8__eq,
+	arm_instr_multi_0x08a151f8__ne,
+	arm_instr_multi_0x08a151f8__cs,
+	arm_instr_multi_0x08a151f8__cc,
+	arm_instr_multi_0x08a151f8__mi,
+	arm_instr_multi_0x08a151f8__pl,
+	arm_instr_multi_0x08a151f8__vs,
+	arm_instr_multi_0x08a151f8__vc,
+	arm_instr_multi_0x08a151f8__hi,
+	arm_instr_multi_0x08a151f8__ls,
+	arm_instr_multi_0x08a151f8__ge,
+	arm_instr_multi_0x08a151f8__lt,
+	arm_instr_multi_0x08a151f8__gt,
+	arm_instr_multi_0x08a151f8__le,
+	arm_instr_multi_0x08a151f8,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_160[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08840003__eq,
+	arm_instr_multi_0x08840003__ne,
+	arm_instr_multi_0x08840003__cs,
+	arm_instr_multi_0x08840003__cc,
+	arm_instr_multi_0x08840003__mi,
+	arm_instr_multi_0x08840003__pl,
+	arm_instr_multi_0x08840003__vs,
+	arm_instr_multi_0x08840003__vc,
+	arm_instr_multi_0x08840003__hi,
+	arm_instr_multi_0x08840003__ls,
+	arm_instr_multi_0x08840003__ge,
+	arm_instr_multi_0x08840003__lt,
+	arm_instr_multi_0x08840003__gt,
+	arm_instr_multi_0x08840003__le,
+	arm_instr_multi_0x08840003,
+	arm_instr_nop,
+	arm_instr_multi_0x088e1002__eq,
+	arm_instr_multi_0x088e1002__ne,
+	arm_instr_multi_0x088e1002__cs,
+	arm_instr_multi_0x088e1002__cc,
+	arm_instr_multi_0x088e1002__mi,
+	arm_instr_multi_0x088e1002__pl,
+	arm_instr_multi_0x088e1002__vs,
+	arm_instr_multi_0x088e1002__vc,
+	arm_instr_multi_0x088e1002__hi,
+	arm_instr_multi_0x088e1002__ls,
+	arm_instr_multi_0x088e1002__ge,
+	arm_instr_multi_0x088e1002__lt,
+	arm_instr_multi_0x088e1002__gt,
+	arm_instr_multi_0x088e1002__le,
+	arm_instr_multi_0x088e1002,
+	arm_instr_nop,
+	arm_instr_multi_0x08840600__eq,
+	arm_instr_multi_0x08840600__ne,
+	arm_instr_multi_0x08840600__cs,
+	arm_instr_multi_0x08840600__cc,
+	arm_instr_multi_0x08840600__mi,
+	arm_instr_multi_0x08840600__pl,
+	arm_instr_multi_0x08840600__vs,
+	arm_instr_multi_0x08840600__vc,
+	arm_instr_multi_0x08840600__hi,
+	arm_instr_multi_0x08840600__ls,
+	arm_instr_multi_0x08840600__ge,
+	arm_instr_multi_0x08840600__lt,
+	arm_instr_multi_0x08840600__gt,
+	arm_instr_multi_0x08840600__le,
+	arm_instr_multi_0x08840600,
+	arm_instr_nop,
+	arm_instr_multi_0x088c0003__eq,
+	arm_instr_multi_0x088c0003__ne,
+	arm_instr_multi_0x088c0003__cs,
+	arm_instr_multi_0x088c0003__cc,
+	arm_instr_multi_0x088c0003__mi,
+	arm_instr_multi_0x088c0003__pl,
+	arm_instr_multi_0x088c0003__vs,
+	arm_instr_multi_0x088c0003__vc,
+	arm_instr_multi_0x088c0003__hi,
+	arm_instr_multi_0x088c0003__ls,
+	arm_instr_multi_0x088c0003__ge,
+	arm_instr_multi_0x088c0003__lt,
+	arm_instr_multi_0x088c0003__gt,
+	arm_instr_multi_0x088c0003__le,
+	arm_instr_multi_0x088c0003,
+	arm_instr_nop,
+	arm_instr_multi_0x098c0003__eq,
+	arm_instr_multi_0x098c0003__ne,
+	arm_instr_multi_0x098c0003__cs,
+	arm_instr_multi_0x098c0003__cc,
+	arm_instr_multi_0x098c0003__mi,
+	arm_instr_multi_0x098c0003__pl,
+	arm_instr_multi_0x098c0003__vs,
+	arm_instr_multi_0x098c0003__vc,
+	arm_instr_multi_0x098c0003__hi,
+	arm_instr_multi_0x098c0003__ls,
+	arm_instr_multi_0x098c0003__ge,
+	arm_instr_multi_0x098c0003__lt,
+	arm_instr_multi_0x098c0003__gt,
+	arm_instr_multi_0x098c0003__le,
+	arm_instr_multi_0x098c0003,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_161[112])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08ac000c__eq,
+	arm_instr_multi_0x08ac000c__ne,
+	arm_instr_multi_0x08ac000c__cs,
+	arm_instr_multi_0x08ac000c__cc,
+	arm_instr_multi_0x08ac000c__mi,
+	arm_instr_multi_0x08ac000c__pl,
+	arm_instr_multi_0x08ac000c__vs,
+	arm_instr_multi_0x08ac000c__vc,
+	arm_instr_multi_0x08ac000c__hi,
+	arm_instr_multi_0x08ac000c__ls,
+	arm_instr_multi_0x08ac000c__ge,
+	arm_instr_multi_0x08ac000c__lt,
+	arm_instr_multi_0x08ac000c__gt,
+	arm_instr_multi_0x08ac000c__le,
+	arm_instr_multi_0x08ac000c,
+	arm_instr_nop,
+	arm_instr_multi_0x088c0006__eq,
+	arm_instr_multi_0x088c0006__ne,
+	arm_instr_multi_0x088c0006__cs,
+	arm_instr_multi_0x088c0006__cc,
+	arm_instr_multi_0x088c0006__mi,
+	arm_instr_multi_0x088c0006__pl,
+	arm_instr_multi_0x088c0006__vs,
+	arm_instr_multi_0x088c0006__vc,
+	arm_instr_multi_0x088c0006__hi,
+	arm_instr_multi_0x088c0006__ls,
+	arm_instr_multi_0x088c0006__ge,
+	arm_instr_multi_0x088c0006__lt,
+	arm_instr_multi_0x088c0006__gt,
+	arm_instr_multi_0x088c0006__le,
+	arm_instr_multi_0x088c0006,
+	arm_instr_nop,
+	arm_instr_multi_0x08860006__eq,
+	arm_instr_multi_0x08860006__ne,
+	arm_instr_multi_0x08860006__cs,
+	arm_instr_multi_0x08860006__cc,
+	arm_instr_multi_0x08860006__mi,
+	arm_instr_multi_0x08860006__pl,
+	arm_instr_multi_0x08860006__vs,
+	arm_instr_multi_0x08860006__vc,
+	arm_instr_multi_0x08860006__hi,
+	arm_instr_multi_0x08860006__ls,
+	arm_instr_multi_0x08860006__ge,
+	arm_instr_multi_0x08860006__lt,
+	arm_instr_multi_0x08860006__gt,
+	arm_instr_multi_0x08860006__le,
+	arm_instr_multi_0x08860006,
+	arm_instr_nop,
+	arm_instr_multi_0x088e000c__eq,
+	arm_instr_multi_0x088e000c__ne,
+	arm_instr_multi_0x088e000c__cs,
+	arm_instr_multi_0x088e000c__cc,
+	arm_instr_multi_0x088e000c__mi,
+	arm_instr_multi_0x088e000c__pl,
+	arm_instr_multi_0x088e000c__vs,
+	arm_instr_multi_0x088e000c__vc,
+	arm_instr_multi_0x088e000c__hi,
+	arm_instr_multi_0x088e000c__ls,
+	arm_instr_multi_0x088e000c__ge,
+	arm_instr_multi_0x088e000c__lt,
+	arm_instr_multi_0x088e000c__gt,
+	arm_instr_multi_0x088e000c__le,
+	arm_instr_multi_0x088e000c,
+	arm_instr_nop,
+	arm_instr_multi_0x09860006__eq,
+	arm_instr_multi_0x09860006__ne,
+	arm_instr_multi_0x09860006__cs,
+	arm_instr_multi_0x09860006__cc,
+	arm_instr_multi_0x09860006__mi,
+	arm_instr_multi_0x09860006__pl,
+	arm_instr_multi_0x09860006__vs,
+	arm_instr_multi_0x09860006__vc,
+	arm_instr_multi_0x09860006__hi,
+	arm_instr_multi_0x09860006__ls,
+	arm_instr_multi_0x09860006__ge,
+	arm_instr_multi_0x09860006__lt,
+	arm_instr_multi_0x09860006__gt,
+	arm_instr_multi_0x09860006__le,
+	arm_instr_multi_0x09860006,
+	arm_instr_nop,
+	arm_instr_multi_0x098c0006__eq,
+	arm_instr_multi_0x098c0006__ne,
+	arm_instr_multi_0x098c0006__cs,
+	arm_instr_multi_0x098c0006__cc,
+	arm_instr_multi_0x098c0006__mi,
+	arm_instr_multi_0x098c0006__pl,
+	arm_instr_multi_0x098c0006__vs,
+	arm_instr_multi_0x098c0006__vc,
+	arm_instr_multi_0x098c0006__hi,
+	arm_instr_multi_0x098c0006__ls,
+	arm_instr_multi_0x098c0006__ge,
+	arm_instr_multi_0x098c0006__lt,
+	arm_instr_multi_0x098c0006__gt,
+	arm_instr_multi_0x098c0006__le,
+	arm_instr_multi_0x098c0006,
+	arm_instr_nop,
+	arm_instr_multi_0x08ac000f__eq,
+	arm_instr_multi_0x08ac000f__ne,
+	arm_instr_multi_0x08ac000f__cs,
+	arm_instr_multi_0x08ac000f__cc,
+	arm_instr_multi_0x08ac000f__mi,
+	arm_instr_multi_0x08ac000f__pl,
+	arm_instr_multi_0x08ac000f__vs,
+	arm_instr_multi_0x08ac000f__vc,
+	arm_instr_multi_0x08ac000f__hi,
+	arm_instr_multi_0x08ac000f__ls,
+	arm_instr_multi_0x08ac000f__ge,
+	arm_instr_multi_0x08ac000f__lt,
+	arm_instr_multi_0x08ac000f__gt,
+	arm_instr_multi_0x08ac000f__le,
+	arm_instr_multi_0x08ac000f,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_162[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x088e0018__eq,
+	arm_instr_multi_0x088e0018__ne,
+	arm_instr_multi_0x088e0018__cs,
+	arm_instr_multi_0x088e0018__cc,
+	arm_instr_multi_0x088e0018__mi,
+	arm_instr_multi_0x088e0018__pl,
+	arm_instr_multi_0x088e0018__vs,
+	arm_instr_multi_0x088e0018__vc,
+	arm_instr_multi_0x088e0018__hi,
+	arm_instr_multi_0x088e0018__ls,
+	arm_instr_multi_0x088e0018__ge,
+	arm_instr_multi_0x088e0018__lt,
+	arm_instr_multi_0x088e0018__gt,
+	arm_instr_multi_0x088e0018__le,
+	arm_instr_multi_0x088e0018,
+	arm_instr_nop,
+	arm_instr_multi_0x088c0018__eq,
+	arm_instr_multi_0x088c0018__ne,
+	arm_instr_multi_0x088c0018__cs,
+	arm_instr_multi_0x088c0018__cc,
+	arm_instr_multi_0x088c0018__mi,
+	arm_instr_multi_0x088c0018__pl,
+	arm_instr_multi_0x088c0018__vs,
+	arm_instr_multi_0x088c0018__vc,
+	arm_instr_multi_0x088c0018__hi,
+	arm_instr_multi_0x088c0018__ls,
+	arm_instr_multi_0x088c0018__ge,
+	arm_instr_multi_0x088c0018__lt,
+	arm_instr_multi_0x088c0018__gt,
+	arm_instr_multi_0x088c0018__le,
+	arm_instr_multi_0x088c0018,
+	arm_instr_nop,
+	arm_instr_multi_0x09860030__eq,
+	arm_instr_multi_0x09860030__ne,
+	arm_instr_multi_0x09860030__cs,
+	arm_instr_multi_0x09860030__cc,
+	arm_instr_multi_0x09860030__mi,
+	arm_instr_multi_0x09860030__pl,
+	arm_instr_multi_0x09860030__vs,
+	arm_instr_multi_0x09860030__vc,
+	arm_instr_multi_0x09860030__hi,
+	arm_instr_multi_0x09860030__ls,
+	arm_instr_multi_0x09860030__ge,
+	arm_instr_multi_0x09860030__lt,
+	arm_instr_multi_0x09860030__gt,
+	arm_instr_multi_0x09860030__le,
+	arm_instr_multi_0x09860030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_164[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x088c0060__eq,
+	arm_instr_multi_0x088c0060__ne,
+	arm_instr_multi_0x088c0060__cs,
+	arm_instr_multi_0x088c0060__cc,
+	arm_instr_multi_0x088c0060__mi,
+	arm_instr_multi_0x088c0060__pl,
+	arm_instr_multi_0x088c0060__vs,
+	arm_instr_multi_0x088c0060__vc,
+	arm_instr_multi_0x088c0060__hi,
+	arm_instr_multi_0x088c0060__ls,
+	arm_instr_multi_0x088c0060__ge,
+	arm_instr_multi_0x088c0060__lt,
+	arm_instr_multi_0x088c0060__gt,
+	arm_instr_multi_0x088c0060__le,
+	arm_instr_multi_0x088c0060,
+	arm_instr_nop,
+	arm_instr_multi_0x088e00c0__eq,
+	arm_instr_multi_0x088e00c0__ne,
+	arm_instr_multi_0x088e00c0__cs,
+	arm_instr_multi_0x088e00c0__cc,
+	arm_instr_multi_0x088e00c0__mi,
+	arm_instr_multi_0x088e00c0__pl,
+	arm_instr_multi_0x088e00c0__vs,
+	arm_instr_multi_0x088e00c0__vc,
+	arm_instr_multi_0x088e00c0__hi,
+	arm_instr_multi_0x088e00c0__ls,
+	arm_instr_multi_0x088e00c0__ge,
+	arm_instr_multi_0x088e00c0__lt,
+	arm_instr_multi_0x088e00c0__gt,
+	arm_instr_multi_0x088e00c0__le,
+	arm_instr_multi_0x088e00c0,
+	arm_instr_nop,
+	arm_instr_multi_0x088c00c8__eq,
+	arm_instr_multi_0x088c00c8__ne,
+	arm_instr_multi_0x088c00c8__cs,
+	arm_instr_multi_0x088c00c8__cc,
+	arm_instr_multi_0x088c00c8__mi,
+	arm_instr_multi_0x088c00c8__pl,
+	arm_instr_multi_0x088c00c8__vs,
+	arm_instr_multi_0x088c00c8__vc,
+	arm_instr_multi_0x088c00c8__hi,
+	arm_instr_multi_0x088c00c8__ls,
+	arm_instr_multi_0x088c00c8__ge,
+	arm_instr_multi_0x088c00c8__lt,
+	arm_instr_multi_0x088c00c8__gt,
+	arm_instr_multi_0x088c00c8__le,
+	arm_instr_multi_0x088c00c8,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_176[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08850003__eq,
+	arm_instr_multi_0x08850003__ne,
+	arm_instr_multi_0x08850003__cs,
+	arm_instr_multi_0x08850003__cc,
+	arm_instr_multi_0x08850003__mi,
+	arm_instr_multi_0x08850003__pl,
+	arm_instr_multi_0x08850003__vs,
+	arm_instr_multi_0x08850003__vc,
+	arm_instr_multi_0x08850003__hi,
+	arm_instr_multi_0x08850003__ls,
+	arm_instr_multi_0x08850003__ge,
+	arm_instr_multi_0x08850003__lt,
+	arm_instr_multi_0x08850003__gt,
+	arm_instr_multi_0x08850003__le,
+	arm_instr_multi_0x08850003,
+	arm_instr_nop,
+	arm_instr_multi_0x088d0088__eq,
+	arm_instr_multi_0x088d0088__ne,
+	arm_instr_multi_0x088d0088__cs,
+	arm_instr_multi_0x088d0088__cc,
+	arm_instr_multi_0x088d0088__mi,
+	arm_instr_multi_0x088d0088__pl,
+	arm_instr_multi_0x088d0088__vs,
+	arm_instr_multi_0x088d0088__vc,
+	arm_instr_multi_0x088d0088__hi,
+	arm_instr_multi_0x088d0088__ls,
+	arm_instr_multi_0x088d0088__ge,
+	arm_instr_multi_0x088d0088__lt,
+	arm_instr_multi_0x088d0088__gt,
+	arm_instr_multi_0x088d0088__le,
+	arm_instr_multi_0x088d0088,
+	arm_instr_nop,
+	arm_instr_multi_0x088d1020__eq,
+	arm_instr_multi_0x088d1020__ne,
+	arm_instr_multi_0x088d1020__cs,
+	arm_instr_multi_0x088d1020__cc,
+	arm_instr_multi_0x088d1020__mi,
+	arm_instr_multi_0x088d1020__pl,
+	arm_instr_multi_0x088d1020__vs,
+	arm_instr_multi_0x088d1020__vc,
+	arm_instr_multi_0x088d1020__hi,
+	arm_instr_multi_0x088d1020__ls,
+	arm_instr_multi_0x088d1020__ge,
+	arm_instr_multi_0x088d1020__lt,
+	arm_instr_multi_0x088d1020__gt,
+	arm_instr_multi_0x088d1020__le,
+	arm_instr_multi_0x088d1020,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_177[64])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08850006__eq,
+	arm_instr_multi_0x08850006__ne,
+	arm_instr_multi_0x08850006__cs,
+	arm_instr_multi_0x08850006__cc,
+	arm_instr_multi_0x08850006__mi,
+	arm_instr_multi_0x08850006__pl,
+	arm_instr_multi_0x08850006__vs,
+	arm_instr_multi_0x08850006__vc,
+	arm_instr_multi_0x08850006__hi,
+	arm_instr_multi_0x08850006__ls,
+	arm_instr_multi_0x08850006__ge,
+	arm_instr_multi_0x08850006__lt,
+	arm_instr_multi_0x08850006__gt,
+	arm_instr_multi_0x08850006__le,
+	arm_instr_multi_0x08850006,
+	arm_instr_nop,
+	arm_instr_multi_0x08870006__eq,
+	arm_instr_multi_0x08870006__ne,
+	arm_instr_multi_0x08870006__cs,
+	arm_instr_multi_0x08870006__cc,
+	arm_instr_multi_0x08870006__mi,
+	arm_instr_multi_0x08870006__pl,
+	arm_instr_multi_0x08870006__vs,
+	arm_instr_multi_0x08870006__vc,
+	arm_instr_multi_0x08870006__hi,
+	arm_instr_multi_0x08870006__ls,
+	arm_instr_multi_0x08870006__ge,
+	arm_instr_multi_0x08870006__lt,
+	arm_instr_multi_0x08870006__gt,
+	arm_instr_multi_0x08870006__le,
+	arm_instr_multi_0x08870006,
+	arm_instr_nop,
+	arm_instr_multi_0x0885000c__eq,
+	arm_instr_multi_0x0885000c__ne,
+	arm_instr_multi_0x0885000c__cs,
+	arm_instr_multi_0x0885000c__cc,
+	arm_instr_multi_0x0885000c__mi,
+	arm_instr_multi_0x0885000c__pl,
+	arm_instr_multi_0x0885000c__vs,
+	arm_instr_multi_0x0885000c__vc,
+	arm_instr_multi_0x0885000c__hi,
+	arm_instr_multi_0x0885000c__ls,
+	arm_instr_multi_0x0885000c__ge,
+	arm_instr_multi_0x0885000c__lt,
+	arm_instr_multi_0x0885000c__gt,
+	arm_instr_multi_0x0885000c__le,
+	arm_instr_multi_0x0885000c,
+	arm_instr_nop,
+	arm_instr_multi_0x098d000e__eq,
+	arm_instr_multi_0x098d000e__ne,
+	arm_instr_multi_0x098d000e__cs,
+	arm_instr_multi_0x098d000e__cc,
+	arm_instr_multi_0x098d000e__mi,
+	arm_instr_multi_0x098d000e__pl,
+	arm_instr_multi_0x098d000e__vs,
+	arm_instr_multi_0x098d000e__vc,
+	arm_instr_multi_0x098d000e__hi,
+	arm_instr_multi_0x098d000e__ls,
+	arm_instr_multi_0x098d000e__ge,
+	arm_instr_multi_0x098d000e__lt,
+	arm_instr_multi_0x098d000e__gt,
+	arm_instr_multi_0x098d000e__le,
+	arm_instr_multi_0x098d000e,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_178[96])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09870018__eq,
+	arm_instr_multi_0x09870018__ne,
+	arm_instr_multi_0x09870018__cs,
+	arm_instr_multi_0x09870018__cc,
+	arm_instr_multi_0x09870018__mi,
+	arm_instr_multi_0x09870018__pl,
+	arm_instr_multi_0x09870018__vs,
+	arm_instr_multi_0x09870018__vc,
+	arm_instr_multi_0x09870018__hi,
+	arm_instr_multi_0x09870018__ls,
+	arm_instr_multi_0x09870018__ge,
+	arm_instr_multi_0x09870018__lt,
+	arm_instr_multi_0x09870018__gt,
+	arm_instr_multi_0x09870018__le,
+	arm_instr_multi_0x09870018,
+	arm_instr_nop,
+	arm_instr_multi_0x098d0030__eq,
+	arm_instr_multi_0x098d0030__ne,
+	arm_instr_multi_0x098d0030__cs,
+	arm_instr_multi_0x098d0030__cc,
+	arm_instr_multi_0x098d0030__mi,
+	arm_instr_multi_0x098d0030__pl,
+	arm_instr_multi_0x098d0030__vs,
+	arm_instr_multi_0x098d0030__vc,
+	arm_instr_multi_0x098d0030__hi,
+	arm_instr_multi_0x098d0030__ls,
+	arm_instr_multi_0x098d0030__ge,
+	arm_instr_multi_0x098d0030__lt,
+	arm_instr_multi_0x098d0030__gt,
+	arm_instr_multi_0x098d0030__le,
+	arm_instr_multi_0x098d0030,
+	arm_instr_nop,
+	arm_instr_multi_0x088d1010__eq,
+	arm_instr_multi_0x088d1010__ne,
+	arm_instr_multi_0x088d1010__cs,
+	arm_instr_multi_0x088d1010__cc,
+	arm_instr_multi_0x088d1010__mi,
+	arm_instr_multi_0x088d1010__pl,
+	arm_instr_multi_0x088d1010__vs,
+	arm_instr_multi_0x088d1010__vc,
+	arm_instr_multi_0x088d1010__hi,
+	arm_instr_multi_0x088d1010__ls,
+	arm_instr_multi_0x088d1010__ge,
+	arm_instr_multi_0x088d1010__lt,
+	arm_instr_multi_0x088d1010__gt,
+	arm_instr_multi_0x088d1010__le,
+	arm_instr_multi_0x088d1010,
+	arm_instr_nop,
+	arm_instr_multi_0x088d0030__eq,
+	arm_instr_multi_0x088d0030__ne,
+	arm_instr_multi_0x088d0030__cs,
+	arm_instr_multi_0x088d0030__cc,
+	arm_instr_multi_0x088d0030__mi,
+	arm_instr_multi_0x088d0030__pl,
+	arm_instr_multi_0x088d0030__vs,
+	arm_instr_multi_0x088d0030__vc,
+	arm_instr_multi_0x088d0030__hi,
+	arm_instr_multi_0x088d0030__ls,
+	arm_instr_multi_0x088d0030__ge,
+	arm_instr_multi_0x088d0030__lt,
+	arm_instr_multi_0x088d0030__gt,
+	arm_instr_multi_0x088d0030__le,
+	arm_instr_multi_0x088d0030,
+	arm_instr_nop,
+	arm_instr_multi_0x088d4010__eq,
+	arm_instr_multi_0x088d4010__ne,
+	arm_instr_multi_0x088d4010__cs,
+	arm_instr_multi_0x088d4010__cc,
+	arm_instr_multi_0x088d4010__mi,
+	arm_instr_multi_0x088d4010__pl,
+	arm_instr_multi_0x088d4010__vs,
+	arm_instr_multi_0x088d4010__vc,
+	arm_instr_multi_0x088d4010__hi,
+	arm_instr_multi_0x088d4010__ls,
+	arm_instr_multi_0x088d4010__ge,
+	arm_instr_multi_0x088d4010__lt,
+	arm_instr_multi_0x088d4010__gt,
+	arm_instr_multi_0x088d4010__le,
+	arm_instr_multi_0x088d4010,
+	arm_instr_nop,
+	arm_instr_multi_0x08850018__eq,
+	arm_instr_multi_0x08850018__ne,
+	arm_instr_multi_0x08850018__cs,
+	arm_instr_multi_0x08850018__cc,
+	arm_instr_multi_0x08850018__mi,
+	arm_instr_multi_0x08850018__pl,
+	arm_instr_multi_0x08850018__vs,
+	arm_instr_multi_0x08850018__vc,
+	arm_instr_multi_0x08850018__hi,
+	arm_instr_multi_0x08850018__ls,
+	arm_instr_multi_0x08850018__ge,
+	arm_instr_multi_0x08850018__lt,
+	arm_instr_multi_0x08850018__gt,
+	arm_instr_multi_0x08850018__le,
+	arm_instr_multi_0x08850018,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_179[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x09850014__eq,
+	arm_instr_multi_0x09850014__ne,
+	arm_instr_multi_0x09850014__cs,
+	arm_instr_multi_0x09850014__cc,
+	arm_instr_multi_0x09850014__mi,
+	arm_instr_multi_0x09850014__pl,
+	arm_instr_multi_0x09850014__vs,
+	arm_instr_multi_0x09850014__vc,
+	arm_instr_multi_0x09850014__hi,
+	arm_instr_multi_0x09850014__ls,
+	arm_instr_multi_0x09850014__ge,
+	arm_instr_multi_0x09850014__lt,
+	arm_instr_multi_0x09850014__gt,
+	arm_instr_multi_0x09850014__le,
+	arm_instr_multi_0x09850014,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_184[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x088d1100__eq,
+	arm_instr_multi_0x088d1100__ne,
+	arm_instr_multi_0x088d1100__cs,
+	arm_instr_multi_0x088d1100__cc,
+	arm_instr_multi_0x088d1100__mi,
+	arm_instr_multi_0x088d1100__pl,
+	arm_instr_multi_0x088d1100__vs,
+	arm_instr_multi_0x088d1100__vc,
+	arm_instr_multi_0x088d1100__hi,
+	arm_instr_multi_0x088d1100__ls,
+	arm_instr_multi_0x088d1100__ge,
+	arm_instr_multi_0x088d1100__lt,
+	arm_instr_multi_0x088d1100__gt,
+	arm_instr_multi_0x088d1100__le,
+	arm_instr_multi_0x088d1100,
+	arm_instr_nop,
+	arm_instr_multi_0x088d0180__eq,
+	arm_instr_multi_0x088d0180__ne,
+	arm_instr_multi_0x088d0180__cs,
+	arm_instr_multi_0x088d0180__cc,
+	arm_instr_multi_0x088d0180__mi,
+	arm_instr_multi_0x088d0180__pl,
+	arm_instr_multi_0x088d0180__vs,
+	arm_instr_multi_0x088d0180__vc,
+	arm_instr_multi_0x088d0180__hi,
+	arm_instr_multi_0x088d0180__ls,
+	arm_instr_multi_0x088d0180__ge,
+	arm_instr_multi_0x088d0180__lt,
+	arm_instr_multi_0x088d0180__gt,
+	arm_instr_multi_0x088d0180__le,
+	arm_instr_multi_0x088d0180,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_191[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x088d1fff__eq,
+	arm_instr_multi_0x088d1fff__ne,
+	arm_instr_multi_0x088d1fff__cs,
+	arm_instr_multi_0x088d1fff__cc,
+	arm_instr_multi_0x088d1fff__mi,
+	arm_instr_multi_0x088d1fff__pl,
+	arm_instr_multi_0x088d1fff__vs,
+	arm_instr_multi_0x088d1fff__vc,
+	arm_instr_multi_0x088d1fff__hi,
+	arm_instr_multi_0x088d1fff__ls,
+	arm_instr_multi_0x088d1fff__ge,
+	arm_instr_multi_0x088d1fff__lt,
+	arm_instr_multi_0x088d1fff__gt,
+	arm_instr_multi_0x088d1fff__le,
+	arm_instr_multi_0x088d1fff,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_192[96])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08920003__eq,
+	arm_instr_multi_0x08920003__ne,
+	arm_instr_multi_0x08920003__cs,
+	arm_instr_multi_0x08920003__cc,
+	arm_instr_multi_0x08920003__mi,
+	arm_instr_multi_0x08920003__pl,
+	arm_instr_multi_0x08920003__vs,
+	arm_instr_multi_0x08920003__vc,
+	arm_instr_multi_0x08920003__hi,
+	arm_instr_multi_0x08920003__ls,
+	arm_instr_multi_0x08920003__ge,
+	arm_instr_multi_0x08920003__lt,
+	arm_instr_multi_0x08920003__gt,
+	arm_instr_multi_0x08920003__le,
+	arm_instr_multi_0x08920003,
+	arm_instr_nop,
+	arm_instr_multi_0x08900003__eq,
+	arm_instr_multi_0x08900003__ne,
+	arm_instr_multi_0x08900003__cs,
+	arm_instr_multi_0x08900003__cc,
+	arm_instr_multi_0x08900003__mi,
+	arm_instr_multi_0x08900003__pl,
+	arm_instr_multi_0x08900003__vs,
+	arm_instr_multi_0x08900003__vc,
+	arm_instr_multi_0x08900003__hi,
+	arm_instr_multi_0x08900003__ls,
+	arm_instr_multi_0x08900003__ge,
+	arm_instr_multi_0x08900003__lt,
+	arm_instr_multi_0x08900003__gt,
+	arm_instr_multi_0x08900003__le,
+	arm_instr_multi_0x08900003,
+	arm_instr_nop,
+	arm_instr_multi_0x09920003__eq,
+	arm_instr_multi_0x09920003__ne,
+	arm_instr_multi_0x09920003__cs,
+	arm_instr_multi_0x09920003__cc,
+	arm_instr_multi_0x09920003__mi,
+	arm_instr_multi_0x09920003__pl,
+	arm_instr_multi_0x09920003__vs,
+	arm_instr_multi_0x09920003__vc,
+	arm_instr_multi_0x09920003__hi,
+	arm_instr_multi_0x09920003__ls,
+	arm_instr_multi_0x09920003__ge,
+	arm_instr_multi_0x09920003__lt,
+	arm_instr_multi_0x09920003__gt,
+	arm_instr_multi_0x09920003__le,
+	arm_instr_multi_0x09920003,
+	arm_instr_nop,
+	arm_instr_multi_0x08980003__eq,
+	arm_instr_multi_0x08980003__ne,
+	arm_instr_multi_0x08980003__cs,
+	arm_instr_multi_0x08980003__cc,
+	arm_instr_multi_0x08980003__mi,
+	arm_instr_multi_0x08980003__pl,
+	arm_instr_multi_0x08980003__vs,
+	arm_instr_multi_0x08980003__vc,
+	arm_instr_multi_0x08980003__hi,
+	arm_instr_multi_0x08980003__ls,
+	arm_instr_multi_0x08980003__ge,
+	arm_instr_multi_0x08980003__lt,
+	arm_instr_multi_0x08980003__gt,
+	arm_instr_multi_0x08980003__le,
+	arm_instr_multi_0x08980003,
+	arm_instr_nop,
+	arm_instr_multi_0x09904008__eq,
+	arm_instr_multi_0x09904008__ne,
+	arm_instr_multi_0x09904008__cs,
+	arm_instr_multi_0x09904008__cc,
+	arm_instr_multi_0x09904008__mi,
+	arm_instr_multi_0x09904008__pl,
+	arm_instr_multi_0x09904008__vs,
+	arm_instr_multi_0x09904008__vc,
+	arm_instr_multi_0x09904008__hi,
+	arm_instr_multi_0x09904008__ls,
+	arm_instr_multi_0x09904008__ge,
+	arm_instr_multi_0x09904008__lt,
+	arm_instr_multi_0x09904008__gt,
+	arm_instr_multi_0x09904008__le,
+	arm_instr_multi_0x09904008,
+	arm_instr_nop,
+	arm_instr_multi_0x099a0003__eq,
+	arm_instr_multi_0x099a0003__ne,
+	arm_instr_multi_0x099a0003__cs,
+	arm_instr_multi_0x099a0003__cc,
+	arm_instr_multi_0x099a0003__mi,
+	arm_instr_multi_0x099a0003__pl,
+	arm_instr_multi_0x099a0003__vs,
+	arm_instr_multi_0x099a0003__vc,
+	arm_instr_multi_0x099a0003__hi,
+	arm_instr_multi_0x099a0003__ls,
+	arm_instr_multi_0x099a0003__ge,
+	arm_instr_multi_0x099a0003__lt,
+	arm_instr_multi_0x099a0003__gt,
+	arm_instr_multi_0x099a0003__le,
+	arm_instr_multi_0x099a0003,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_193[64])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08900006__eq,
+	arm_instr_multi_0x08900006__ne,
+	arm_instr_multi_0x08900006__cs,
+	arm_instr_multi_0x08900006__cc,
+	arm_instr_multi_0x08900006__mi,
+	arm_instr_multi_0x08900006__pl,
+	arm_instr_multi_0x08900006__vs,
+	arm_instr_multi_0x08900006__vc,
+	arm_instr_multi_0x08900006__hi,
+	arm_instr_multi_0x08900006__ls,
+	arm_instr_multi_0x08900006__ge,
+	arm_instr_multi_0x08900006__lt,
+	arm_instr_multi_0x08900006__gt,
+	arm_instr_multi_0x08900006__le,
+	arm_instr_multi_0x08900006,
+	arm_instr_nop,
+	arm_instr_multi_0x0892000c__eq,
+	arm_instr_multi_0x0892000c__ne,
+	arm_instr_multi_0x0892000c__cs,
+	arm_instr_multi_0x0892000c__cc,
+	arm_instr_multi_0x0892000c__mi,
+	arm_instr_multi_0x0892000c__pl,
+	arm_instr_multi_0x0892000c__vs,
+	arm_instr_multi_0x0892000c__vc,
+	arm_instr_multi_0x0892000c__hi,
+	arm_instr_multi_0x0892000c__ls,
+	arm_instr_multi_0x0892000c__ge,
+	arm_instr_multi_0x0892000c__lt,
+	arm_instr_multi_0x0892000c__gt,
+	arm_instr_multi_0x0892000c__le,
+	arm_instr_multi_0x0892000c,
+	arm_instr_nop,
+	arm_instr_multi_0x08920006__eq,
+	arm_instr_multi_0x08920006__ne,
+	arm_instr_multi_0x08920006__cs,
+	arm_instr_multi_0x08920006__cc,
+	arm_instr_multi_0x08920006__mi,
+	arm_instr_multi_0x08920006__pl,
+	arm_instr_multi_0x08920006__vs,
+	arm_instr_multi_0x08920006__vc,
+	arm_instr_multi_0x08920006__hi,
+	arm_instr_multi_0x08920006__ls,
+	arm_instr_multi_0x08920006__ge,
+	arm_instr_multi_0x08920006__lt,
+	arm_instr_multi_0x08920006__gt,
+	arm_instr_multi_0x08920006__le,
+	arm_instr_multi_0x08920006,
+	arm_instr_nop,
+	arm_instr_multi_0x08980006__eq,
+	arm_instr_multi_0x08980006__ne,
+	arm_instr_multi_0x08980006__cs,
+	arm_instr_multi_0x08980006__cc,
+	arm_instr_multi_0x08980006__mi,
+	arm_instr_multi_0x08980006__pl,
+	arm_instr_multi_0x08980006__vs,
+	arm_instr_multi_0x08980006__vc,
+	arm_instr_multi_0x08980006__hi,
+	arm_instr_multi_0x08980006__ls,
+	arm_instr_multi_0x08980006__ge,
+	arm_instr_multi_0x08980006__lt,
+	arm_instr_multi_0x08980006__gt,
+	arm_instr_multi_0x08980006__le,
+	arm_instr_multi_0x08980006,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_194[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08920018__eq,
+	arm_instr_multi_0x08920018__ne,
+	arm_instr_multi_0x08920018__cs,
+	arm_instr_multi_0x08920018__cc,
+	arm_instr_multi_0x08920018__mi,
+	arm_instr_multi_0x08920018__pl,
+	arm_instr_multi_0x08920018__vs,
+	arm_instr_multi_0x08920018__vc,
+	arm_instr_multi_0x08920018__hi,
+	arm_instr_multi_0x08920018__ls,
+	arm_instr_multi_0x08920018__ge,
+	arm_instr_multi_0x08920018__lt,
+	arm_instr_multi_0x08920018__gt,
+	arm_instr_multi_0x08920018__le,
+	arm_instr_multi_0x08920018,
+	arm_instr_nop,
+	arm_instr_multi_0x08980018__eq,
+	arm_instr_multi_0x08980018__ne,
+	arm_instr_multi_0x08980018__cs,
+	arm_instr_multi_0x08980018__cc,
+	arm_instr_multi_0x08980018__mi,
+	arm_instr_multi_0x08980018__pl,
+	arm_instr_multi_0x08980018__vs,
+	arm_instr_multi_0x08980018__vc,
+	arm_instr_multi_0x08980018__hi,
+	arm_instr_multi_0x08980018__ls,
+	arm_instr_multi_0x08980018__ge,
+	arm_instr_multi_0x08980018__lt,
+	arm_instr_multi_0x08980018__gt,
+	arm_instr_multi_0x08980018__le,
+	arm_instr_multi_0x08980018,
+	arm_instr_nop,
+	arm_instr_multi_0x08900018__eq,
+	arm_instr_multi_0x08900018__ne,
+	arm_instr_multi_0x08900018__cs,
+	arm_instr_multi_0x08900018__cc,
+	arm_instr_multi_0x08900018__mi,
+	arm_instr_multi_0x08900018__pl,
+	arm_instr_multi_0x08900018__vs,
+	arm_instr_multi_0x08900018__vc,
+	arm_instr_multi_0x08900018__hi,
+	arm_instr_multi_0x08900018__ls,
+	arm_instr_multi_0x08900018__ge,
+	arm_instr_multi_0x08900018__lt,
+	arm_instr_multi_0x08900018__gt,
+	arm_instr_multi_0x08900018__le,
+	arm_instr_multi_0x08900018,
+	arm_instr_nop,
+	arm_instr_multi_0x09900018__eq,
+	arm_instr_multi_0x09900018__ne,
+	arm_instr_multi_0x09900018__cs,
+	arm_instr_multi_0x09900018__cc,
+	arm_instr_multi_0x09900018__mi,
+	arm_instr_multi_0x09900018__pl,
+	arm_instr_multi_0x09900018__vs,
+	arm_instr_multi_0x09900018__vc,
+	arm_instr_multi_0x09900018__hi,
+	arm_instr_multi_0x09900018__ls,
+	arm_instr_multi_0x09900018__ge,
+	arm_instr_multi_0x09900018__lt,
+	arm_instr_multi_0x09900018__gt,
+	arm_instr_multi_0x09900018__le,
+	arm_instr_multi_0x09900018,
+	arm_instr_nop,
+	arm_instr_multi_0x08920030__eq,
+	arm_instr_multi_0x08920030__ne,
+	arm_instr_multi_0x08920030__cs,
+	arm_instr_multi_0x08920030__cc,
+	arm_instr_multi_0x08920030__mi,
+	arm_instr_multi_0x08920030__pl,
+	arm_instr_multi_0x08920030__vs,
+	arm_instr_multi_0x08920030__vc,
+	arm_instr_multi_0x08920030__hi,
+	arm_instr_multi_0x08920030__ls,
+	arm_instr_multi_0x08920030__ge,
+	arm_instr_multi_0x08920030__lt,
+	arm_instr_multi_0x08920030__gt,
+	arm_instr_multi_0x08920030__le,
+	arm_instr_multi_0x08920030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_196[64])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08b000c0__eq,
+	arm_instr_multi_0x08b000c0__ne,
+	arm_instr_multi_0x08b000c0__cs,
+	arm_instr_multi_0x08b000c0__cc,
+	arm_instr_multi_0x08b000c0__mi,
+	arm_instr_multi_0x08b000c0__pl,
+	arm_instr_multi_0x08b000c0__vs,
+	arm_instr_multi_0x08b000c0__vc,
+	arm_instr_multi_0x08b000c0__hi,
+	arm_instr_multi_0x08b000c0__ls,
+	arm_instr_multi_0x08b000c0__ge,
+	arm_instr_multi_0x08b000c0__lt,
+	arm_instr_multi_0x08b000c0__gt,
+	arm_instr_multi_0x08b000c0__le,
+	arm_instr_multi_0x08b000c0,
+	arm_instr_nop,
+	arm_instr_multi_0x08980060__eq,
+	arm_instr_multi_0x08980060__ne,
+	arm_instr_multi_0x08980060__cs,
+	arm_instr_multi_0x08980060__cc,
+	arm_instr_multi_0x08980060__mi,
+	arm_instr_multi_0x08980060__pl,
+	arm_instr_multi_0x08980060__vs,
+	arm_instr_multi_0x08980060__vc,
+	arm_instr_multi_0x08980060__hi,
+	arm_instr_multi_0x08980060__ls,
+	arm_instr_multi_0x08980060__ge,
+	arm_instr_multi_0x08980060__lt,
+	arm_instr_multi_0x08980060__gt,
+	arm_instr_multi_0x08980060__le,
+	arm_instr_multi_0x08980060,
+	arm_instr_nop,
+	arm_instr_multi_0x08900060__eq,
+	arm_instr_multi_0x08900060__ne,
+	arm_instr_multi_0x08900060__cs,
+	arm_instr_multi_0x08900060__cc,
+	arm_instr_multi_0x08900060__mi,
+	arm_instr_multi_0x08900060__pl,
+	arm_instr_multi_0x08900060__vs,
+	arm_instr_multi_0x08900060__vc,
+	arm_instr_multi_0x08900060__hi,
+	arm_instr_multi_0x08900060__ls,
+	arm_instr_multi_0x08900060__ge,
+	arm_instr_multi_0x08900060__lt,
+	arm_instr_multi_0x08900060__gt,
+	arm_instr_multi_0x08900060__le,
+	arm_instr_multi_0x08900060,
+	arm_instr_nop,
+	arm_instr_multi_0x089200c0__eq,
+	arm_instr_multi_0x089200c0__ne,
+	arm_instr_multi_0x089200c0__cs,
+	arm_instr_multi_0x089200c0__cc,
+	arm_instr_multi_0x089200c0__mi,
+	arm_instr_multi_0x089200c0__pl,
+	arm_instr_multi_0x089200c0__vs,
+	arm_instr_multi_0x089200c0__vc,
+	arm_instr_multi_0x089200c0__hi,
+	arm_instr_multi_0x089200c0__ls,
+	arm_instr_multi_0x089200c0__ge,
+	arm_instr_multi_0x089200c0__lt,
+	arm_instr_multi_0x089200c0__gt,
+	arm_instr_multi_0x089200c0__le,
+	arm_instr_multi_0x089200c0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_200[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08b00300__eq,
+	arm_instr_multi_0x08b00300__ne,
+	arm_instr_multi_0x08b00300__cs,
+	arm_instr_multi_0x08b00300__cc,
+	arm_instr_multi_0x08b00300__mi,
+	arm_instr_multi_0x08b00300__pl,
+	arm_instr_multi_0x08b00300__vs,
+	arm_instr_multi_0x08b00300__vc,
+	arm_instr_multi_0x08b00300__hi,
+	arm_instr_multi_0x08b00300__ls,
+	arm_instr_multi_0x08b00300__ge,
+	arm_instr_multi_0x08b00300__lt,
+	arm_instr_multi_0x08b00300__gt,
+	arm_instr_multi_0x08b00300__le,
+	arm_instr_multi_0x08b00300,
+	arm_instr_nop,
+	arm_instr_multi_0x09900120__eq,
+	arm_instr_multi_0x09900120__ne,
+	arm_instr_multi_0x09900120__cs,
+	arm_instr_multi_0x09900120__cc,
+	arm_instr_multi_0x09900120__mi,
+	arm_instr_multi_0x09900120__pl,
+	arm_instr_multi_0x09900120__vs,
+	arm_instr_multi_0x09900120__vc,
+	arm_instr_multi_0x09900120__hi,
+	arm_instr_multi_0x09900120__ls,
+	arm_instr_multi_0x09900120__ge,
+	arm_instr_multi_0x09900120__lt,
+	arm_instr_multi_0x09900120__gt,
+	arm_instr_multi_0x09900120__le,
+	arm_instr_multi_0x09900120,
+	arm_instr_nop,
+	arm_instr_multi_0x08980300__eq,
+	arm_instr_multi_0x08980300__ne,
+	arm_instr_multi_0x08980300__cs,
+	arm_instr_multi_0x08980300__cc,
+	arm_instr_multi_0x08980300__mi,
+	arm_instr_multi_0x08980300__pl,
+	arm_instr_multi_0x08980300__vs,
+	arm_instr_multi_0x08980300__vc,
+	arm_instr_multi_0x08980300__hi,
+	arm_instr_multi_0x08980300__ls,
+	arm_instr_multi_0x08980300__ge,
+	arm_instr_multi_0x08980300__lt,
+	arm_instr_multi_0x08980300__gt,
+	arm_instr_multi_0x08980300__le,
+	arm_instr_multi_0x08980300,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_204[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08b00fc0__eq,
+	arm_instr_multi_0x08b00fc0__ne,
+	arm_instr_multi_0x08b00fc0__cs,
+	arm_instr_multi_0x08b00fc0__cc,
+	arm_instr_multi_0x08b00fc0__mi,
+	arm_instr_multi_0x08b00fc0__pl,
+	arm_instr_multi_0x08b00fc0__vs,
+	arm_instr_multi_0x08b00fc0__vc,
+	arm_instr_multi_0x08b00fc0__hi,
+	arm_instr_multi_0x08b00fc0__ls,
+	arm_instr_multi_0x08b00fc0__ge,
+	arm_instr_multi_0x08b00fc0__lt,
+	arm_instr_multi_0x08b00fc0__gt,
+	arm_instr_multi_0x08b00fc0__le,
+	arm_instr_multi_0x08b00fc0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_206[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08b051f8__eq,
+	arm_instr_multi_0x08b051f8__ne,
+	arm_instr_multi_0x08b051f8__cs,
+	arm_instr_multi_0x08b051f8__cc,
+	arm_instr_multi_0x08b051f8__mi,
+	arm_instr_multi_0x08b051f8__pl,
+	arm_instr_multi_0x08b051f8__vs,
+	arm_instr_multi_0x08b051f8__vc,
+	arm_instr_multi_0x08b051f8__hi,
+	arm_instr_multi_0x08b051f8__ls,
+	arm_instr_multi_0x08b051f8__ge,
+	arm_instr_multi_0x08b051f8__lt,
+	arm_instr_multi_0x08b051f8__gt,
+	arm_instr_multi_0x08b051f8__le,
+	arm_instr_multi_0x08b051f8,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_208[128])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08930003__eq,
+	arm_instr_multi_0x08930003__ne,
+	arm_instr_multi_0x08930003__cs,
+	arm_instr_multi_0x08930003__cc,
+	arm_instr_multi_0x08930003__mi,
+	arm_instr_multi_0x08930003__pl,
+	arm_instr_multi_0x08930003__vs,
+	arm_instr_multi_0x08930003__vc,
+	arm_instr_multi_0x08930003__hi,
+	arm_instr_multi_0x08930003__ls,
+	arm_instr_multi_0x08930003__ge,
+	arm_instr_multi_0x08930003__lt,
+	arm_instr_multi_0x08930003__gt,
+	arm_instr_multi_0x08930003__le,
+	arm_instr_multi_0x08930003,
+	arm_instr_nop,
+	arm_instr_multi_0x08910003__eq,
+	arm_instr_multi_0x08910003__ne,
+	arm_instr_multi_0x08910003__cs,
+	arm_instr_multi_0x08910003__cc,
+	arm_instr_multi_0x08910003__mi,
+	arm_instr_multi_0x08910003__pl,
+	arm_instr_multi_0x08910003__vs,
+	arm_instr_multi_0x08910003__vc,
+	arm_instr_multi_0x08910003__hi,
+	arm_instr_multi_0x08910003__ls,
+	arm_instr_multi_0x08910003__ge,
+	arm_instr_multi_0x08910003__lt,
+	arm_instr_multi_0x08910003__gt,
+	arm_instr_multi_0x08910003__le,
+	arm_instr_multi_0x08910003,
+	arm_instr_nop,
+	arm_instr_multi_0x08930600__eq,
+	arm_instr_multi_0x08930600__ne,
+	arm_instr_multi_0x08930600__cs,
+	arm_instr_multi_0x08930600__cc,
+	arm_instr_multi_0x08930600__mi,
+	arm_instr_multi_0x08930600__pl,
+	arm_instr_multi_0x08930600__vs,
+	arm_instr_multi_0x08930600__vc,
+	arm_instr_multi_0x08930600__hi,
+	arm_instr_multi_0x08930600__ls,
+	arm_instr_multi_0x08930600__ge,
+	arm_instr_multi_0x08930600__lt,
+	arm_instr_multi_0x08930600__gt,
+	arm_instr_multi_0x08930600__le,
+	arm_instr_multi_0x08930600,
+	arm_instr_nop,
+	arm_instr_multi_0x08b11008__eq,
+	arm_instr_multi_0x08b11008__ne,
+	arm_instr_multi_0x08b11008__cs,
+	arm_instr_multi_0x08b11008__cc,
+	arm_instr_multi_0x08b11008__mi,
+	arm_instr_multi_0x08b11008__pl,
+	arm_instr_multi_0x08b11008__vs,
+	arm_instr_multi_0x08b11008__vc,
+	arm_instr_multi_0x08b11008__hi,
+	arm_instr_multi_0x08b11008__ls,
+	arm_instr_multi_0x08b11008__ge,
+	arm_instr_multi_0x08b11008__lt,
+	arm_instr_multi_0x08b11008__gt,
+	arm_instr_multi_0x08b11008__le,
+	arm_instr_multi_0x08b11008,
+	arm_instr_nop,
+	arm_instr_multi_0x08b15008__eq,
+	arm_instr_multi_0x08b15008__ne,
+	arm_instr_multi_0x08b15008__cs,
+	arm_instr_multi_0x08b15008__cc,
+	arm_instr_multi_0x08b15008__mi,
+	arm_instr_multi_0x08b15008__pl,
+	arm_instr_multi_0x08b15008__vs,
+	arm_instr_multi_0x08b15008__vc,
+	arm_instr_multi_0x08b15008__hi,
+	arm_instr_multi_0x08b15008__ls,
+	arm_instr_multi_0x08b15008__ge,
+	arm_instr_multi_0x08b15008__lt,
+	arm_instr_multi_0x08b15008__gt,
+	arm_instr_multi_0x08b15008__le,
+	arm_instr_multi_0x08b15008,
+	arm_instr_nop,
+	arm_instr_multi_0x08931008__eq,
+	arm_instr_multi_0x08931008__ne,
+	arm_instr_multi_0x08931008__cs,
+	arm_instr_multi_0x08931008__cc,
+	arm_instr_multi_0x08931008__mi,
+	arm_instr_multi_0x08931008__pl,
+	arm_instr_multi_0x08931008__vs,
+	arm_instr_multi_0x08931008__vc,
+	arm_instr_multi_0x08931008__hi,
+	arm_instr_multi_0x08931008__ls,
+	arm_instr_multi_0x08931008__ge,
+	arm_instr_multi_0x08931008__lt,
+	arm_instr_multi_0x08931008__gt,
+	arm_instr_multi_0x08931008__le,
+	arm_instr_multi_0x08931008,
+	arm_instr_nop,
+	arm_instr_multi_0x08990600__eq,
+	arm_instr_multi_0x08990600__ne,
+	arm_instr_multi_0x08990600__cs,
+	arm_instr_multi_0x08990600__cc,
+	arm_instr_multi_0x08990600__mi,
+	arm_instr_multi_0x08990600__pl,
+	arm_instr_multi_0x08990600__vs,
+	arm_instr_multi_0x08990600__vc,
+	arm_instr_multi_0x08990600__hi,
+	arm_instr_multi_0x08990600__ls,
+	arm_instr_multi_0x08990600__ge,
+	arm_instr_multi_0x08990600__lt,
+	arm_instr_multi_0x08990600__gt,
+	arm_instr_multi_0x08990600__le,
+	arm_instr_multi_0x08990600,
+	arm_instr_nop,
+	arm_instr_multi_0x08990003__eq,
+	arm_instr_multi_0x08990003__ne,
+	arm_instr_multi_0x08990003__cs,
+	arm_instr_multi_0x08990003__cc,
+	arm_instr_multi_0x08990003__mi,
+	arm_instr_multi_0x08990003__pl,
+	arm_instr_multi_0x08990003__vs,
+	arm_instr_multi_0x08990003__vc,
+	arm_instr_multi_0x08990003__hi,
+	arm_instr_multi_0x08990003__ls,
+	arm_instr_multi_0x08990003__ge,
+	arm_instr_multi_0x08990003__lt,
+	arm_instr_multi_0x08990003__gt,
+	arm_instr_multi_0x08990003__le,
+	arm_instr_multi_0x08990003,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_209[96])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08930006__eq,
+	arm_instr_multi_0x08930006__ne,
+	arm_instr_multi_0x08930006__cs,
+	arm_instr_multi_0x08930006__cc,
+	arm_instr_multi_0x08930006__mi,
+	arm_instr_multi_0x08930006__pl,
+	arm_instr_multi_0x08930006__vs,
+	arm_instr_multi_0x08930006__vc,
+	arm_instr_multi_0x08930006__hi,
+	arm_instr_multi_0x08930006__ls,
+	arm_instr_multi_0x08930006__ge,
+	arm_instr_multi_0x08930006__lt,
+	arm_instr_multi_0x08930006__gt,
+	arm_instr_multi_0x08930006__le,
+	arm_instr_multi_0x08930006,
+	arm_instr_nop,
+	arm_instr_multi_0x0891000e__eq,
+	arm_instr_multi_0x0891000e__ne,
+	arm_instr_multi_0x0891000e__cs,
+	arm_instr_multi_0x0891000e__cc,
+	arm_instr_multi_0x0891000e__mi,
+	arm_instr_multi_0x0891000e__pl,
+	arm_instr_multi_0x0891000e__vs,
+	arm_instr_multi_0x0891000e__vc,
+	arm_instr_multi_0x0891000e__hi,
+	arm_instr_multi_0x0891000e__ls,
+	arm_instr_multi_0x0891000e__ge,
+	arm_instr_multi_0x0891000e__lt,
+	arm_instr_multi_0x0891000e__gt,
+	arm_instr_multi_0x0891000e__le,
+	arm_instr_multi_0x0891000e,
+	arm_instr_nop,
+	arm_instr_multi_0x08910006__eq,
+	arm_instr_multi_0x08910006__ne,
+	arm_instr_multi_0x08910006__cs,
+	arm_instr_multi_0x08910006__cc,
+	arm_instr_multi_0x08910006__mi,
+	arm_instr_multi_0x08910006__pl,
+	arm_instr_multi_0x08910006__vs,
+	arm_instr_multi_0x08910006__vc,
+	arm_instr_multi_0x08910006__hi,
+	arm_instr_multi_0x08910006__ls,
+	arm_instr_multi_0x08910006__ge,
+	arm_instr_multi_0x08910006__lt,
+	arm_instr_multi_0x08910006__gt,
+	arm_instr_multi_0x08910006__le,
+	arm_instr_multi_0x08910006,
+	arm_instr_nop,
+	arm_instr_multi_0x09930006__eq,
+	arm_instr_multi_0x09930006__ne,
+	arm_instr_multi_0x09930006__cs,
+	arm_instr_multi_0x09930006__cc,
+	arm_instr_multi_0x09930006__mi,
+	arm_instr_multi_0x09930006__pl,
+	arm_instr_multi_0x09930006__vs,
+	arm_instr_multi_0x09930006__vc,
+	arm_instr_multi_0x09930006__hi,
+	arm_instr_multi_0x09930006__ls,
+	arm_instr_multi_0x09930006__ge,
+	arm_instr_multi_0x09930006__lt,
+	arm_instr_multi_0x09930006__gt,
+	arm_instr_multi_0x09930006__le,
+	arm_instr_multi_0x09930006,
+	arm_instr_nop,
+	arm_instr_multi_0x0893000c__eq,
+	arm_instr_multi_0x0893000c__ne,
+	arm_instr_multi_0x0893000c__cs,
+	arm_instr_multi_0x0893000c__cc,
+	arm_instr_multi_0x0893000c__mi,
+	arm_instr_multi_0x0893000c__pl,
+	arm_instr_multi_0x0893000c__vs,
+	arm_instr_multi_0x0893000c__vc,
+	arm_instr_multi_0x0893000c__hi,
+	arm_instr_multi_0x0893000c__ls,
+	arm_instr_multi_0x0893000c__ge,
+	arm_instr_multi_0x0893000c__lt,
+	arm_instr_multi_0x0893000c__gt,
+	arm_instr_multi_0x0893000c__le,
+	arm_instr_multi_0x0893000c,
+	arm_instr_nop,
+	arm_instr_multi_0x08990006__eq,
+	arm_instr_multi_0x08990006__ne,
+	arm_instr_multi_0x08990006__cs,
+	arm_instr_multi_0x08990006__cc,
+	arm_instr_multi_0x08990006__mi,
+	arm_instr_multi_0x08990006__pl,
+	arm_instr_multi_0x08990006__vs,
+	arm_instr_multi_0x08990006__vc,
+	arm_instr_multi_0x08990006__hi,
+	arm_instr_multi_0x08990006__ls,
+	arm_instr_multi_0x08990006__ge,
+	arm_instr_multi_0x08990006__lt,
+	arm_instr_multi_0x08990006__gt,
+	arm_instr_multi_0x08990006__le,
+	arm_instr_multi_0x08990006,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_210[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08b15018__eq,
+	arm_instr_multi_0x08b15018__ne,
+	arm_instr_multi_0x08b15018__cs,
+	arm_instr_multi_0x08b15018__cc,
+	arm_instr_multi_0x08b15018__mi,
+	arm_instr_multi_0x08b15018__pl,
+	arm_instr_multi_0x08b15018__vs,
+	arm_instr_multi_0x08b15018__vc,
+	arm_instr_multi_0x08b15018__hi,
+	arm_instr_multi_0x08b15018__ls,
+	arm_instr_multi_0x08b15018__ge,
+	arm_instr_multi_0x08b15018__lt,
+	arm_instr_multi_0x08b15018__gt,
+	arm_instr_multi_0x08b15018__le,
+	arm_instr_multi_0x08b15018,
+	arm_instr_nop,
+	arm_instr_multi_0x08930018__eq,
+	arm_instr_multi_0x08930018__ne,
+	arm_instr_multi_0x08930018__cs,
+	arm_instr_multi_0x08930018__cc,
+	arm_instr_multi_0x08930018__mi,
+	arm_instr_multi_0x08930018__pl,
+	arm_instr_multi_0x08930018__vs,
+	arm_instr_multi_0x08930018__vc,
+	arm_instr_multi_0x08930018__hi,
+	arm_instr_multi_0x08930018__ls,
+	arm_instr_multi_0x08930018__ge,
+	arm_instr_multi_0x08930018__lt,
+	arm_instr_multi_0x08930018__gt,
+	arm_instr_multi_0x08930018__le,
+	arm_instr_multi_0x08930018,
+	arm_instr_nop,
+	arm_instr_multi_0x099b0030__eq,
+	arm_instr_multi_0x099b0030__ne,
+	arm_instr_multi_0x099b0030__cs,
+	arm_instr_multi_0x099b0030__cc,
+	arm_instr_multi_0x099b0030__mi,
+	arm_instr_multi_0x099b0030__pl,
+	arm_instr_multi_0x099b0030__vs,
+	arm_instr_multi_0x099b0030__vc,
+	arm_instr_multi_0x099b0030__hi,
+	arm_instr_multi_0x099b0030__ls,
+	arm_instr_multi_0x099b0030__ge,
+	arm_instr_multi_0x099b0030__lt,
+	arm_instr_multi_0x099b0030__gt,
+	arm_instr_multi_0x099b0030__le,
+	arm_instr_multi_0x099b0030,
+	arm_instr_nop,
+	arm_instr_multi_0x08910030__eq,
+	arm_instr_multi_0x08910030__ne,
+	arm_instr_multi_0x08910030__cs,
+	arm_instr_multi_0x08910030__cc,
+	arm_instr_multi_0x08910030__mi,
+	arm_instr_multi_0x08910030__pl,
+	arm_instr_multi_0x08910030__vs,
+	arm_instr_multi_0x08910030__vc,
+	arm_instr_multi_0x08910030__hi,
+	arm_instr_multi_0x08910030__ls,
+	arm_instr_multi_0x08910030__ge,
+	arm_instr_multi_0x08910030__lt,
+	arm_instr_multi_0x08910030__gt,
+	arm_instr_multi_0x08910030__le,
+	arm_instr_multi_0x08910030,
+	arm_instr_nop,
+	arm_instr_multi_0x08990018__eq,
+	arm_instr_multi_0x08990018__ne,
+	arm_instr_multi_0x08990018__cs,
+	arm_instr_multi_0x08990018__cc,
+	arm_instr_multi_0x08990018__mi,
+	arm_instr_multi_0x08990018__pl,
+	arm_instr_multi_0x08990018__vs,
+	arm_instr_multi_0x08990018__vc,
+	arm_instr_multi_0x08990018__hi,
+	arm_instr_multi_0x08990018__ls,
+	arm_instr_multi_0x08990018__ge,
+	arm_instr_multi_0x08990018__lt,
+	arm_instr_multi_0x08990018__gt,
+	arm_instr_multi_0x08990018__le,
+	arm_instr_multi_0x08990018,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_212[48])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08930060__eq,
+	arm_instr_multi_0x08930060__ne,
+	arm_instr_multi_0x08930060__cs,
+	arm_instr_multi_0x08930060__cc,
+	arm_instr_multi_0x08930060__mi,
+	arm_instr_multi_0x08930060__pl,
+	arm_instr_multi_0x08930060__vs,
+	arm_instr_multi_0x08930060__vc,
+	arm_instr_multi_0x08930060__hi,
+	arm_instr_multi_0x08930060__ls,
+	arm_instr_multi_0x08930060__ge,
+	arm_instr_multi_0x08930060__lt,
+	arm_instr_multi_0x08930060__gt,
+	arm_instr_multi_0x08930060__le,
+	arm_instr_multi_0x08930060,
+	arm_instr_nop,
+	arm_instr_multi_0x089100c0__eq,
+	arm_instr_multi_0x089100c0__ne,
+	arm_instr_multi_0x089100c0__cs,
+	arm_instr_multi_0x089100c0__cc,
+	arm_instr_multi_0x089100c0__mi,
+	arm_instr_multi_0x089100c0__pl,
+	arm_instr_multi_0x089100c0__vs,
+	arm_instr_multi_0x089100c0__vc,
+	arm_instr_multi_0x089100c0__hi,
+	arm_instr_multi_0x089100c0__ls,
+	arm_instr_multi_0x089100c0__ge,
+	arm_instr_multi_0x089100c0__lt,
+	arm_instr_multi_0x089100c0__gt,
+	arm_instr_multi_0x089100c0__le,
+	arm_instr_multi_0x089100c0,
+	arm_instr_nop,
+	arm_instr_multi_0x089300c0__eq,
+	arm_instr_multi_0x089300c0__ne,
+	arm_instr_multi_0x089300c0__cs,
+	arm_instr_multi_0x089300c0__cc,
+	arm_instr_multi_0x089300c0__mi,
+	arm_instr_multi_0x089300c0__pl,
+	arm_instr_multi_0x089300c0__vs,
+	arm_instr_multi_0x089300c0__vc,
+	arm_instr_multi_0x089300c0__hi,
+	arm_instr_multi_0x089300c0__ls,
+	arm_instr_multi_0x089300c0__ge,
+	arm_instr_multi_0x089300c0__lt,
+	arm_instr_multi_0x089300c0__gt,
+	arm_instr_multi_0x089300c0__le,
+	arm_instr_multi_0x089300c0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_216[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08930180__eq,
+	arm_instr_multi_0x08930180__ne,
+	arm_instr_multi_0x08930180__cs,
+	arm_instr_multi_0x08930180__cc,
+	arm_instr_multi_0x08930180__mi,
+	arm_instr_multi_0x08930180__pl,
+	arm_instr_multi_0x08930180__vs,
+	arm_instr_multi_0x08930180__vc,
+	arm_instr_multi_0x08930180__hi,
+	arm_instr_multi_0x08930180__ls,
+	arm_instr_multi_0x08930180__ge,
+	arm_instr_multi_0x08930180__lt,
+	arm_instr_multi_0x08930180__gt,
+	arm_instr_multi_0x08930180__le,
+	arm_instr_multi_0x08930180,
+	arm_instr_nop,
+	arm_instr_multi_0x099b0180__eq,
+	arm_instr_multi_0x099b0180__ne,
+	arm_instr_multi_0x099b0180__cs,
+	arm_instr_multi_0x099b0180__cc,
+	arm_instr_multi_0x099b0180__mi,
+	arm_instr_multi_0x099b0180__pl,
+	arm_instr_multi_0x099b0180__vs,
+	arm_instr_multi_0x099b0180__vc,
+	arm_instr_multi_0x099b0180__hi,
+	arm_instr_multi_0x099b0180__ls,
+	arm_instr_multi_0x099b0180__ge,
+	arm_instr_multi_0x099b0180__lt,
+	arm_instr_multi_0x099b0180__gt,
+	arm_instr_multi_0x099b0180__le,
+	arm_instr_multi_0x099b0180,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_224[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08940003__eq,
+	arm_instr_multi_0x08940003__ne,
+	arm_instr_multi_0x08940003__cs,
+	arm_instr_multi_0x08940003__cc,
+	arm_instr_multi_0x08940003__mi,
+	arm_instr_multi_0x08940003__pl,
+	arm_instr_multi_0x08940003__vs,
+	arm_instr_multi_0x08940003__vc,
+	arm_instr_multi_0x08940003__hi,
+	arm_instr_multi_0x08940003__ls,
+	arm_instr_multi_0x08940003__ge,
+	arm_instr_multi_0x08940003__lt,
+	arm_instr_multi_0x08940003__gt,
+	arm_instr_multi_0x08940003__le,
+	arm_instr_multi_0x08940003,
+	arm_instr_nop,
+	arm_instr_multi_0x089e000a__eq,
+	arm_instr_multi_0x089e000a__ne,
+	arm_instr_multi_0x089e000a__cs,
+	arm_instr_multi_0x089e000a__cc,
+	arm_instr_multi_0x089e000a__mi,
+	arm_instr_multi_0x089e000a__pl,
+	arm_instr_multi_0x089e000a__vs,
+	arm_instr_multi_0x089e000a__vc,
+	arm_instr_multi_0x089e000a__hi,
+	arm_instr_multi_0x089e000a__ls,
+	arm_instr_multi_0x089e000a__ge,
+	arm_instr_multi_0x089e000a__lt,
+	arm_instr_multi_0x089e000a__gt,
+	arm_instr_multi_0x089e000a__le,
+	arm_instr_multi_0x089e000a,
+	arm_instr_nop,
+	arm_instr_multi_0x0894000a__eq,
+	arm_instr_multi_0x0894000a__ne,
+	arm_instr_multi_0x0894000a__cs,
+	arm_instr_multi_0x0894000a__cc,
+	arm_instr_multi_0x0894000a__mi,
+	arm_instr_multi_0x0894000a__pl,
+	arm_instr_multi_0x0894000a__vs,
+	arm_instr_multi_0x0894000a__vc,
+	arm_instr_multi_0x0894000a__hi,
+	arm_instr_multi_0x0894000a__ls,
+	arm_instr_multi_0x0894000a__ge,
+	arm_instr_multi_0x0894000a__lt,
+	arm_instr_multi_0x0894000a__gt,
+	arm_instr_multi_0x0894000a__le,
+	arm_instr_multi_0x0894000a,
+	arm_instr_nop,
+	arm_instr_multi_0x08940009__eq,
+	arm_instr_multi_0x08940009__ne,
+	arm_instr_multi_0x08940009__cs,
+	arm_instr_multi_0x08940009__cc,
+	arm_instr_multi_0x08940009__mi,
+	arm_instr_multi_0x08940009__pl,
+	arm_instr_multi_0x08940009__vs,
+	arm_instr_multi_0x08940009__vc,
+	arm_instr_multi_0x08940009__hi,
+	arm_instr_multi_0x08940009__ls,
+	arm_instr_multi_0x08940009__ge,
+	arm_instr_multi_0x08940009__lt,
+	arm_instr_multi_0x08940009__gt,
+	arm_instr_multi_0x08940009__le,
+	arm_instr_multi_0x08940009,
+	arm_instr_nop,
+	arm_instr_multi_0x089c5000__eq,
+	arm_instr_multi_0x089c5000__ne,
+	arm_instr_multi_0x089c5000__cs,
+	arm_instr_multi_0x089c5000__cc,
+	arm_instr_multi_0x089c5000__mi,
+	arm_instr_multi_0x089c5000__pl,
+	arm_instr_multi_0x089c5000__vs,
+	arm_instr_multi_0x089c5000__vc,
+	arm_instr_multi_0x089c5000__hi,
+	arm_instr_multi_0x089c5000__ls,
+	arm_instr_multi_0x089c5000__ge,
+	arm_instr_multi_0x089c5000__lt,
+	arm_instr_multi_0x089c5000__gt,
+	arm_instr_multi_0x089c5000__le,
+	arm_instr_multi_0x089c5000,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_225[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x0894000c__eq,
+	arm_instr_multi_0x0894000c__ne,
+	arm_instr_multi_0x0894000c__cs,
+	arm_instr_multi_0x0894000c__cc,
+	arm_instr_multi_0x0894000c__mi,
+	arm_instr_multi_0x0894000c__pl,
+	arm_instr_multi_0x0894000c__vs,
+	arm_instr_multi_0x0894000c__vc,
+	arm_instr_multi_0x0894000c__hi,
+	arm_instr_multi_0x0894000c__ls,
+	arm_instr_multi_0x0894000c__ge,
+	arm_instr_multi_0x0894000c__lt,
+	arm_instr_multi_0x0894000c__gt,
+	arm_instr_multi_0x0894000c__le,
+	arm_instr_multi_0x0894000c,
+	arm_instr_nop,
+	arm_instr_multi_0x089c0006__eq,
+	arm_instr_multi_0x089c0006__ne,
+	arm_instr_multi_0x089c0006__cs,
+	arm_instr_multi_0x089c0006__cc,
+	arm_instr_multi_0x089c0006__mi,
+	arm_instr_multi_0x089c0006__pl,
+	arm_instr_multi_0x089c0006__vs,
+	arm_instr_multi_0x089c0006__vc,
+	arm_instr_multi_0x089c0006__hi,
+	arm_instr_multi_0x089c0006__ls,
+	arm_instr_multi_0x089c0006__ge,
+	arm_instr_multi_0x089c0006__lt,
+	arm_instr_multi_0x089c0006__gt,
+	arm_instr_multi_0x089c0006__le,
+	arm_instr_multi_0x089c0006,
+	arm_instr_nop,
+	arm_instr_multi_0x0896000c__eq,
+	arm_instr_multi_0x0896000c__ne,
+	arm_instr_multi_0x0896000c__cs,
+	arm_instr_multi_0x0896000c__cc,
+	arm_instr_multi_0x0896000c__mi,
+	arm_instr_multi_0x0896000c__pl,
+	arm_instr_multi_0x0896000c__vs,
+	arm_instr_multi_0x0896000c__vc,
+	arm_instr_multi_0x0896000c__hi,
+	arm_instr_multi_0x0896000c__ls,
+	arm_instr_multi_0x0896000c__ge,
+	arm_instr_multi_0x0896000c__lt,
+	arm_instr_multi_0x0896000c__gt,
+	arm_instr_multi_0x0896000c__le,
+	arm_instr_multi_0x0896000c,
+	arm_instr_nop,
+	arm_instr_multi_0x089c000c__eq,
+	arm_instr_multi_0x089c000c__ne,
+	arm_instr_multi_0x089c000c__cs,
+	arm_instr_multi_0x089c000c__cc,
+	arm_instr_multi_0x089c000c__mi,
+	arm_instr_multi_0x089c000c__pl,
+	arm_instr_multi_0x089c000c__vs,
+	arm_instr_multi_0x089c000c__vc,
+	arm_instr_multi_0x089c000c__hi,
+	arm_instr_multi_0x089c000c__ls,
+	arm_instr_multi_0x089c000c__ge,
+	arm_instr_multi_0x089c000c__lt,
+	arm_instr_multi_0x089c000c__gt,
+	arm_instr_multi_0x089c000c__le,
+	arm_instr_multi_0x089c000c,
+	arm_instr_nop,
+	arm_instr_multi_0x08be000f__eq,
+	arm_instr_multi_0x08be000f__ne,
+	arm_instr_multi_0x08be000f__cs,
+	arm_instr_multi_0x08be000f__cc,
+	arm_instr_multi_0x08be000f__mi,
+	arm_instr_multi_0x08be000f__pl,
+	arm_instr_multi_0x08be000f__vs,
+	arm_instr_multi_0x08be000f__vc,
+	arm_instr_multi_0x08be000f__hi,
+	arm_instr_multi_0x08be000f__ls,
+	arm_instr_multi_0x08be000f__ge,
+	arm_instr_multi_0x08be000f__lt,
+	arm_instr_multi_0x08be000f__gt,
+	arm_instr_multi_0x08be000f__le,
+	arm_instr_multi_0x08be000f,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_226[112])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x089e0018__eq,
+	arm_instr_multi_0x089e0018__ne,
+	arm_instr_multi_0x089e0018__cs,
+	arm_instr_multi_0x089e0018__cc,
+	arm_instr_multi_0x089e0018__mi,
+	arm_instr_multi_0x089e0018__pl,
+	arm_instr_multi_0x089e0018__vs,
+	arm_instr_multi_0x089e0018__vc,
+	arm_instr_multi_0x089e0018__hi,
+	arm_instr_multi_0x089e0018__ls,
+	arm_instr_multi_0x089e0018__ge,
+	arm_instr_multi_0x089e0018__lt,
+	arm_instr_multi_0x089e0018__gt,
+	arm_instr_multi_0x089e0018__le,
+	arm_instr_multi_0x089e0018,
+	arm_instr_nop,
+	arm_instr_multi_0x09940018__eq,
+	arm_instr_multi_0x09940018__ne,
+	arm_instr_multi_0x09940018__cs,
+	arm_instr_multi_0x09940018__cc,
+	arm_instr_multi_0x09940018__mi,
+	arm_instr_multi_0x09940018__pl,
+	arm_instr_multi_0x09940018__vs,
+	arm_instr_multi_0x09940018__vc,
+	arm_instr_multi_0x09940018__hi,
+	arm_instr_multi_0x09940018__ls,
+	arm_instr_multi_0x09940018__ge,
+	arm_instr_multi_0x09940018__lt,
+	arm_instr_multi_0x09940018__gt,
+	arm_instr_multi_0x09940018__le,
+	arm_instr_multi_0x09940018,
+	arm_instr_nop,
+	arm_instr_multi_0x089c0018__eq,
+	arm_instr_multi_0x089c0018__ne,
+	arm_instr_multi_0x089c0018__cs,
+	arm_instr_multi_0x089c0018__cc,
+	arm_instr_multi_0x089c0018__mi,
+	arm_instr_multi_0x089c0018__pl,
+	arm_instr_multi_0x089c0018__vs,
+	arm_instr_multi_0x089c0018__vc,
+	arm_instr_multi_0x089c0018__hi,
+	arm_instr_multi_0x089c0018__ls,
+	arm_instr_multi_0x089c0018__ge,
+	arm_instr_multi_0x089c0018__lt,
+	arm_instr_multi_0x089c0018__gt,
+	arm_instr_multi_0x089c0018__le,
+	arm_instr_multi_0x089c0018,
+	arm_instr_nop,
+	arm_instr_multi_0x089e0030__eq,
+	arm_instr_multi_0x089e0030__ne,
+	arm_instr_multi_0x089e0030__cs,
+	arm_instr_multi_0x089e0030__cc,
+	arm_instr_multi_0x089e0030__mi,
+	arm_instr_multi_0x089e0030__pl,
+	arm_instr_multi_0x089e0030__vs,
+	arm_instr_multi_0x089e0030__vc,
+	arm_instr_multi_0x089e0030__hi,
+	arm_instr_multi_0x089e0030__ls,
+	arm_instr_multi_0x089e0030__ge,
+	arm_instr_multi_0x089e0030__lt,
+	arm_instr_multi_0x089e0030__gt,
+	arm_instr_multi_0x089e0030__le,
+	arm_instr_multi_0x089e0030,
+	arm_instr_nop,
+	arm_instr_multi_0x08940012__eq,
+	arm_instr_multi_0x08940012__ne,
+	arm_instr_multi_0x08940012__cs,
+	arm_instr_multi_0x08940012__cc,
+	arm_instr_multi_0x08940012__mi,
+	arm_instr_multi_0x08940012__pl,
+	arm_instr_multi_0x08940012__vs,
+	arm_instr_multi_0x08940012__vc,
+	arm_instr_multi_0x08940012__hi,
+	arm_instr_multi_0x08940012__ls,
+	arm_instr_multi_0x08940012__ge,
+	arm_instr_multi_0x08940012__lt,
+	arm_instr_multi_0x08940012__gt,
+	arm_instr_multi_0x08940012__le,
+	arm_instr_multi_0x08940012,
+	arm_instr_nop,
+	arm_instr_multi_0x08940018__eq,
+	arm_instr_multi_0x08940018__ne,
+	arm_instr_multi_0x08940018__cs,
+	arm_instr_multi_0x08940018__cc,
+	arm_instr_multi_0x08940018__mi,
+	arm_instr_multi_0x08940018__pl,
+	arm_instr_multi_0x08940018__vs,
+	arm_instr_multi_0x08940018__vc,
+	arm_instr_multi_0x08940018__hi,
+	arm_instr_multi_0x08940018__ls,
+	arm_instr_multi_0x08940018__ge,
+	arm_instr_multi_0x08940018__lt,
+	arm_instr_multi_0x08940018__gt,
+	arm_instr_multi_0x08940018__le,
+	arm_instr_multi_0x08940018,
+	arm_instr_nop,
+	arm_instr_multi_0x08960030__eq,
+	arm_instr_multi_0x08960030__ne,
+	arm_instr_multi_0x08960030__cs,
+	arm_instr_multi_0x08960030__cc,
+	arm_instr_multi_0x08960030__mi,
+	arm_instr_multi_0x08960030__pl,
+	arm_instr_multi_0x08960030__vs,
+	arm_instr_multi_0x08960030__vc,
+	arm_instr_multi_0x08960030__hi,
+	arm_instr_multi_0x08960030__ls,
+	arm_instr_multi_0x08960030__ge,
+	arm_instr_multi_0x08960030__lt,
+	arm_instr_multi_0x08960030__gt,
+	arm_instr_multi_0x08960030__le,
+	arm_instr_multi_0x08960030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_228[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x089e0060__eq,
+	arm_instr_multi_0x089e0060__ne,
+	arm_instr_multi_0x089e0060__cs,
+	arm_instr_multi_0x089e0060__cc,
+	arm_instr_multi_0x089e0060__mi,
+	arm_instr_multi_0x089e0060__pl,
+	arm_instr_multi_0x089e0060__vs,
+	arm_instr_multi_0x089e0060__vc,
+	arm_instr_multi_0x089e0060__hi,
+	arm_instr_multi_0x089e0060__ls,
+	arm_instr_multi_0x089e0060__ge,
+	arm_instr_multi_0x089e0060__lt,
+	arm_instr_multi_0x089e0060__gt,
+	arm_instr_multi_0x089e0060__le,
+	arm_instr_multi_0x089e0060,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_232[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x099c0180__eq,
+	arm_instr_multi_0x099c0180__ne,
+	arm_instr_multi_0x099c0180__cs,
+	arm_instr_multi_0x099c0180__cc,
+	arm_instr_multi_0x099c0180__mi,
+	arm_instr_multi_0x099c0180__pl,
+	arm_instr_multi_0x099c0180__vs,
+	arm_instr_multi_0x099c0180__vc,
+	arm_instr_multi_0x099c0180__hi,
+	arm_instr_multi_0x099c0180__ls,
+	arm_instr_multi_0x099c0180__ge,
+	arm_instr_multi_0x099c0180__lt,
+	arm_instr_multi_0x099c0180__gt,
+	arm_instr_multi_0x099c0180__le,
+	arm_instr_multi_0x099c0180,
+	arm_instr_nop,
+	arm_instr_multi_0x089c0300__eq,
+	arm_instr_multi_0x089c0300__ne,
+	arm_instr_multi_0x089c0300__cs,
+	arm_instr_multi_0x089c0300__cc,
+	arm_instr_multi_0x089c0300__mi,
+	arm_instr_multi_0x089c0300__pl,
+	arm_instr_multi_0x089c0300__vs,
+	arm_instr_multi_0x089c0300__vc,
+	arm_instr_multi_0x089c0300__hi,
+	arm_instr_multi_0x089c0300__ls,
+	arm_instr_multi_0x089c0300__ge,
+	arm_instr_multi_0x089c0300__lt,
+	arm_instr_multi_0x089c0300__gt,
+	arm_instr_multi_0x089c0300__le,
+	arm_instr_multi_0x089c0300,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_240[96])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08bd8000__eq,
+	arm_instr_multi_0x08bd8000__ne,
+	arm_instr_multi_0x08bd8000__cs,
+	arm_instr_multi_0x08bd8000__cc,
+	arm_instr_multi_0x08bd8000__mi,
+	arm_instr_multi_0x08bd8000__pl,
+	arm_instr_multi_0x08bd8000__vs,
+	arm_instr_multi_0x08bd8000__vc,
+	arm_instr_multi_0x08bd8000__hi,
+	arm_instr_multi_0x08bd8000__ls,
+	arm_instr_multi_0x08bd8000__ge,
+	arm_instr_multi_0x08bd8000__lt,
+	arm_instr_multi_0x08bd8000__gt,
+	arm_instr_multi_0x08bd8000__le,
+	arm_instr_multi_0x08bd8000,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd8001__eq,
+	arm_instr_multi_0x08bd8001__ne,
+	arm_instr_multi_0x08bd8001__cs,
+	arm_instr_multi_0x08bd8001__cc,
+	arm_instr_multi_0x08bd8001__mi,
+	arm_instr_multi_0x08bd8001__pl,
+	arm_instr_multi_0x08bd8001__vs,
+	arm_instr_multi_0x08bd8001__vc,
+	arm_instr_multi_0x08bd8001__hi,
+	arm_instr_multi_0x08bd8001__ls,
+	arm_instr_multi_0x08bd8001__ge,
+	arm_instr_multi_0x08bd8001__lt,
+	arm_instr_multi_0x08bd8001__gt,
+	arm_instr_multi_0x08bd8001__le,
+	arm_instr_multi_0x08bd8001,
+	arm_instr_nop,
+	arm_instr_multi_0x08950003__eq,
+	arm_instr_multi_0x08950003__ne,
+	arm_instr_multi_0x08950003__cs,
+	arm_instr_multi_0x08950003__cc,
+	arm_instr_multi_0x08950003__mi,
+	arm_instr_multi_0x08950003__pl,
+	arm_instr_multi_0x08950003__vs,
+	arm_instr_multi_0x08950003__vc,
+	arm_instr_multi_0x08950003__hi,
+	arm_instr_multi_0x08950003__ls,
+	arm_instr_multi_0x08950003__ge,
+	arm_instr_multi_0x08950003__lt,
+	arm_instr_multi_0x08950003__gt,
+	arm_instr_multi_0x08950003__le,
+	arm_instr_multi_0x08950003,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd0400__eq,
+	arm_instr_multi_0x08bd0400__ne,
+	arm_instr_multi_0x08bd0400__cs,
+	arm_instr_multi_0x08bd0400__cc,
+	arm_instr_multi_0x08bd0400__mi,
+	arm_instr_multi_0x08bd0400__pl,
+	arm_instr_multi_0x08bd0400__vs,
+	arm_instr_multi_0x08bd0400__vc,
+	arm_instr_multi_0x08bd0400__hi,
+	arm_instr_multi_0x08bd0400__ls,
+	arm_instr_multi_0x08bd0400__ge,
+	arm_instr_multi_0x08bd0400__lt,
+	arm_instr_multi_0x08bd0400__gt,
+	arm_instr_multi_0x08bd0400__le,
+	arm_instr_multi_0x08bd0400,
+	arm_instr_nop,
+	arm_instr_multi_0x08970600__eq,
+	arm_instr_multi_0x08970600__ne,
+	arm_instr_multi_0x08970600__cs,
+	arm_instr_multi_0x08970600__cc,
+	arm_instr_multi_0x08970600__mi,
+	arm_instr_multi_0x08970600__pl,
+	arm_instr_multi_0x08970600__vs,
+	arm_instr_multi_0x08970600__vc,
+	arm_instr_multi_0x08970600__hi,
+	arm_instr_multi_0x08970600__ls,
+	arm_instr_multi_0x08970600__ge,
+	arm_instr_multi_0x08970600__lt,
+	arm_instr_multi_0x08970600__gt,
+	arm_instr_multi_0x08970600__le,
+	arm_instr_multi_0x08970600,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd8400__eq,
+	arm_instr_multi_0x08bd8400__ne,
+	arm_instr_multi_0x08bd8400__cs,
+	arm_instr_multi_0x08bd8400__cc,
+	arm_instr_multi_0x08bd8400__mi,
+	arm_instr_multi_0x08bd8400__pl,
+	arm_instr_multi_0x08bd8400__vs,
+	arm_instr_multi_0x08bd8400__vc,
+	arm_instr_multi_0x08bd8400__hi,
+	arm_instr_multi_0x08bd8400__ls,
+	arm_instr_multi_0x08bd8400__ge,
+	arm_instr_multi_0x08bd8400__lt,
+	arm_instr_multi_0x08bd8400__gt,
+	arm_instr_multi_0x08bd8400__le,
+	arm_instr_multi_0x08bd8400,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_241[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08950006__eq,
+	arm_instr_multi_0x08950006__ne,
+	arm_instr_multi_0x08950006__cs,
+	arm_instr_multi_0x08950006__cc,
+	arm_instr_multi_0x08950006__mi,
+	arm_instr_multi_0x08950006__pl,
+	arm_instr_multi_0x08950006__vs,
+	arm_instr_multi_0x08950006__vc,
+	arm_instr_multi_0x08950006__hi,
+	arm_instr_multi_0x08950006__ls,
+	arm_instr_multi_0x08950006__ge,
+	arm_instr_multi_0x08950006__lt,
+	arm_instr_multi_0x08950006__gt,
+	arm_instr_multi_0x08950006__le,
+	arm_instr_multi_0x08950006,
+	arm_instr_nop,
+	arm_instr_multi_0x08970006__eq,
+	arm_instr_multi_0x08970006__ne,
+	arm_instr_multi_0x08970006__cs,
+	arm_instr_multi_0x08970006__cc,
+	arm_instr_multi_0x08970006__mi,
+	arm_instr_multi_0x08970006__pl,
+	arm_instr_multi_0x08970006__vs,
+	arm_instr_multi_0x08970006__vc,
+	arm_instr_multi_0x08970006__hi,
+	arm_instr_multi_0x08970006__ls,
+	arm_instr_multi_0x08970006__ge,
+	arm_instr_multi_0x08970006__lt,
+	arm_instr_multi_0x08970006__gt,
+	arm_instr_multi_0x08970006__le,
+	arm_instr_multi_0x08970006,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_242[112])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08bd8010__eq,
+	arm_instr_multi_0x08bd8010__ne,
+	arm_instr_multi_0x08bd8010__cs,
+	arm_instr_multi_0x08bd8010__cc,
+	arm_instr_multi_0x08bd8010__mi,
+	arm_instr_multi_0x08bd8010__pl,
+	arm_instr_multi_0x08bd8010__vs,
+	arm_instr_multi_0x08bd8010__vc,
+	arm_instr_multi_0x08bd8010__hi,
+	arm_instr_multi_0x08bd8010__ls,
+	arm_instr_multi_0x08bd8010__ge,
+	arm_instr_multi_0x08bd8010__lt,
+	arm_instr_multi_0x08bd8010__gt,
+	arm_instr_multi_0x08bd8010__le,
+	arm_instr_multi_0x08bd8010,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd8030__eq,
+	arm_instr_multi_0x08bd8030__ne,
+	arm_instr_multi_0x08bd8030__cs,
+	arm_instr_multi_0x08bd8030__cc,
+	arm_instr_multi_0x08bd8030__mi,
+	arm_instr_multi_0x08bd8030__pl,
+	arm_instr_multi_0x08bd8030__vs,
+	arm_instr_multi_0x08bd8030__vc,
+	arm_instr_multi_0x08bd8030__hi,
+	arm_instr_multi_0x08bd8030__ls,
+	arm_instr_multi_0x08bd8030__ge,
+	arm_instr_multi_0x08bd8030__lt,
+	arm_instr_multi_0x08bd8030__gt,
+	arm_instr_multi_0x08bd8030__le,
+	arm_instr_multi_0x08bd8030,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd0030__eq,
+	arm_instr_multi_0x08bd0030__ne,
+	arm_instr_multi_0x08bd0030__cs,
+	arm_instr_multi_0x08bd0030__cc,
+	arm_instr_multi_0x08bd0030__mi,
+	arm_instr_multi_0x08bd0030__pl,
+	arm_instr_multi_0x08bd0030__vs,
+	arm_instr_multi_0x08bd0030__vc,
+	arm_instr_multi_0x08bd0030__hi,
+	arm_instr_multi_0x08bd0030__ls,
+	arm_instr_multi_0x08bd0030__ge,
+	arm_instr_multi_0x08bd0030__lt,
+	arm_instr_multi_0x08bd0030__gt,
+	arm_instr_multi_0x08bd0030__le,
+	arm_instr_multi_0x08bd0030,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd0010__eq,
+	arm_instr_multi_0x08bd0010__ne,
+	arm_instr_multi_0x08bd0010__cs,
+	arm_instr_multi_0x08bd0010__cc,
+	arm_instr_multi_0x08bd0010__mi,
+	arm_instr_multi_0x08bd0010__pl,
+	arm_instr_multi_0x08bd0010__vs,
+	arm_instr_multi_0x08bd0010__vc,
+	arm_instr_multi_0x08bd0010__hi,
+	arm_instr_multi_0x08bd0010__ls,
+	arm_instr_multi_0x08bd0010__ge,
+	arm_instr_multi_0x08bd0010__lt,
+	arm_instr_multi_0x08bd0010__gt,
+	arm_instr_multi_0x08bd0010__le,
+	arm_instr_multi_0x08bd0010,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd4010__eq,
+	arm_instr_multi_0x08bd4010__ne,
+	arm_instr_multi_0x08bd4010__cs,
+	arm_instr_multi_0x08bd4010__cc,
+	arm_instr_multi_0x08bd4010__mi,
+	arm_instr_multi_0x08bd4010__pl,
+	arm_instr_multi_0x08bd4010__vs,
+	arm_instr_multi_0x08bd4010__vc,
+	arm_instr_multi_0x08bd4010__hi,
+	arm_instr_multi_0x08bd4010__ls,
+	arm_instr_multi_0x08bd4010__ge,
+	arm_instr_multi_0x08bd4010__lt,
+	arm_instr_multi_0x08bd4010__gt,
+	arm_instr_multi_0x08bd4010__le,
+	arm_instr_multi_0x08bd4010,
+	arm_instr_nop,
+	arm_instr_multi_0x08950030__eq,
+	arm_instr_multi_0x08950030__ne,
+	arm_instr_multi_0x08950030__cs,
+	arm_instr_multi_0x08950030__cc,
+	arm_instr_multi_0x08950030__mi,
+	arm_instr_multi_0x08950030__pl,
+	arm_instr_multi_0x08950030__vs,
+	arm_instr_multi_0x08950030__vc,
+	arm_instr_multi_0x08950030__hi,
+	arm_instr_multi_0x08950030__ls,
+	arm_instr_multi_0x08950030__ge,
+	arm_instr_multi_0x08950030__lt,
+	arm_instr_multi_0x08950030__gt,
+	arm_instr_multi_0x08950030__le,
+	arm_instr_multi_0x08950030,
+	arm_instr_nop,
+	arm_instr_multi_0x08970030__eq,
+	arm_instr_multi_0x08970030__ne,
+	arm_instr_multi_0x08970030__cs,
+	arm_instr_multi_0x08970030__cc,
+	arm_instr_multi_0x08970030__mi,
+	arm_instr_multi_0x08970030__pl,
+	arm_instr_multi_0x08970030__vs,
+	arm_instr_multi_0x08970030__vc,
+	arm_instr_multi_0x08970030__hi,
+	arm_instr_multi_0x08970030__ls,
+	arm_instr_multi_0x08970030__ge,
+	arm_instr_multi_0x08970030__lt,
+	arm_instr_multi_0x08970030__gt,
+	arm_instr_multi_0x08970030__le,
+	arm_instr_multi_0x08970030,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_243[16])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08bd4c1f__eq,
+	arm_instr_multi_0x08bd4c1f__ne,
+	arm_instr_multi_0x08bd4c1f__cs,
+	arm_instr_multi_0x08bd4c1f__cc,
+	arm_instr_multi_0x08bd4c1f__mi,
+	arm_instr_multi_0x08bd4c1f__pl,
+	arm_instr_multi_0x08bd4c1f__vs,
+	arm_instr_multi_0x08bd4c1f__vc,
+	arm_instr_multi_0x08bd4c1f__hi,
+	arm_instr_multi_0x08bd4c1f__ls,
+	arm_instr_multi_0x08bd4c1f__ge,
+	arm_instr_multi_0x08bd4c1f__lt,
+	arm_instr_multi_0x08bd4c1f__gt,
+	arm_instr_multi_0x08bd4c1f__le,
+	arm_instr_multi_0x08bd4c1f,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_244[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08971040__eq,
+	arm_instr_multi_0x08971040__ne,
+	arm_instr_multi_0x08971040__cs,
+	arm_instr_multi_0x08971040__cc,
+	arm_instr_multi_0x08971040__mi,
+	arm_instr_multi_0x08971040__pl,
+	arm_instr_multi_0x08971040__vs,
+	arm_instr_multi_0x08971040__vc,
+	arm_instr_multi_0x08971040__hi,
+	arm_instr_multi_0x08971040__ls,
+	arm_instr_multi_0x08971040__ge,
+	arm_instr_multi_0x08971040__lt,
+	arm_instr_multi_0x08971040__gt,
+	arm_instr_multi_0x08971040__le,
+	arm_instr_multi_0x08971040,
+	arm_instr_nop,
+	arm_instr_multi_0x08950060__eq,
+	arm_instr_multi_0x08950060__ne,
+	arm_instr_multi_0x08950060__cs,
+	arm_instr_multi_0x08950060__cc,
+	arm_instr_multi_0x08950060__mi,
+	arm_instr_multi_0x08950060__pl,
+	arm_instr_multi_0x08950060__vs,
+	arm_instr_multi_0x08950060__vc,
+	arm_instr_multi_0x08950060__hi,
+	arm_instr_multi_0x08950060__ls,
+	arm_instr_multi_0x08950060__ge,
+	arm_instr_multi_0x08950060__lt,
+	arm_instr_multi_0x08950060__gt,
+	arm_instr_multi_0x08950060__le,
+	arm_instr_multi_0x08950060,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_246[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08bd8070__eq,
+	arm_instr_multi_0x08bd8070__ne,
+	arm_instr_multi_0x08bd8070__cs,
+	arm_instr_multi_0x08bd8070__cc,
+	arm_instr_multi_0x08bd8070__mi,
+	arm_instr_multi_0x08bd8070__pl,
+	arm_instr_multi_0x08bd8070__vs,
+	arm_instr_multi_0x08bd8070__vc,
+	arm_instr_multi_0x08bd8070__hi,
+	arm_instr_multi_0x08bd8070__ls,
+	arm_instr_multi_0x08bd8070__ge,
+	arm_instr_multi_0x08bd8070__lt,
+	arm_instr_multi_0x08bd8070__gt,
+	arm_instr_multi_0x08bd8070__le,
+	arm_instr_multi_0x08bd8070,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd40f0__eq,
+	arm_instr_multi_0x08bd40f0__ne,
+	arm_instr_multi_0x08bd40f0__cs,
+	arm_instr_multi_0x08bd40f0__cc,
+	arm_instr_multi_0x08bd40f0__mi,
+	arm_instr_multi_0x08bd40f0__pl,
+	arm_instr_multi_0x08bd40f0__vs,
+	arm_instr_multi_0x08bd40f0__vc,
+	arm_instr_multi_0x08bd40f0__hi,
+	arm_instr_multi_0x08bd40f0__ls,
+	arm_instr_multi_0x08bd40f0__ge,
+	arm_instr_multi_0x08bd40f0__lt,
+	arm_instr_multi_0x08bd40f0__gt,
+	arm_instr_multi_0x08bd40f0__le,
+	arm_instr_multi_0x08bd40f0,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd80f0__eq,
+	arm_instr_multi_0x08bd80f0__ne,
+	arm_instr_multi_0x08bd80f0__cs,
+	arm_instr_multi_0x08bd80f0__cc,
+	arm_instr_multi_0x08bd80f0__mi,
+	arm_instr_multi_0x08bd80f0__pl,
+	arm_instr_multi_0x08bd80f0__vs,
+	arm_instr_multi_0x08bd80f0__vc,
+	arm_instr_multi_0x08bd80f0__hi,
+	arm_instr_multi_0x08bd80f0__ls,
+	arm_instr_multi_0x08bd80f0__ge,
+	arm_instr_multi_0x08bd80f0__lt,
+	arm_instr_multi_0x08bd80f0__gt,
+	arm_instr_multi_0x08bd80f0__le,
+	arm_instr_multi_0x08bd80f0,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd0070__eq,
+	arm_instr_multi_0x08bd0070__ne,
+	arm_instr_multi_0x08bd0070__cs,
+	arm_instr_multi_0x08bd0070__cc,
+	arm_instr_multi_0x08bd0070__mi,
+	arm_instr_multi_0x08bd0070__pl,
+	arm_instr_multi_0x08bd0070__vs,
+	arm_instr_multi_0x08bd0070__vc,
+	arm_instr_multi_0x08bd0070__hi,
+	arm_instr_multi_0x08bd0070__ls,
+	arm_instr_multi_0x08bd0070__ge,
+	arm_instr_multi_0x08bd0070__lt,
+	arm_instr_multi_0x08bd0070__gt,
+	arm_instr_multi_0x08bd0070__le,
+	arm_instr_multi_0x08bd0070,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd00f0__eq,
+	arm_instr_multi_0x08bd00f0__ne,
+	arm_instr_multi_0x08bd00f0__cs,
+	arm_instr_multi_0x08bd00f0__cc,
+	arm_instr_multi_0x08bd00f0__mi,
+	arm_instr_multi_0x08bd00f0__pl,
+	arm_instr_multi_0x08bd00f0__vs,
+	arm_instr_multi_0x08bd00f0__vc,
+	arm_instr_multi_0x08bd00f0__hi,
+	arm_instr_multi_0x08bd00f0__ls,
+	arm_instr_multi_0x08bd00f0__ge,
+	arm_instr_multi_0x08bd00f0__lt,
+	arm_instr_multi_0x08bd00f0__gt,
+	arm_instr_multi_0x08bd00f0__le,
+	arm_instr_multi_0x08bd00f0,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_248[32])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08970300__eq,
+	arm_instr_multi_0x08970300__ne,
+	arm_instr_multi_0x08970300__cs,
+	arm_instr_multi_0x08970300__cc,
+	arm_instr_multi_0x08970300__mi,
+	arm_instr_multi_0x08970300__pl,
+	arm_instr_multi_0x08970300__vs,
+	arm_instr_multi_0x08970300__vc,
+	arm_instr_multi_0x08970300__hi,
+	arm_instr_multi_0x08970300__ls,
+	arm_instr_multi_0x08970300__ge,
+	arm_instr_multi_0x08970300__lt,
+	arm_instr_multi_0x08970300__gt,
+	arm_instr_multi_0x08970300__le,
+	arm_instr_multi_0x08970300,
+	arm_instr_nop,
+	arm_instr_multi_0x08970180__eq,
+	arm_instr_multi_0x08970180__ne,
+	arm_instr_multi_0x08970180__cs,
+	arm_instr_multi_0x08970180__cc,
+	arm_instr_multi_0x08970180__mi,
+	arm_instr_multi_0x08970180__pl,
+	arm_instr_multi_0x08970180__vs,
+	arm_instr_multi_0x08970180__vc,
+	arm_instr_multi_0x08970180__hi,
+	arm_instr_multi_0x08970180__ls,
+	arm_instr_multi_0x08970180__ge,
+	arm_instr_multi_0x08970180__lt,
+	arm_instr_multi_0x08970180__gt,
+	arm_instr_multi_0x08970180__le,
+	arm_instr_multi_0x08970180,
+	arm_instr_nop,
+};
+void (*multi_opcode_f_254[80])(struct cpu *, struct arm_instr_call *) = {
+	arm_instr_multi_0x08bd81f0__eq,
+	arm_instr_multi_0x08bd81f0__ne,
+	arm_instr_multi_0x08bd81f0__cs,
+	arm_instr_multi_0x08bd81f0__cc,
+	arm_instr_multi_0x08bd81f0__mi,
+	arm_instr_multi_0x08bd81f0__pl,
+	arm_instr_multi_0x08bd81f0__vs,
+	arm_instr_multi_0x08bd81f0__vc,
+	arm_instr_multi_0x08bd81f0__hi,
+	arm_instr_multi_0x08bd81f0__ls,
+	arm_instr_multi_0x08bd81f0__ge,
+	arm_instr_multi_0x08bd81f0__lt,
+	arm_instr_multi_0x08bd81f0__gt,
+	arm_instr_multi_0x08bd81f0__le,
+	arm_instr_multi_0x08bd81f0,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd0ff0__eq,
+	arm_instr_multi_0x08bd0ff0__ne,
+	arm_instr_multi_0x08bd0ff0__cs,
+	arm_instr_multi_0x08bd0ff0__cc,
+	arm_instr_multi_0x08bd0ff0__mi,
+	arm_instr_multi_0x08bd0ff0__pl,
+	arm_instr_multi_0x08bd0ff0__vs,
+	arm_instr_multi_0x08bd0ff0__vc,
+	arm_instr_multi_0x08bd0ff0__hi,
+	arm_instr_multi_0x08bd0ff0__ls,
+	arm_instr_multi_0x08bd0ff0__ge,
+	arm_instr_multi_0x08bd0ff0__lt,
+	arm_instr_multi_0x08bd0ff0__gt,
+	arm_instr_multi_0x08bd0ff0__le,
+	arm_instr_multi_0x08bd0ff0,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd87f0__eq,
+	arm_instr_multi_0x08bd87f0__ne,
+	arm_instr_multi_0x08bd87f0__cs,
+	arm_instr_multi_0x08bd87f0__cc,
+	arm_instr_multi_0x08bd87f0__mi,
+	arm_instr_multi_0x08bd87f0__pl,
+	arm_instr_multi_0x08bd87f0__vs,
+	arm_instr_multi_0x08bd87f0__vc,
+	arm_instr_multi_0x08bd87f0__hi,
+	arm_instr_multi_0x08bd87f0__ls,
+	arm_instr_multi_0x08bd87f0__ge,
+	arm_instr_multi_0x08bd87f0__lt,
+	arm_instr_multi_0x08bd87f0__gt,
+	arm_instr_multi_0x08bd87f0__le,
+	arm_instr_multi_0x08bd87f0,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd85f0__eq,
+	arm_instr_multi_0x08bd85f0__ne,
+	arm_instr_multi_0x08bd85f0__cs,
+	arm_instr_multi_0x08bd85f0__cc,
+	arm_instr_multi_0x08bd85f0__mi,
+	arm_instr_multi_0x08bd85f0__pl,
+	arm_instr_multi_0x08bd85f0__vs,
+	arm_instr_multi_0x08bd85f0__vc,
+	arm_instr_multi_0x08bd85f0__hi,
+	arm_instr_multi_0x08bd85f0__ls,
+	arm_instr_multi_0x08bd85f0__ge,
+	arm_instr_multi_0x08bd85f0__lt,
+	arm_instr_multi_0x08bd85f0__gt,
+	arm_instr_multi_0x08bd85f0__le,
+	arm_instr_multi_0x08bd85f0,
+	arm_instr_nop,
+	arm_instr_multi_0x08bd41f0__eq,
+	arm_instr_multi_0x08bd41f0__ne,
+	arm_instr_multi_0x08bd41f0__cs,
+	arm_instr_multi_0x08bd41f0__cc,
+	arm_instr_multi_0x08bd41f0__mi,
+	arm_instr_multi_0x08bd41f0__pl,
+	arm_instr_multi_0x08bd41f0__vs,
+	arm_instr_multi_0x08bd41f0__vc,
+	arm_instr_multi_0x08bd41f0__hi,
+	arm_instr_multi_0x08bd41f0__ls,
+	arm_instr_multi_0x08bd41f0__ge,
+	arm_instr_multi_0x08bd41f0__lt,
+	arm_instr_multi_0x08bd41f0__gt,
+	arm_instr_multi_0x08bd41f0__le,
+	arm_instr_multi_0x08bd41f0,
+	arm_instr_nop,
+};
+
+uint32_t *multi_opcode[256] = {
+ multi_opcode_0,
+ multi_opcode_1, multi_opcode_2, multi_opcode_3, multi_opcode_4,
+ multi_opcode_5, multi_opcode_6, multi_opcode_7, multi_opcode_8,
+ multi_opcode_9, multi_opcode_10, multi_opcode_11, multi_opcode_12,
+ multi_opcode_13, multi_opcode_14, multi_opcode_15, multi_opcode_16,
+ multi_opcode_17, multi_opcode_18, multi_opcode_19, multi_opcode_20,
+ multi_opcode_21, multi_opcode_22, multi_opcode_23, multi_opcode_24,
+ multi_opcode_25, multi_opcode_26, multi_opcode_27, multi_opcode_28,
+ multi_opcode_29, multi_opcode_30, multi_opcode_31, multi_opcode_32,
+ multi_opcode_33, multi_opcode_34, multi_opcode_35, multi_opcode_36,
+ multi_opcode_37, multi_opcode_38, multi_opcode_39, multi_opcode_40,
+ multi_opcode_41, multi_opcode_42, multi_opcode_43, multi_opcode_44,
+ multi_opcode_45, multi_opcode_46, multi_opcode_47, multi_opcode_48,
+ multi_opcode_49, multi_opcode_50, multi_opcode_51, multi_opcode_52,
+ multi_opcode_53, multi_opcode_54, multi_opcode_55, multi_opcode_56,
+ multi_opcode_57, multi_opcode_58, multi_opcode_59, multi_opcode_60,
+ multi_opcode_61, multi_opcode_62, multi_opcode_63, multi_opcode_64,
+ multi_opcode_65, multi_opcode_66, multi_opcode_67, multi_opcode_68,
+ multi_opcode_69, multi_opcode_70, multi_opcode_71, multi_opcode_72,
+ multi_opcode_73, multi_opcode_74, multi_opcode_75, multi_opcode_76,
+ multi_opcode_77, multi_opcode_78, multi_opcode_79, multi_opcode_80,
+ multi_opcode_81, multi_opcode_82, multi_opcode_83, multi_opcode_84,
+ multi_opcode_85, multi_opcode_86, multi_opcode_87, multi_opcode_88,
+ multi_opcode_89, multi_opcode_90, multi_opcode_91, multi_opcode_92,
+ multi_opcode_93, multi_opcode_94, multi_opcode_95, multi_opcode_96,
+ multi_opcode_97, multi_opcode_98, multi_opcode_99, multi_opcode_100,
+ multi_opcode_101, multi_opcode_102, multi_opcode_103, multi_opcode_104,
+ multi_opcode_105, multi_opcode_106, multi_opcode_107, multi_opcode_108,
+ multi_opcode_109, multi_opcode_110, multi_opcode_111, multi_opcode_112,
+ multi_opcode_113, multi_opcode_114, multi_opcode_115, multi_opcode_116,
+ multi_opcode_117, multi_opcode_118, multi_opcode_119, multi_opcode_120,
+ multi_opcode_121, multi_opcode_122, multi_opcode_123, multi_opcode_124,
+ multi_opcode_125, multi_opcode_126, multi_opcode_127, multi_opcode_128,
+ multi_opcode_129, multi_opcode_130, multi_opcode_131, multi_opcode_132,
+ multi_opcode_133, multi_opcode_134, multi_opcode_135, multi_opcode_136,
+ multi_opcode_137, multi_opcode_138, multi_opcode_139, multi_opcode_140,
+ multi_opcode_141, multi_opcode_142, multi_opcode_143, multi_opcode_144,
+ multi_opcode_145, multi_opcode_146, multi_opcode_147, multi_opcode_148,
+ multi_opcode_149, multi_opcode_150, multi_opcode_151, multi_opcode_152,
+ multi_opcode_153, multi_opcode_154, multi_opcode_155, multi_opcode_156,
+ multi_opcode_157, multi_opcode_158, multi_opcode_159, multi_opcode_160,
+ multi_opcode_161, multi_opcode_162, multi_opcode_163, multi_opcode_164,
+ multi_opcode_165, multi_opcode_166, multi_opcode_167, multi_opcode_168,
+ multi_opcode_169, multi_opcode_170, multi_opcode_171, multi_opcode_172,
+ multi_opcode_173, multi_opcode_174, multi_opcode_175, multi_opcode_176,
+ multi_opcode_177, multi_opcode_178, multi_opcode_179, multi_opcode_180,
+ multi_opcode_181, multi_opcode_182, multi_opcode_183, multi_opcode_184,
+ multi_opcode_185, multi_opcode_186, multi_opcode_187, multi_opcode_188,
+ multi_opcode_189, multi_opcode_190, multi_opcode_191, multi_opcode_192,
+ multi_opcode_193, multi_opcode_194, multi_opcode_195, multi_opcode_196,
+ multi_opcode_197, multi_opcode_198, multi_opcode_199, multi_opcode_200,
+ multi_opcode_201, multi_opcode_202, multi_opcode_203, multi_opcode_204,
+ multi_opcode_205, multi_opcode_206, multi_opcode_207, multi_opcode_208,
+ multi_opcode_209, multi_opcode_210, multi_opcode_211, multi_opcode_212,
+ multi_opcode_213, multi_opcode_214, multi_opcode_215, multi_opcode_216,
+ multi_opcode_217, multi_opcode_218, multi_opcode_219, multi_opcode_220,
+ multi_opcode_221, multi_opcode_222, multi_opcode_223, multi_opcode_224,
+ multi_opcode_225, multi_opcode_226, multi_opcode_227, multi_opcode_228,
+ multi_opcode_229, multi_opcode_230, multi_opcode_231, multi_opcode_232,
+ multi_opcode_233, multi_opcode_234, multi_opcode_235, multi_opcode_236,
+ multi_opcode_237, multi_opcode_238, multi_opcode_239, multi_opcode_240,
+ multi_opcode_241, multi_opcode_242, multi_opcode_243, multi_opcode_244,
+ multi_opcode_245, multi_opcode_246, multi_opcode_247, multi_opcode_248,
+ multi_opcode_249, multi_opcode_250, multi_opcode_251, multi_opcode_252,
+ multi_opcode_253, multi_opcode_254, multi_opcode_255,};
+
+void (**multi_opcode_f[256])(struct cpu *, struct arm_instr_call *) = {
+ multi_opcode_f_0,
+ NULL, multi_opcode_f_2, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_8,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, multi_opcode_f_18, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_32,
+ multi_opcode_f_33, multi_opcode_f_34, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_48,
+ multi_opcode_f_49, multi_opcode_f_50, multi_opcode_f_51, NULL,
+ NULL, multi_opcode_f_54, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, multi_opcode_f_62, NULL, multi_opcode_f_64,
+ multi_opcode_f_65, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_80,
+ multi_opcode_f_81, multi_opcode_f_82, NULL, NULL,
+ NULL, multi_opcode_f_86, NULL, multi_opcode_f_88,
+ NULL, NULL, NULL, NULL,
+ NULL, multi_opcode_f_94, NULL, NULL,
+ multi_opcode_f_97, multi_opcode_f_98, NULL, multi_opcode_f_100,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_112,
+ multi_opcode_f_113, multi_opcode_f_114, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_128,
+ multi_opcode_f_129, multi_opcode_f_130, NULL, multi_opcode_f_132,
+ NULL, NULL, NULL, multi_opcode_f_136,
+ NULL, NULL, NULL, NULL,
+ NULL, multi_opcode_f_142, NULL, multi_opcode_f_144,
+ multi_opcode_f_145, multi_opcode_f_146, NULL, multi_opcode_f_148,
+ NULL, NULL, NULL, multi_opcode_f_152,
+ NULL, NULL, NULL, NULL,
+ NULL, multi_opcode_f_158, NULL, multi_opcode_f_160,
+ multi_opcode_f_161, multi_opcode_f_162, NULL, multi_opcode_f_164,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_176,
+ multi_opcode_f_177, multi_opcode_f_178, multi_opcode_f_179, NULL,
+ NULL, NULL, NULL, multi_opcode_f_184,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, multi_opcode_f_191, multi_opcode_f_192,
+ multi_opcode_f_193, multi_opcode_f_194, NULL, multi_opcode_f_196,
+ NULL, NULL, NULL, multi_opcode_f_200,
+ NULL, NULL, NULL, multi_opcode_f_204,
+ NULL, multi_opcode_f_206, NULL, multi_opcode_f_208,
+ multi_opcode_f_209, multi_opcode_f_210, NULL, multi_opcode_f_212,
+ NULL, NULL, NULL, multi_opcode_f_216,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_224,
+ multi_opcode_f_225, multi_opcode_f_226, NULL, multi_opcode_f_228,
+ NULL, NULL, NULL, multi_opcode_f_232,
+ NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, multi_opcode_f_240,
+ multi_opcode_f_241, multi_opcode_f_242, multi_opcode_f_243, multi_opcode_f_244,
+ NULL, multi_opcode_f_246, NULL, multi_opcode_f_248,
+ NULL, NULL, NULL, NULL,
+ NULL, multi_opcode_f_254, NULL,};
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r.c gxemul-0.7.0/src/cpus/tmp_arm_r.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r.c	2022-10-18 16:37:22.085746800 +0000
@@ -0,0 +1,16398 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+extern uint32_t arm_r_r0_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r0_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r1_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r2_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r3_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r4_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r5_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r6_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r7_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r8_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r9_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r10_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r11_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r12_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r13_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r14_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_r_r15_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c0(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c1(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c2(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c3(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c4(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c5(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c6(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c7(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c8(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c9(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c10(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c11(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c12(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c13(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c14(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c15(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c16(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c17(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c18(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c19(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c20(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c21(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c22(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c23(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c24(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c25(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c26(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c27(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c28(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c29(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c30(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t0_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t1_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t2_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t3_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t4_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t5_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t6_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r0_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r1_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r2_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r3_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r4_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r5_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r6_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r7_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r8_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r9_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r10_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r11_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r12_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r13_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r14_t7_c31(struct cpu *, struct arm_instr_call *);
+extern uint32_t arm_rs_r15_t7_c31(struct cpu *, struct arm_instr_call *);
+
+uint32_t (*arm_r[8192])(struct cpu *, struct arm_instr_call *) = {
+	arm_r_r0_t0_c0,
+	arm_r_r1_t0_c0,
+	arm_r_r2_t0_c0,
+	arm_r_r3_t0_c0,
+	arm_r_r4_t0_c0,
+	arm_r_r5_t0_c0,
+	arm_r_r6_t0_c0,
+	arm_r_r7_t0_c0,
+	arm_r_r8_t0_c0,
+	arm_r_r9_t0_c0,
+	arm_r_r10_t0_c0,
+	arm_r_r11_t0_c0,
+	arm_r_r12_t0_c0,
+	arm_r_r13_t0_c0,
+	arm_r_r14_t0_c0,
+	arm_r_r15_t0_c0,
+	arm_r_r0_t1_c0,
+	arm_r_r1_t1_c0,
+	arm_r_r2_t1_c0,
+	arm_r_r3_t1_c0,
+	arm_r_r4_t1_c0,
+	arm_r_r5_t1_c0,
+	arm_r_r6_t1_c0,
+	arm_r_r7_t1_c0,
+	arm_r_r8_t1_c0,
+	arm_r_r9_t1_c0,
+	arm_r_r10_t1_c0,
+	arm_r_r11_t1_c0,
+	arm_r_r12_t1_c0,
+	arm_r_r13_t1_c0,
+	arm_r_r14_t1_c0,
+	arm_r_r15_t1_c0,
+	arm_r_r0_t2_c0,
+	arm_r_r1_t2_c0,
+	arm_r_r2_t2_c0,
+	arm_r_r3_t2_c0,
+	arm_r_r4_t2_c0,
+	arm_r_r5_t2_c0,
+	arm_r_r6_t2_c0,
+	arm_r_r7_t2_c0,
+	arm_r_r8_t2_c0,
+	arm_r_r9_t2_c0,
+	arm_r_r10_t2_c0,
+	arm_r_r11_t2_c0,
+	arm_r_r12_t2_c0,
+	arm_r_r13_t2_c0,
+	arm_r_r14_t2_c0,
+	arm_r_r15_t2_c0,
+	arm_r_r0_t3_c0,
+	arm_r_r1_t3_c0,
+	arm_r_r2_t3_c0,
+	arm_r_r3_t3_c0,
+	arm_r_r4_t3_c0,
+	arm_r_r5_t3_c0,
+	arm_r_r6_t3_c0,
+	arm_r_r7_t3_c0,
+	arm_r_r8_t3_c0,
+	arm_r_r9_t3_c0,
+	arm_r_r10_t3_c0,
+	arm_r_r11_t3_c0,
+	arm_r_r12_t3_c0,
+	arm_r_r13_t3_c0,
+	arm_r_r14_t3_c0,
+	arm_r_r15_t3_c0,
+	arm_r_r0_t4_c0,
+	arm_r_r1_t4_c0,
+	arm_r_r2_t4_c0,
+	arm_r_r3_t4_c0,
+	arm_r_r4_t4_c0,
+	arm_r_r5_t4_c0,
+	arm_r_r6_t4_c0,
+	arm_r_r7_t4_c0,
+	arm_r_r8_t4_c0,
+	arm_r_r9_t4_c0,
+	arm_r_r10_t4_c0,
+	arm_r_r11_t4_c0,
+	arm_r_r12_t4_c0,
+	arm_r_r13_t4_c0,
+	arm_r_r14_t4_c0,
+	arm_r_r15_t4_c0,
+	arm_r_r0_t5_c0,
+	arm_r_r1_t5_c0,
+	arm_r_r2_t5_c0,
+	arm_r_r3_t5_c0,
+	arm_r_r4_t5_c0,
+	arm_r_r5_t5_c0,
+	arm_r_r6_t5_c0,
+	arm_r_r7_t5_c0,
+	arm_r_r8_t5_c0,
+	arm_r_r9_t5_c0,
+	arm_r_r10_t5_c0,
+	arm_r_r11_t5_c0,
+	arm_r_r12_t5_c0,
+	arm_r_r13_t5_c0,
+	arm_r_r14_t5_c0,
+	arm_r_r15_t5_c0,
+	arm_r_r0_t6_c0,
+	arm_r_r1_t6_c0,
+	arm_r_r2_t6_c0,
+	arm_r_r3_t6_c0,
+	arm_r_r4_t6_c0,
+	arm_r_r5_t6_c0,
+	arm_r_r6_t6_c0,
+	arm_r_r7_t6_c0,
+	arm_r_r8_t6_c0,
+	arm_r_r9_t6_c0,
+	arm_r_r10_t6_c0,
+	arm_r_r11_t6_c0,
+	arm_r_r12_t6_c0,
+	arm_r_r13_t6_c0,
+	arm_r_r14_t6_c0,
+	arm_r_r15_t6_c0,
+	arm_r_r0_t7_c0,
+	arm_r_r1_t7_c0,
+	arm_r_r2_t7_c0,
+	arm_r_r3_t7_c0,
+	arm_r_r4_t7_c0,
+	arm_r_r5_t7_c0,
+	arm_r_r6_t7_c0,
+	arm_r_r7_t7_c0,
+	arm_r_r8_t7_c0,
+	arm_r_r9_t7_c0,
+	arm_r_r10_t7_c0,
+	arm_r_r11_t7_c0,
+	arm_r_r12_t7_c0,
+	arm_r_r13_t7_c0,
+	arm_r_r14_t7_c0,
+	arm_r_r15_t7_c0,
+	arm_r_r0_t0_c1,
+	arm_r_r1_t0_c1,
+	arm_r_r2_t0_c1,
+	arm_r_r3_t0_c1,
+	arm_r_r4_t0_c1,
+	arm_r_r5_t0_c1,
+	arm_r_r6_t0_c1,
+	arm_r_r7_t0_c1,
+	arm_r_r8_t0_c1,
+	arm_r_r9_t0_c1,
+	arm_r_r10_t0_c1,
+	arm_r_r11_t0_c1,
+	arm_r_r12_t0_c1,
+	arm_r_r13_t0_c1,
+	arm_r_r14_t0_c1,
+	arm_r_r15_t0_c1,
+	arm_r_r0_t1_c1,
+	arm_r_r1_t1_c1,
+	arm_r_r2_t1_c1,
+	arm_r_r3_t1_c1,
+	arm_r_r4_t1_c1,
+	arm_r_r5_t1_c1,
+	arm_r_r6_t1_c1,
+	arm_r_r7_t1_c1,
+	arm_r_r8_t1_c1,
+	arm_r_r9_t1_c1,
+	arm_r_r10_t1_c1,
+	arm_r_r11_t1_c1,
+	arm_r_r12_t1_c1,
+	arm_r_r13_t1_c1,
+	arm_r_r14_t1_c1,
+	arm_r_r15_t1_c1,
+	arm_r_r0_t2_c1,
+	arm_r_r1_t2_c1,
+	arm_r_r2_t2_c1,
+	arm_r_r3_t2_c1,
+	arm_r_r4_t2_c1,
+	arm_r_r5_t2_c1,
+	arm_r_r6_t2_c1,
+	arm_r_r7_t2_c1,
+	arm_r_r8_t2_c1,
+	arm_r_r9_t2_c1,
+	arm_r_r10_t2_c1,
+	arm_r_r11_t2_c1,
+	arm_r_r12_t2_c1,
+	arm_r_r13_t2_c1,
+	arm_r_r14_t2_c1,
+	arm_r_r15_t2_c1,
+	arm_r_r0_t3_c1,
+	arm_r_r1_t3_c1,
+	arm_r_r2_t3_c1,
+	arm_r_r3_t3_c1,
+	arm_r_r4_t3_c1,
+	arm_r_r5_t3_c1,
+	arm_r_r6_t3_c1,
+	arm_r_r7_t3_c1,
+	arm_r_r8_t3_c1,
+	arm_r_r9_t3_c1,
+	arm_r_r10_t3_c1,
+	arm_r_r11_t3_c1,
+	arm_r_r12_t3_c1,
+	arm_r_r13_t3_c1,
+	arm_r_r14_t3_c1,
+	arm_r_r15_t3_c1,
+	arm_r_r0_t4_c1,
+	arm_r_r1_t4_c1,
+	arm_r_r2_t4_c1,
+	arm_r_r3_t4_c1,
+	arm_r_r4_t4_c1,
+	arm_r_r5_t4_c1,
+	arm_r_r6_t4_c1,
+	arm_r_r7_t4_c1,
+	arm_r_r8_t4_c1,
+	arm_r_r9_t4_c1,
+	arm_r_r10_t4_c1,
+	arm_r_r11_t4_c1,
+	arm_r_r12_t4_c1,
+	arm_r_r13_t4_c1,
+	arm_r_r14_t4_c1,
+	arm_r_r15_t4_c1,
+	arm_r_r0_t5_c1,
+	arm_r_r1_t5_c1,
+	arm_r_r2_t5_c1,
+	arm_r_r3_t5_c1,
+	arm_r_r4_t5_c1,
+	arm_r_r5_t5_c1,
+	arm_r_r6_t5_c1,
+	arm_r_r7_t5_c1,
+	arm_r_r8_t5_c1,
+	arm_r_r9_t5_c1,
+	arm_r_r10_t5_c1,
+	arm_r_r11_t5_c1,
+	arm_r_r12_t5_c1,
+	arm_r_r13_t5_c1,
+	arm_r_r14_t5_c1,
+	arm_r_r15_t5_c1,
+	arm_r_r0_t6_c1,
+	arm_r_r1_t6_c1,
+	arm_r_r2_t6_c1,
+	arm_r_r3_t6_c1,
+	arm_r_r4_t6_c1,
+	arm_r_r5_t6_c1,
+	arm_r_r6_t6_c1,
+	arm_r_r7_t6_c1,
+	arm_r_r8_t6_c1,
+	arm_r_r9_t6_c1,
+	arm_r_r10_t6_c1,
+	arm_r_r11_t6_c1,
+	arm_r_r12_t6_c1,
+	arm_r_r13_t6_c1,
+	arm_r_r14_t6_c1,
+	arm_r_r15_t6_c1,
+	arm_r_r0_t7_c1,
+	arm_r_r1_t7_c1,
+	arm_r_r2_t7_c1,
+	arm_r_r3_t7_c1,
+	arm_r_r4_t7_c1,
+	arm_r_r5_t7_c1,
+	arm_r_r6_t7_c1,
+	arm_r_r7_t7_c1,
+	arm_r_r8_t7_c1,
+	arm_r_r9_t7_c1,
+	arm_r_r10_t7_c1,
+	arm_r_r11_t7_c1,
+	arm_r_r12_t7_c1,
+	arm_r_r13_t7_c1,
+	arm_r_r14_t7_c1,
+	arm_r_r15_t7_c1,
+	arm_r_r0_t0_c2,
+	arm_r_r1_t0_c2,
+	arm_r_r2_t0_c2,
+	arm_r_r3_t0_c2,
+	arm_r_r4_t0_c2,
+	arm_r_r5_t0_c2,
+	arm_r_r6_t0_c2,
+	arm_r_r7_t0_c2,
+	arm_r_r8_t0_c2,
+	arm_r_r9_t0_c2,
+	arm_r_r10_t0_c2,
+	arm_r_r11_t0_c2,
+	arm_r_r12_t0_c2,
+	arm_r_r13_t0_c2,
+	arm_r_r14_t0_c2,
+	arm_r_r15_t0_c2,
+	arm_r_r0_t1_c2,
+	arm_r_r1_t1_c2,
+	arm_r_r2_t1_c2,
+	arm_r_r3_t1_c2,
+	arm_r_r4_t1_c2,
+	arm_r_r5_t1_c2,
+	arm_r_r6_t1_c2,
+	arm_r_r7_t1_c2,
+	arm_r_r8_t1_c2,
+	arm_r_r9_t1_c2,
+	arm_r_r10_t1_c2,
+	arm_r_r11_t1_c2,
+	arm_r_r12_t1_c2,
+	arm_r_r13_t1_c2,
+	arm_r_r14_t1_c2,
+	arm_r_r15_t1_c2,
+	arm_r_r0_t2_c2,
+	arm_r_r1_t2_c2,
+	arm_r_r2_t2_c2,
+	arm_r_r3_t2_c2,
+	arm_r_r4_t2_c2,
+	arm_r_r5_t2_c2,
+	arm_r_r6_t2_c2,
+	arm_r_r7_t2_c2,
+	arm_r_r8_t2_c2,
+	arm_r_r9_t2_c2,
+	arm_r_r10_t2_c2,
+	arm_r_r11_t2_c2,
+	arm_r_r12_t2_c2,
+	arm_r_r13_t2_c2,
+	arm_r_r14_t2_c2,
+	arm_r_r15_t2_c2,
+	arm_r_r0_t3_c2,
+	arm_r_r1_t3_c2,
+	arm_r_r2_t3_c2,
+	arm_r_r3_t3_c2,
+	arm_r_r4_t3_c2,
+	arm_r_r5_t3_c2,
+	arm_r_r6_t3_c2,
+	arm_r_r7_t3_c2,
+	arm_r_r8_t3_c2,
+	arm_r_r9_t3_c2,
+	arm_r_r10_t3_c2,
+	arm_r_r11_t3_c2,
+	arm_r_r12_t3_c2,
+	arm_r_r13_t3_c2,
+	arm_r_r14_t3_c2,
+	arm_r_r15_t3_c2,
+	arm_r_r0_t4_c2,
+	arm_r_r1_t4_c2,
+	arm_r_r2_t4_c2,
+	arm_r_r3_t4_c2,
+	arm_r_r4_t4_c2,
+	arm_r_r5_t4_c2,
+	arm_r_r6_t4_c2,
+	arm_r_r7_t4_c2,
+	arm_r_r8_t4_c2,
+	arm_r_r9_t4_c2,
+	arm_r_r10_t4_c2,
+	arm_r_r11_t4_c2,
+	arm_r_r12_t4_c2,
+	arm_r_r13_t4_c2,
+	arm_r_r14_t4_c2,
+	arm_r_r15_t4_c2,
+	arm_r_r0_t5_c2,
+	arm_r_r1_t5_c2,
+	arm_r_r2_t5_c2,
+	arm_r_r3_t5_c2,
+	arm_r_r4_t5_c2,
+	arm_r_r5_t5_c2,
+	arm_r_r6_t5_c2,
+	arm_r_r7_t5_c2,
+	arm_r_r8_t5_c2,
+	arm_r_r9_t5_c2,
+	arm_r_r10_t5_c2,
+	arm_r_r11_t5_c2,
+	arm_r_r12_t5_c2,
+	arm_r_r13_t5_c2,
+	arm_r_r14_t5_c2,
+	arm_r_r15_t5_c2,
+	arm_r_r0_t6_c2,
+	arm_r_r1_t6_c2,
+	arm_r_r2_t6_c2,
+	arm_r_r3_t6_c2,
+	arm_r_r4_t6_c2,
+	arm_r_r5_t6_c2,
+	arm_r_r6_t6_c2,
+	arm_r_r7_t6_c2,
+	arm_r_r8_t6_c2,
+	arm_r_r9_t6_c2,
+	arm_r_r10_t6_c2,
+	arm_r_r11_t6_c2,
+	arm_r_r12_t6_c2,
+	arm_r_r13_t6_c2,
+	arm_r_r14_t6_c2,
+	arm_r_r15_t6_c2,
+	arm_r_r0_t7_c2,
+	arm_r_r1_t7_c2,
+	arm_r_r2_t7_c2,
+	arm_r_r3_t7_c2,
+	arm_r_r4_t7_c2,
+	arm_r_r5_t7_c2,
+	arm_r_r6_t7_c2,
+	arm_r_r7_t7_c2,
+	arm_r_r8_t7_c2,
+	arm_r_r9_t7_c2,
+	arm_r_r10_t7_c2,
+	arm_r_r11_t7_c2,
+	arm_r_r12_t7_c2,
+	arm_r_r13_t7_c2,
+	arm_r_r14_t7_c2,
+	arm_r_r15_t7_c2,
+	arm_r_r0_t0_c3,
+	arm_r_r1_t0_c3,
+	arm_r_r2_t0_c3,
+	arm_r_r3_t0_c3,
+	arm_r_r4_t0_c3,
+	arm_r_r5_t0_c3,
+	arm_r_r6_t0_c3,
+	arm_r_r7_t0_c3,
+	arm_r_r8_t0_c3,
+	arm_r_r9_t0_c3,
+	arm_r_r10_t0_c3,
+	arm_r_r11_t0_c3,
+	arm_r_r12_t0_c3,
+	arm_r_r13_t0_c3,
+	arm_r_r14_t0_c3,
+	arm_r_r15_t0_c3,
+	arm_r_r0_t1_c3,
+	arm_r_r1_t1_c3,
+	arm_r_r2_t1_c3,
+	arm_r_r3_t1_c3,
+	arm_r_r4_t1_c3,
+	arm_r_r5_t1_c3,
+	arm_r_r6_t1_c3,
+	arm_r_r7_t1_c3,
+	arm_r_r8_t1_c3,
+	arm_r_r9_t1_c3,
+	arm_r_r10_t1_c3,
+	arm_r_r11_t1_c3,
+	arm_r_r12_t1_c3,
+	arm_r_r13_t1_c3,
+	arm_r_r14_t1_c3,
+	arm_r_r15_t1_c3,
+	arm_r_r0_t2_c3,
+	arm_r_r1_t2_c3,
+	arm_r_r2_t2_c3,
+	arm_r_r3_t2_c3,
+	arm_r_r4_t2_c3,
+	arm_r_r5_t2_c3,
+	arm_r_r6_t2_c3,
+	arm_r_r7_t2_c3,
+	arm_r_r8_t2_c3,
+	arm_r_r9_t2_c3,
+	arm_r_r10_t2_c3,
+	arm_r_r11_t2_c3,
+	arm_r_r12_t2_c3,
+	arm_r_r13_t2_c3,
+	arm_r_r14_t2_c3,
+	arm_r_r15_t2_c3,
+	arm_r_r0_t3_c3,
+	arm_r_r1_t3_c3,
+	arm_r_r2_t3_c3,
+	arm_r_r3_t3_c3,
+	arm_r_r4_t3_c3,
+	arm_r_r5_t3_c3,
+	arm_r_r6_t3_c3,
+	arm_r_r7_t3_c3,
+	arm_r_r8_t3_c3,
+	arm_r_r9_t3_c3,
+	arm_r_r10_t3_c3,
+	arm_r_r11_t3_c3,
+	arm_r_r12_t3_c3,
+	arm_r_r13_t3_c3,
+	arm_r_r14_t3_c3,
+	arm_r_r15_t3_c3,
+	arm_r_r0_t4_c3,
+	arm_r_r1_t4_c3,
+	arm_r_r2_t4_c3,
+	arm_r_r3_t4_c3,
+	arm_r_r4_t4_c3,
+	arm_r_r5_t4_c3,
+	arm_r_r6_t4_c3,
+	arm_r_r7_t4_c3,
+	arm_r_r8_t4_c3,
+	arm_r_r9_t4_c3,
+	arm_r_r10_t4_c3,
+	arm_r_r11_t4_c3,
+	arm_r_r12_t4_c3,
+	arm_r_r13_t4_c3,
+	arm_r_r14_t4_c3,
+	arm_r_r15_t4_c3,
+	arm_r_r0_t5_c3,
+	arm_r_r1_t5_c3,
+	arm_r_r2_t5_c3,
+	arm_r_r3_t5_c3,
+	arm_r_r4_t5_c3,
+	arm_r_r5_t5_c3,
+	arm_r_r6_t5_c3,
+	arm_r_r7_t5_c3,
+	arm_r_r8_t5_c3,
+	arm_r_r9_t5_c3,
+	arm_r_r10_t5_c3,
+	arm_r_r11_t5_c3,
+	arm_r_r12_t5_c3,
+	arm_r_r13_t5_c3,
+	arm_r_r14_t5_c3,
+	arm_r_r15_t5_c3,
+	arm_r_r0_t6_c3,
+	arm_r_r1_t6_c3,
+	arm_r_r2_t6_c3,
+	arm_r_r3_t6_c3,
+	arm_r_r4_t6_c3,
+	arm_r_r5_t6_c3,
+	arm_r_r6_t6_c3,
+	arm_r_r7_t6_c3,
+	arm_r_r8_t6_c3,
+	arm_r_r9_t6_c3,
+	arm_r_r10_t6_c3,
+	arm_r_r11_t6_c3,
+	arm_r_r12_t6_c3,
+	arm_r_r13_t6_c3,
+	arm_r_r14_t6_c3,
+	arm_r_r15_t6_c3,
+	arm_r_r0_t7_c3,
+	arm_r_r1_t7_c3,
+	arm_r_r2_t7_c3,
+	arm_r_r3_t7_c3,
+	arm_r_r4_t7_c3,
+	arm_r_r5_t7_c3,
+	arm_r_r6_t7_c3,
+	arm_r_r7_t7_c3,
+	arm_r_r8_t7_c3,
+	arm_r_r9_t7_c3,
+	arm_r_r10_t7_c3,
+	arm_r_r11_t7_c3,
+	arm_r_r12_t7_c3,
+	arm_r_r13_t7_c3,
+	arm_r_r14_t7_c3,
+	arm_r_r15_t7_c3,
+	arm_r_r0_t0_c4,
+	arm_r_r1_t0_c4,
+	arm_r_r2_t0_c4,
+	arm_r_r3_t0_c4,
+	arm_r_r4_t0_c4,
+	arm_r_r5_t0_c4,
+	arm_r_r6_t0_c4,
+	arm_r_r7_t0_c4,
+	arm_r_r8_t0_c4,
+	arm_r_r9_t0_c4,
+	arm_r_r10_t0_c4,
+	arm_r_r11_t0_c4,
+	arm_r_r12_t0_c4,
+	arm_r_r13_t0_c4,
+	arm_r_r14_t0_c4,
+	arm_r_r15_t0_c4,
+	arm_r_r0_t1_c4,
+	arm_r_r1_t1_c4,
+	arm_r_r2_t1_c4,
+	arm_r_r3_t1_c4,
+	arm_r_r4_t1_c4,
+	arm_r_r5_t1_c4,
+	arm_r_r6_t1_c4,
+	arm_r_r7_t1_c4,
+	arm_r_r8_t1_c4,
+	arm_r_r9_t1_c4,
+	arm_r_r10_t1_c4,
+	arm_r_r11_t1_c4,
+	arm_r_r12_t1_c4,
+	arm_r_r13_t1_c4,
+	arm_r_r14_t1_c4,
+	arm_r_r15_t1_c4,
+	arm_r_r0_t2_c4,
+	arm_r_r1_t2_c4,
+	arm_r_r2_t2_c4,
+	arm_r_r3_t2_c4,
+	arm_r_r4_t2_c4,
+	arm_r_r5_t2_c4,
+	arm_r_r6_t2_c4,
+	arm_r_r7_t2_c4,
+	arm_r_r8_t2_c4,
+	arm_r_r9_t2_c4,
+	arm_r_r10_t2_c4,
+	arm_r_r11_t2_c4,
+	arm_r_r12_t2_c4,
+	arm_r_r13_t2_c4,
+	arm_r_r14_t2_c4,
+	arm_r_r15_t2_c4,
+	arm_r_r0_t3_c4,
+	arm_r_r1_t3_c4,
+	arm_r_r2_t3_c4,
+	arm_r_r3_t3_c4,
+	arm_r_r4_t3_c4,
+	arm_r_r5_t3_c4,
+	arm_r_r6_t3_c4,
+	arm_r_r7_t3_c4,
+	arm_r_r8_t3_c4,
+	arm_r_r9_t3_c4,
+	arm_r_r10_t3_c4,
+	arm_r_r11_t3_c4,
+	arm_r_r12_t3_c4,
+	arm_r_r13_t3_c4,
+	arm_r_r14_t3_c4,
+	arm_r_r15_t3_c4,
+	arm_r_r0_t4_c4,
+	arm_r_r1_t4_c4,
+	arm_r_r2_t4_c4,
+	arm_r_r3_t4_c4,
+	arm_r_r4_t4_c4,
+	arm_r_r5_t4_c4,
+	arm_r_r6_t4_c4,
+	arm_r_r7_t4_c4,
+	arm_r_r8_t4_c4,
+	arm_r_r9_t4_c4,
+	arm_r_r10_t4_c4,
+	arm_r_r11_t4_c4,
+	arm_r_r12_t4_c4,
+	arm_r_r13_t4_c4,
+	arm_r_r14_t4_c4,
+	arm_r_r15_t4_c4,
+	arm_r_r0_t5_c4,
+	arm_r_r1_t5_c4,
+	arm_r_r2_t5_c4,
+	arm_r_r3_t5_c4,
+	arm_r_r4_t5_c4,
+	arm_r_r5_t5_c4,
+	arm_r_r6_t5_c4,
+	arm_r_r7_t5_c4,
+	arm_r_r8_t5_c4,
+	arm_r_r9_t5_c4,
+	arm_r_r10_t5_c4,
+	arm_r_r11_t5_c4,
+	arm_r_r12_t5_c4,
+	arm_r_r13_t5_c4,
+	arm_r_r14_t5_c4,
+	arm_r_r15_t5_c4,
+	arm_r_r0_t6_c4,
+	arm_r_r1_t6_c4,
+	arm_r_r2_t6_c4,
+	arm_r_r3_t6_c4,
+	arm_r_r4_t6_c4,
+	arm_r_r5_t6_c4,
+	arm_r_r6_t6_c4,
+	arm_r_r7_t6_c4,
+	arm_r_r8_t6_c4,
+	arm_r_r9_t6_c4,
+	arm_r_r10_t6_c4,
+	arm_r_r11_t6_c4,
+	arm_r_r12_t6_c4,
+	arm_r_r13_t6_c4,
+	arm_r_r14_t6_c4,
+	arm_r_r15_t6_c4,
+	arm_r_r0_t7_c4,
+	arm_r_r1_t7_c4,
+	arm_r_r2_t7_c4,
+	arm_r_r3_t7_c4,
+	arm_r_r4_t7_c4,
+	arm_r_r5_t7_c4,
+	arm_r_r6_t7_c4,
+	arm_r_r7_t7_c4,
+	arm_r_r8_t7_c4,
+	arm_r_r9_t7_c4,
+	arm_r_r10_t7_c4,
+	arm_r_r11_t7_c4,
+	arm_r_r12_t7_c4,
+	arm_r_r13_t7_c4,
+	arm_r_r14_t7_c4,
+	arm_r_r15_t7_c4,
+	arm_r_r0_t0_c5,
+	arm_r_r1_t0_c5,
+	arm_r_r2_t0_c5,
+	arm_r_r3_t0_c5,
+	arm_r_r4_t0_c5,
+	arm_r_r5_t0_c5,
+	arm_r_r6_t0_c5,
+	arm_r_r7_t0_c5,
+	arm_r_r8_t0_c5,
+	arm_r_r9_t0_c5,
+	arm_r_r10_t0_c5,
+	arm_r_r11_t0_c5,
+	arm_r_r12_t0_c5,
+	arm_r_r13_t0_c5,
+	arm_r_r14_t0_c5,
+	arm_r_r15_t0_c5,
+	arm_r_r0_t1_c5,
+	arm_r_r1_t1_c5,
+	arm_r_r2_t1_c5,
+	arm_r_r3_t1_c5,
+	arm_r_r4_t1_c5,
+	arm_r_r5_t1_c5,
+	arm_r_r6_t1_c5,
+	arm_r_r7_t1_c5,
+	arm_r_r8_t1_c5,
+	arm_r_r9_t1_c5,
+	arm_r_r10_t1_c5,
+	arm_r_r11_t1_c5,
+	arm_r_r12_t1_c5,
+	arm_r_r13_t1_c5,
+	arm_r_r14_t1_c5,
+	arm_r_r15_t1_c5,
+	arm_r_r0_t2_c5,
+	arm_r_r1_t2_c5,
+	arm_r_r2_t2_c5,
+	arm_r_r3_t2_c5,
+	arm_r_r4_t2_c5,
+	arm_r_r5_t2_c5,
+	arm_r_r6_t2_c5,
+	arm_r_r7_t2_c5,
+	arm_r_r8_t2_c5,
+	arm_r_r9_t2_c5,
+	arm_r_r10_t2_c5,
+	arm_r_r11_t2_c5,
+	arm_r_r12_t2_c5,
+	arm_r_r13_t2_c5,
+	arm_r_r14_t2_c5,
+	arm_r_r15_t2_c5,
+	arm_r_r0_t3_c5,
+	arm_r_r1_t3_c5,
+	arm_r_r2_t3_c5,
+	arm_r_r3_t3_c5,
+	arm_r_r4_t3_c5,
+	arm_r_r5_t3_c5,
+	arm_r_r6_t3_c5,
+	arm_r_r7_t3_c5,
+	arm_r_r8_t3_c5,
+	arm_r_r9_t3_c5,
+	arm_r_r10_t3_c5,
+	arm_r_r11_t3_c5,
+	arm_r_r12_t3_c5,
+	arm_r_r13_t3_c5,
+	arm_r_r14_t3_c5,
+	arm_r_r15_t3_c5,
+	arm_r_r0_t4_c5,
+	arm_r_r1_t4_c5,
+	arm_r_r2_t4_c5,
+	arm_r_r3_t4_c5,
+	arm_r_r4_t4_c5,
+	arm_r_r5_t4_c5,
+	arm_r_r6_t4_c5,
+	arm_r_r7_t4_c5,
+	arm_r_r8_t4_c5,
+	arm_r_r9_t4_c5,
+	arm_r_r10_t4_c5,
+	arm_r_r11_t4_c5,
+	arm_r_r12_t4_c5,
+	arm_r_r13_t4_c5,
+	arm_r_r14_t4_c5,
+	arm_r_r15_t4_c5,
+	arm_r_r0_t5_c5,
+	arm_r_r1_t5_c5,
+	arm_r_r2_t5_c5,
+	arm_r_r3_t5_c5,
+	arm_r_r4_t5_c5,
+	arm_r_r5_t5_c5,
+	arm_r_r6_t5_c5,
+	arm_r_r7_t5_c5,
+	arm_r_r8_t5_c5,
+	arm_r_r9_t5_c5,
+	arm_r_r10_t5_c5,
+	arm_r_r11_t5_c5,
+	arm_r_r12_t5_c5,
+	arm_r_r13_t5_c5,
+	arm_r_r14_t5_c5,
+	arm_r_r15_t5_c5,
+	arm_r_r0_t6_c5,
+	arm_r_r1_t6_c5,
+	arm_r_r2_t6_c5,
+	arm_r_r3_t6_c5,
+	arm_r_r4_t6_c5,
+	arm_r_r5_t6_c5,
+	arm_r_r6_t6_c5,
+	arm_r_r7_t6_c5,
+	arm_r_r8_t6_c5,
+	arm_r_r9_t6_c5,
+	arm_r_r10_t6_c5,
+	arm_r_r11_t6_c5,
+	arm_r_r12_t6_c5,
+	arm_r_r13_t6_c5,
+	arm_r_r14_t6_c5,
+	arm_r_r15_t6_c5,
+	arm_r_r0_t7_c5,
+	arm_r_r1_t7_c5,
+	arm_r_r2_t7_c5,
+	arm_r_r3_t7_c5,
+	arm_r_r4_t7_c5,
+	arm_r_r5_t7_c5,
+	arm_r_r6_t7_c5,
+	arm_r_r7_t7_c5,
+	arm_r_r8_t7_c5,
+	arm_r_r9_t7_c5,
+	arm_r_r10_t7_c5,
+	arm_r_r11_t7_c5,
+	arm_r_r12_t7_c5,
+	arm_r_r13_t7_c5,
+	arm_r_r14_t7_c5,
+	arm_r_r15_t7_c5,
+	arm_r_r0_t0_c6,
+	arm_r_r1_t0_c6,
+	arm_r_r2_t0_c6,
+	arm_r_r3_t0_c6,
+	arm_r_r4_t0_c6,
+	arm_r_r5_t0_c6,
+	arm_r_r6_t0_c6,
+	arm_r_r7_t0_c6,
+	arm_r_r8_t0_c6,
+	arm_r_r9_t0_c6,
+	arm_r_r10_t0_c6,
+	arm_r_r11_t0_c6,
+	arm_r_r12_t0_c6,
+	arm_r_r13_t0_c6,
+	arm_r_r14_t0_c6,
+	arm_r_r15_t0_c6,
+	arm_r_r0_t1_c6,
+	arm_r_r1_t1_c6,
+	arm_r_r2_t1_c6,
+	arm_r_r3_t1_c6,
+	arm_r_r4_t1_c6,
+	arm_r_r5_t1_c6,
+	arm_r_r6_t1_c6,
+	arm_r_r7_t1_c6,
+	arm_r_r8_t1_c6,
+	arm_r_r9_t1_c6,
+	arm_r_r10_t1_c6,
+	arm_r_r11_t1_c6,
+	arm_r_r12_t1_c6,
+	arm_r_r13_t1_c6,
+	arm_r_r14_t1_c6,
+	arm_r_r15_t1_c6,
+	arm_r_r0_t2_c6,
+	arm_r_r1_t2_c6,
+	arm_r_r2_t2_c6,
+	arm_r_r3_t2_c6,
+	arm_r_r4_t2_c6,
+	arm_r_r5_t2_c6,
+	arm_r_r6_t2_c6,
+	arm_r_r7_t2_c6,
+	arm_r_r8_t2_c6,
+	arm_r_r9_t2_c6,
+	arm_r_r10_t2_c6,
+	arm_r_r11_t2_c6,
+	arm_r_r12_t2_c6,
+	arm_r_r13_t2_c6,
+	arm_r_r14_t2_c6,
+	arm_r_r15_t2_c6,
+	arm_r_r0_t3_c6,
+	arm_r_r1_t3_c6,
+	arm_r_r2_t3_c6,
+	arm_r_r3_t3_c6,
+	arm_r_r4_t3_c6,
+	arm_r_r5_t3_c6,
+	arm_r_r6_t3_c6,
+	arm_r_r7_t3_c6,
+	arm_r_r8_t3_c6,
+	arm_r_r9_t3_c6,
+	arm_r_r10_t3_c6,
+	arm_r_r11_t3_c6,
+	arm_r_r12_t3_c6,
+	arm_r_r13_t3_c6,
+	arm_r_r14_t3_c6,
+	arm_r_r15_t3_c6,
+	arm_r_r0_t4_c6,
+	arm_r_r1_t4_c6,
+	arm_r_r2_t4_c6,
+	arm_r_r3_t4_c6,
+	arm_r_r4_t4_c6,
+	arm_r_r5_t4_c6,
+	arm_r_r6_t4_c6,
+	arm_r_r7_t4_c6,
+	arm_r_r8_t4_c6,
+	arm_r_r9_t4_c6,
+	arm_r_r10_t4_c6,
+	arm_r_r11_t4_c6,
+	arm_r_r12_t4_c6,
+	arm_r_r13_t4_c6,
+	arm_r_r14_t4_c6,
+	arm_r_r15_t4_c6,
+	arm_r_r0_t5_c6,
+	arm_r_r1_t5_c6,
+	arm_r_r2_t5_c6,
+	arm_r_r3_t5_c6,
+	arm_r_r4_t5_c6,
+	arm_r_r5_t5_c6,
+	arm_r_r6_t5_c6,
+	arm_r_r7_t5_c6,
+	arm_r_r8_t5_c6,
+	arm_r_r9_t5_c6,
+	arm_r_r10_t5_c6,
+	arm_r_r11_t5_c6,
+	arm_r_r12_t5_c6,
+	arm_r_r13_t5_c6,
+	arm_r_r14_t5_c6,
+	arm_r_r15_t5_c6,
+	arm_r_r0_t6_c6,
+	arm_r_r1_t6_c6,
+	arm_r_r2_t6_c6,
+	arm_r_r3_t6_c6,
+	arm_r_r4_t6_c6,
+	arm_r_r5_t6_c6,
+	arm_r_r6_t6_c6,
+	arm_r_r7_t6_c6,
+	arm_r_r8_t6_c6,
+	arm_r_r9_t6_c6,
+	arm_r_r10_t6_c6,
+	arm_r_r11_t6_c6,
+	arm_r_r12_t6_c6,
+	arm_r_r13_t6_c6,
+	arm_r_r14_t6_c6,
+	arm_r_r15_t6_c6,
+	arm_r_r0_t7_c6,
+	arm_r_r1_t7_c6,
+	arm_r_r2_t7_c6,
+	arm_r_r3_t7_c6,
+	arm_r_r4_t7_c6,
+	arm_r_r5_t7_c6,
+	arm_r_r6_t7_c6,
+	arm_r_r7_t7_c6,
+	arm_r_r8_t7_c6,
+	arm_r_r9_t7_c6,
+	arm_r_r10_t7_c6,
+	arm_r_r11_t7_c6,
+	arm_r_r12_t7_c6,
+	arm_r_r13_t7_c6,
+	arm_r_r14_t7_c6,
+	arm_r_r15_t7_c6,
+	arm_r_r0_t0_c7,
+	arm_r_r1_t0_c7,
+	arm_r_r2_t0_c7,
+	arm_r_r3_t0_c7,
+	arm_r_r4_t0_c7,
+	arm_r_r5_t0_c7,
+	arm_r_r6_t0_c7,
+	arm_r_r7_t0_c7,
+	arm_r_r8_t0_c7,
+	arm_r_r9_t0_c7,
+	arm_r_r10_t0_c7,
+	arm_r_r11_t0_c7,
+	arm_r_r12_t0_c7,
+	arm_r_r13_t0_c7,
+	arm_r_r14_t0_c7,
+	arm_r_r15_t0_c7,
+	arm_r_r0_t1_c7,
+	arm_r_r1_t1_c7,
+	arm_r_r2_t1_c7,
+	arm_r_r3_t1_c7,
+	arm_r_r4_t1_c7,
+	arm_r_r5_t1_c7,
+	arm_r_r6_t1_c7,
+	arm_r_r7_t1_c7,
+	arm_r_r8_t1_c7,
+	arm_r_r9_t1_c7,
+	arm_r_r10_t1_c7,
+	arm_r_r11_t1_c7,
+	arm_r_r12_t1_c7,
+	arm_r_r13_t1_c7,
+	arm_r_r14_t1_c7,
+	arm_r_r15_t1_c7,
+	arm_r_r0_t2_c7,
+	arm_r_r1_t2_c7,
+	arm_r_r2_t2_c7,
+	arm_r_r3_t2_c7,
+	arm_r_r4_t2_c7,
+	arm_r_r5_t2_c7,
+	arm_r_r6_t2_c7,
+	arm_r_r7_t2_c7,
+	arm_r_r8_t2_c7,
+	arm_r_r9_t2_c7,
+	arm_r_r10_t2_c7,
+	arm_r_r11_t2_c7,
+	arm_r_r12_t2_c7,
+	arm_r_r13_t2_c7,
+	arm_r_r14_t2_c7,
+	arm_r_r15_t2_c7,
+	arm_r_r0_t3_c7,
+	arm_r_r1_t3_c7,
+	arm_r_r2_t3_c7,
+	arm_r_r3_t3_c7,
+	arm_r_r4_t3_c7,
+	arm_r_r5_t3_c7,
+	arm_r_r6_t3_c7,
+	arm_r_r7_t3_c7,
+	arm_r_r8_t3_c7,
+	arm_r_r9_t3_c7,
+	arm_r_r10_t3_c7,
+	arm_r_r11_t3_c7,
+	arm_r_r12_t3_c7,
+	arm_r_r13_t3_c7,
+	arm_r_r14_t3_c7,
+	arm_r_r15_t3_c7,
+	arm_r_r0_t4_c7,
+	arm_r_r1_t4_c7,
+	arm_r_r2_t4_c7,
+	arm_r_r3_t4_c7,
+	arm_r_r4_t4_c7,
+	arm_r_r5_t4_c7,
+	arm_r_r6_t4_c7,
+	arm_r_r7_t4_c7,
+	arm_r_r8_t4_c7,
+	arm_r_r9_t4_c7,
+	arm_r_r10_t4_c7,
+	arm_r_r11_t4_c7,
+	arm_r_r12_t4_c7,
+	arm_r_r13_t4_c7,
+	arm_r_r14_t4_c7,
+	arm_r_r15_t4_c7,
+	arm_r_r0_t5_c7,
+	arm_r_r1_t5_c7,
+	arm_r_r2_t5_c7,
+	arm_r_r3_t5_c7,
+	arm_r_r4_t5_c7,
+	arm_r_r5_t5_c7,
+	arm_r_r6_t5_c7,
+	arm_r_r7_t5_c7,
+	arm_r_r8_t5_c7,
+	arm_r_r9_t5_c7,
+	arm_r_r10_t5_c7,
+	arm_r_r11_t5_c7,
+	arm_r_r12_t5_c7,
+	arm_r_r13_t5_c7,
+	arm_r_r14_t5_c7,
+	arm_r_r15_t5_c7,
+	arm_r_r0_t6_c7,
+	arm_r_r1_t6_c7,
+	arm_r_r2_t6_c7,
+	arm_r_r3_t6_c7,
+	arm_r_r4_t6_c7,
+	arm_r_r5_t6_c7,
+	arm_r_r6_t6_c7,
+	arm_r_r7_t6_c7,
+	arm_r_r8_t6_c7,
+	arm_r_r9_t6_c7,
+	arm_r_r10_t6_c7,
+	arm_r_r11_t6_c7,
+	arm_r_r12_t6_c7,
+	arm_r_r13_t6_c7,
+	arm_r_r14_t6_c7,
+	arm_r_r15_t6_c7,
+	arm_r_r0_t7_c7,
+	arm_r_r1_t7_c7,
+	arm_r_r2_t7_c7,
+	arm_r_r3_t7_c7,
+	arm_r_r4_t7_c7,
+	arm_r_r5_t7_c7,
+	arm_r_r6_t7_c7,
+	arm_r_r7_t7_c7,
+	arm_r_r8_t7_c7,
+	arm_r_r9_t7_c7,
+	arm_r_r10_t7_c7,
+	arm_r_r11_t7_c7,
+	arm_r_r12_t7_c7,
+	arm_r_r13_t7_c7,
+	arm_r_r14_t7_c7,
+	arm_r_r15_t7_c7,
+	arm_r_r0_t0_c8,
+	arm_r_r1_t0_c8,
+	arm_r_r2_t0_c8,
+	arm_r_r3_t0_c8,
+	arm_r_r4_t0_c8,
+	arm_r_r5_t0_c8,
+	arm_r_r6_t0_c8,
+	arm_r_r7_t0_c8,
+	arm_r_r8_t0_c8,
+	arm_r_r9_t0_c8,
+	arm_r_r10_t0_c8,
+	arm_r_r11_t0_c8,
+	arm_r_r12_t0_c8,
+	arm_r_r13_t0_c8,
+	arm_r_r14_t0_c8,
+	arm_r_r15_t0_c8,
+	arm_r_r0_t1_c8,
+	arm_r_r1_t1_c8,
+	arm_r_r2_t1_c8,
+	arm_r_r3_t1_c8,
+	arm_r_r4_t1_c8,
+	arm_r_r5_t1_c8,
+	arm_r_r6_t1_c8,
+	arm_r_r7_t1_c8,
+	arm_r_r8_t1_c8,
+	arm_r_r9_t1_c8,
+	arm_r_r10_t1_c8,
+	arm_r_r11_t1_c8,
+	arm_r_r12_t1_c8,
+	arm_r_r13_t1_c8,
+	arm_r_r14_t1_c8,
+	arm_r_r15_t1_c8,
+	arm_r_r0_t2_c8,
+	arm_r_r1_t2_c8,
+	arm_r_r2_t2_c8,
+	arm_r_r3_t2_c8,
+	arm_r_r4_t2_c8,
+	arm_r_r5_t2_c8,
+	arm_r_r6_t2_c8,
+	arm_r_r7_t2_c8,
+	arm_r_r8_t2_c8,
+	arm_r_r9_t2_c8,
+	arm_r_r10_t2_c8,
+	arm_r_r11_t2_c8,
+	arm_r_r12_t2_c8,
+	arm_r_r13_t2_c8,
+	arm_r_r14_t2_c8,
+	arm_r_r15_t2_c8,
+	arm_r_r0_t3_c8,
+	arm_r_r1_t3_c8,
+	arm_r_r2_t3_c8,
+	arm_r_r3_t3_c8,
+	arm_r_r4_t3_c8,
+	arm_r_r5_t3_c8,
+	arm_r_r6_t3_c8,
+	arm_r_r7_t3_c8,
+	arm_r_r8_t3_c8,
+	arm_r_r9_t3_c8,
+	arm_r_r10_t3_c8,
+	arm_r_r11_t3_c8,
+	arm_r_r12_t3_c8,
+	arm_r_r13_t3_c8,
+	arm_r_r14_t3_c8,
+	arm_r_r15_t3_c8,
+	arm_r_r0_t4_c8,
+	arm_r_r1_t4_c8,
+	arm_r_r2_t4_c8,
+	arm_r_r3_t4_c8,
+	arm_r_r4_t4_c8,
+	arm_r_r5_t4_c8,
+	arm_r_r6_t4_c8,
+	arm_r_r7_t4_c8,
+	arm_r_r8_t4_c8,
+	arm_r_r9_t4_c8,
+	arm_r_r10_t4_c8,
+	arm_r_r11_t4_c8,
+	arm_r_r12_t4_c8,
+	arm_r_r13_t4_c8,
+	arm_r_r14_t4_c8,
+	arm_r_r15_t4_c8,
+	arm_r_r0_t5_c8,
+	arm_r_r1_t5_c8,
+	arm_r_r2_t5_c8,
+	arm_r_r3_t5_c8,
+	arm_r_r4_t5_c8,
+	arm_r_r5_t5_c8,
+	arm_r_r6_t5_c8,
+	arm_r_r7_t5_c8,
+	arm_r_r8_t5_c8,
+	arm_r_r9_t5_c8,
+	arm_r_r10_t5_c8,
+	arm_r_r11_t5_c8,
+	arm_r_r12_t5_c8,
+	arm_r_r13_t5_c8,
+	arm_r_r14_t5_c8,
+	arm_r_r15_t5_c8,
+	arm_r_r0_t6_c8,
+	arm_r_r1_t6_c8,
+	arm_r_r2_t6_c8,
+	arm_r_r3_t6_c8,
+	arm_r_r4_t6_c8,
+	arm_r_r5_t6_c8,
+	arm_r_r6_t6_c8,
+	arm_r_r7_t6_c8,
+	arm_r_r8_t6_c8,
+	arm_r_r9_t6_c8,
+	arm_r_r10_t6_c8,
+	arm_r_r11_t6_c8,
+	arm_r_r12_t6_c8,
+	arm_r_r13_t6_c8,
+	arm_r_r14_t6_c8,
+	arm_r_r15_t6_c8,
+	arm_r_r0_t7_c8,
+	arm_r_r1_t7_c8,
+	arm_r_r2_t7_c8,
+	arm_r_r3_t7_c8,
+	arm_r_r4_t7_c8,
+	arm_r_r5_t7_c8,
+	arm_r_r6_t7_c8,
+	arm_r_r7_t7_c8,
+	arm_r_r8_t7_c8,
+	arm_r_r9_t7_c8,
+	arm_r_r10_t7_c8,
+	arm_r_r11_t7_c8,
+	arm_r_r12_t7_c8,
+	arm_r_r13_t7_c8,
+	arm_r_r14_t7_c8,
+	arm_r_r15_t7_c8,
+	arm_r_r0_t0_c9,
+	arm_r_r1_t0_c9,
+	arm_r_r2_t0_c9,
+	arm_r_r3_t0_c9,
+	arm_r_r4_t0_c9,
+	arm_r_r5_t0_c9,
+	arm_r_r6_t0_c9,
+	arm_r_r7_t0_c9,
+	arm_r_r8_t0_c9,
+	arm_r_r9_t0_c9,
+	arm_r_r10_t0_c9,
+	arm_r_r11_t0_c9,
+	arm_r_r12_t0_c9,
+	arm_r_r13_t0_c9,
+	arm_r_r14_t0_c9,
+	arm_r_r15_t0_c9,
+	arm_r_r0_t1_c9,
+	arm_r_r1_t1_c9,
+	arm_r_r2_t1_c9,
+	arm_r_r3_t1_c9,
+	arm_r_r4_t1_c9,
+	arm_r_r5_t1_c9,
+	arm_r_r6_t1_c9,
+	arm_r_r7_t1_c9,
+	arm_r_r8_t1_c9,
+	arm_r_r9_t1_c9,
+	arm_r_r10_t1_c9,
+	arm_r_r11_t1_c9,
+	arm_r_r12_t1_c9,
+	arm_r_r13_t1_c9,
+	arm_r_r14_t1_c9,
+	arm_r_r15_t1_c9,
+	arm_r_r0_t2_c9,
+	arm_r_r1_t2_c9,
+	arm_r_r2_t2_c9,
+	arm_r_r3_t2_c9,
+	arm_r_r4_t2_c9,
+	arm_r_r5_t2_c9,
+	arm_r_r6_t2_c9,
+	arm_r_r7_t2_c9,
+	arm_r_r8_t2_c9,
+	arm_r_r9_t2_c9,
+	arm_r_r10_t2_c9,
+	arm_r_r11_t2_c9,
+	arm_r_r12_t2_c9,
+	arm_r_r13_t2_c9,
+	arm_r_r14_t2_c9,
+	arm_r_r15_t2_c9,
+	arm_r_r0_t3_c9,
+	arm_r_r1_t3_c9,
+	arm_r_r2_t3_c9,
+	arm_r_r3_t3_c9,
+	arm_r_r4_t3_c9,
+	arm_r_r5_t3_c9,
+	arm_r_r6_t3_c9,
+	arm_r_r7_t3_c9,
+	arm_r_r8_t3_c9,
+	arm_r_r9_t3_c9,
+	arm_r_r10_t3_c9,
+	arm_r_r11_t3_c9,
+	arm_r_r12_t3_c9,
+	arm_r_r13_t3_c9,
+	arm_r_r14_t3_c9,
+	arm_r_r15_t3_c9,
+	arm_r_r0_t4_c9,
+	arm_r_r1_t4_c9,
+	arm_r_r2_t4_c9,
+	arm_r_r3_t4_c9,
+	arm_r_r4_t4_c9,
+	arm_r_r5_t4_c9,
+	arm_r_r6_t4_c9,
+	arm_r_r7_t4_c9,
+	arm_r_r8_t4_c9,
+	arm_r_r9_t4_c9,
+	arm_r_r10_t4_c9,
+	arm_r_r11_t4_c9,
+	arm_r_r12_t4_c9,
+	arm_r_r13_t4_c9,
+	arm_r_r14_t4_c9,
+	arm_r_r15_t4_c9,
+	arm_r_r0_t5_c9,
+	arm_r_r1_t5_c9,
+	arm_r_r2_t5_c9,
+	arm_r_r3_t5_c9,
+	arm_r_r4_t5_c9,
+	arm_r_r5_t5_c9,
+	arm_r_r6_t5_c9,
+	arm_r_r7_t5_c9,
+	arm_r_r8_t5_c9,
+	arm_r_r9_t5_c9,
+	arm_r_r10_t5_c9,
+	arm_r_r11_t5_c9,
+	arm_r_r12_t5_c9,
+	arm_r_r13_t5_c9,
+	arm_r_r14_t5_c9,
+	arm_r_r15_t5_c9,
+	arm_r_r0_t6_c9,
+	arm_r_r1_t6_c9,
+	arm_r_r2_t6_c9,
+	arm_r_r3_t6_c9,
+	arm_r_r4_t6_c9,
+	arm_r_r5_t6_c9,
+	arm_r_r6_t6_c9,
+	arm_r_r7_t6_c9,
+	arm_r_r8_t6_c9,
+	arm_r_r9_t6_c9,
+	arm_r_r10_t6_c9,
+	arm_r_r11_t6_c9,
+	arm_r_r12_t6_c9,
+	arm_r_r13_t6_c9,
+	arm_r_r14_t6_c9,
+	arm_r_r15_t6_c9,
+	arm_r_r0_t7_c9,
+	arm_r_r1_t7_c9,
+	arm_r_r2_t7_c9,
+	arm_r_r3_t7_c9,
+	arm_r_r4_t7_c9,
+	arm_r_r5_t7_c9,
+	arm_r_r6_t7_c9,
+	arm_r_r7_t7_c9,
+	arm_r_r8_t7_c9,
+	arm_r_r9_t7_c9,
+	arm_r_r10_t7_c9,
+	arm_r_r11_t7_c9,
+	arm_r_r12_t7_c9,
+	arm_r_r13_t7_c9,
+	arm_r_r14_t7_c9,
+	arm_r_r15_t7_c9,
+	arm_r_r0_t0_c10,
+	arm_r_r1_t0_c10,
+	arm_r_r2_t0_c10,
+	arm_r_r3_t0_c10,
+	arm_r_r4_t0_c10,
+	arm_r_r5_t0_c10,
+	arm_r_r6_t0_c10,
+	arm_r_r7_t0_c10,
+	arm_r_r8_t0_c10,
+	arm_r_r9_t0_c10,
+	arm_r_r10_t0_c10,
+	arm_r_r11_t0_c10,
+	arm_r_r12_t0_c10,
+	arm_r_r13_t0_c10,
+	arm_r_r14_t0_c10,
+	arm_r_r15_t0_c10,
+	arm_r_r0_t1_c10,
+	arm_r_r1_t1_c10,
+	arm_r_r2_t1_c10,
+	arm_r_r3_t1_c10,
+	arm_r_r4_t1_c10,
+	arm_r_r5_t1_c10,
+	arm_r_r6_t1_c10,
+	arm_r_r7_t1_c10,
+	arm_r_r8_t1_c10,
+	arm_r_r9_t1_c10,
+	arm_r_r10_t1_c10,
+	arm_r_r11_t1_c10,
+	arm_r_r12_t1_c10,
+	arm_r_r13_t1_c10,
+	arm_r_r14_t1_c10,
+	arm_r_r15_t1_c10,
+	arm_r_r0_t2_c10,
+	arm_r_r1_t2_c10,
+	arm_r_r2_t2_c10,
+	arm_r_r3_t2_c10,
+	arm_r_r4_t2_c10,
+	arm_r_r5_t2_c10,
+	arm_r_r6_t2_c10,
+	arm_r_r7_t2_c10,
+	arm_r_r8_t2_c10,
+	arm_r_r9_t2_c10,
+	arm_r_r10_t2_c10,
+	arm_r_r11_t2_c10,
+	arm_r_r12_t2_c10,
+	arm_r_r13_t2_c10,
+	arm_r_r14_t2_c10,
+	arm_r_r15_t2_c10,
+	arm_r_r0_t3_c10,
+	arm_r_r1_t3_c10,
+	arm_r_r2_t3_c10,
+	arm_r_r3_t3_c10,
+	arm_r_r4_t3_c10,
+	arm_r_r5_t3_c10,
+	arm_r_r6_t3_c10,
+	arm_r_r7_t3_c10,
+	arm_r_r8_t3_c10,
+	arm_r_r9_t3_c10,
+	arm_r_r10_t3_c10,
+	arm_r_r11_t3_c10,
+	arm_r_r12_t3_c10,
+	arm_r_r13_t3_c10,
+	arm_r_r14_t3_c10,
+	arm_r_r15_t3_c10,
+	arm_r_r0_t4_c10,
+	arm_r_r1_t4_c10,
+	arm_r_r2_t4_c10,
+	arm_r_r3_t4_c10,
+	arm_r_r4_t4_c10,
+	arm_r_r5_t4_c10,
+	arm_r_r6_t4_c10,
+	arm_r_r7_t4_c10,
+	arm_r_r8_t4_c10,
+	arm_r_r9_t4_c10,
+	arm_r_r10_t4_c10,
+	arm_r_r11_t4_c10,
+	arm_r_r12_t4_c10,
+	arm_r_r13_t4_c10,
+	arm_r_r14_t4_c10,
+	arm_r_r15_t4_c10,
+	arm_r_r0_t5_c10,
+	arm_r_r1_t5_c10,
+	arm_r_r2_t5_c10,
+	arm_r_r3_t5_c10,
+	arm_r_r4_t5_c10,
+	arm_r_r5_t5_c10,
+	arm_r_r6_t5_c10,
+	arm_r_r7_t5_c10,
+	arm_r_r8_t5_c10,
+	arm_r_r9_t5_c10,
+	arm_r_r10_t5_c10,
+	arm_r_r11_t5_c10,
+	arm_r_r12_t5_c10,
+	arm_r_r13_t5_c10,
+	arm_r_r14_t5_c10,
+	arm_r_r15_t5_c10,
+	arm_r_r0_t6_c10,
+	arm_r_r1_t6_c10,
+	arm_r_r2_t6_c10,
+	arm_r_r3_t6_c10,
+	arm_r_r4_t6_c10,
+	arm_r_r5_t6_c10,
+	arm_r_r6_t6_c10,
+	arm_r_r7_t6_c10,
+	arm_r_r8_t6_c10,
+	arm_r_r9_t6_c10,
+	arm_r_r10_t6_c10,
+	arm_r_r11_t6_c10,
+	arm_r_r12_t6_c10,
+	arm_r_r13_t6_c10,
+	arm_r_r14_t6_c10,
+	arm_r_r15_t6_c10,
+	arm_r_r0_t7_c10,
+	arm_r_r1_t7_c10,
+	arm_r_r2_t7_c10,
+	arm_r_r3_t7_c10,
+	arm_r_r4_t7_c10,
+	arm_r_r5_t7_c10,
+	arm_r_r6_t7_c10,
+	arm_r_r7_t7_c10,
+	arm_r_r8_t7_c10,
+	arm_r_r9_t7_c10,
+	arm_r_r10_t7_c10,
+	arm_r_r11_t7_c10,
+	arm_r_r12_t7_c10,
+	arm_r_r13_t7_c10,
+	arm_r_r14_t7_c10,
+	arm_r_r15_t7_c10,
+	arm_r_r0_t0_c11,
+	arm_r_r1_t0_c11,
+	arm_r_r2_t0_c11,
+	arm_r_r3_t0_c11,
+	arm_r_r4_t0_c11,
+	arm_r_r5_t0_c11,
+	arm_r_r6_t0_c11,
+	arm_r_r7_t0_c11,
+	arm_r_r8_t0_c11,
+	arm_r_r9_t0_c11,
+	arm_r_r10_t0_c11,
+	arm_r_r11_t0_c11,
+	arm_r_r12_t0_c11,
+	arm_r_r13_t0_c11,
+	arm_r_r14_t0_c11,
+	arm_r_r15_t0_c11,
+	arm_r_r0_t1_c11,
+	arm_r_r1_t1_c11,
+	arm_r_r2_t1_c11,
+	arm_r_r3_t1_c11,
+	arm_r_r4_t1_c11,
+	arm_r_r5_t1_c11,
+	arm_r_r6_t1_c11,
+	arm_r_r7_t1_c11,
+	arm_r_r8_t1_c11,
+	arm_r_r9_t1_c11,
+	arm_r_r10_t1_c11,
+	arm_r_r11_t1_c11,
+	arm_r_r12_t1_c11,
+	arm_r_r13_t1_c11,
+	arm_r_r14_t1_c11,
+	arm_r_r15_t1_c11,
+	arm_r_r0_t2_c11,
+	arm_r_r1_t2_c11,
+	arm_r_r2_t2_c11,
+	arm_r_r3_t2_c11,
+	arm_r_r4_t2_c11,
+	arm_r_r5_t2_c11,
+	arm_r_r6_t2_c11,
+	arm_r_r7_t2_c11,
+	arm_r_r8_t2_c11,
+	arm_r_r9_t2_c11,
+	arm_r_r10_t2_c11,
+	arm_r_r11_t2_c11,
+	arm_r_r12_t2_c11,
+	arm_r_r13_t2_c11,
+	arm_r_r14_t2_c11,
+	arm_r_r15_t2_c11,
+	arm_r_r0_t3_c11,
+	arm_r_r1_t3_c11,
+	arm_r_r2_t3_c11,
+	arm_r_r3_t3_c11,
+	arm_r_r4_t3_c11,
+	arm_r_r5_t3_c11,
+	arm_r_r6_t3_c11,
+	arm_r_r7_t3_c11,
+	arm_r_r8_t3_c11,
+	arm_r_r9_t3_c11,
+	arm_r_r10_t3_c11,
+	arm_r_r11_t3_c11,
+	arm_r_r12_t3_c11,
+	arm_r_r13_t3_c11,
+	arm_r_r14_t3_c11,
+	arm_r_r15_t3_c11,
+	arm_r_r0_t4_c11,
+	arm_r_r1_t4_c11,
+	arm_r_r2_t4_c11,
+	arm_r_r3_t4_c11,
+	arm_r_r4_t4_c11,
+	arm_r_r5_t4_c11,
+	arm_r_r6_t4_c11,
+	arm_r_r7_t4_c11,
+	arm_r_r8_t4_c11,
+	arm_r_r9_t4_c11,
+	arm_r_r10_t4_c11,
+	arm_r_r11_t4_c11,
+	arm_r_r12_t4_c11,
+	arm_r_r13_t4_c11,
+	arm_r_r14_t4_c11,
+	arm_r_r15_t4_c11,
+	arm_r_r0_t5_c11,
+	arm_r_r1_t5_c11,
+	arm_r_r2_t5_c11,
+	arm_r_r3_t5_c11,
+	arm_r_r4_t5_c11,
+	arm_r_r5_t5_c11,
+	arm_r_r6_t5_c11,
+	arm_r_r7_t5_c11,
+	arm_r_r8_t5_c11,
+	arm_r_r9_t5_c11,
+	arm_r_r10_t5_c11,
+	arm_r_r11_t5_c11,
+	arm_r_r12_t5_c11,
+	arm_r_r13_t5_c11,
+	arm_r_r14_t5_c11,
+	arm_r_r15_t5_c11,
+	arm_r_r0_t6_c11,
+	arm_r_r1_t6_c11,
+	arm_r_r2_t6_c11,
+	arm_r_r3_t6_c11,
+	arm_r_r4_t6_c11,
+	arm_r_r5_t6_c11,
+	arm_r_r6_t6_c11,
+	arm_r_r7_t6_c11,
+	arm_r_r8_t6_c11,
+	arm_r_r9_t6_c11,
+	arm_r_r10_t6_c11,
+	arm_r_r11_t6_c11,
+	arm_r_r12_t6_c11,
+	arm_r_r13_t6_c11,
+	arm_r_r14_t6_c11,
+	arm_r_r15_t6_c11,
+	arm_r_r0_t7_c11,
+	arm_r_r1_t7_c11,
+	arm_r_r2_t7_c11,
+	arm_r_r3_t7_c11,
+	arm_r_r4_t7_c11,
+	arm_r_r5_t7_c11,
+	arm_r_r6_t7_c11,
+	arm_r_r7_t7_c11,
+	arm_r_r8_t7_c11,
+	arm_r_r9_t7_c11,
+	arm_r_r10_t7_c11,
+	arm_r_r11_t7_c11,
+	arm_r_r12_t7_c11,
+	arm_r_r13_t7_c11,
+	arm_r_r14_t7_c11,
+	arm_r_r15_t7_c11,
+	arm_r_r0_t0_c12,
+	arm_r_r1_t0_c12,
+	arm_r_r2_t0_c12,
+	arm_r_r3_t0_c12,
+	arm_r_r4_t0_c12,
+	arm_r_r5_t0_c12,
+	arm_r_r6_t0_c12,
+	arm_r_r7_t0_c12,
+	arm_r_r8_t0_c12,
+	arm_r_r9_t0_c12,
+	arm_r_r10_t0_c12,
+	arm_r_r11_t0_c12,
+	arm_r_r12_t0_c12,
+	arm_r_r13_t0_c12,
+	arm_r_r14_t0_c12,
+	arm_r_r15_t0_c12,
+	arm_r_r0_t1_c12,
+	arm_r_r1_t1_c12,
+	arm_r_r2_t1_c12,
+	arm_r_r3_t1_c12,
+	arm_r_r4_t1_c12,
+	arm_r_r5_t1_c12,
+	arm_r_r6_t1_c12,
+	arm_r_r7_t1_c12,
+	arm_r_r8_t1_c12,
+	arm_r_r9_t1_c12,
+	arm_r_r10_t1_c12,
+	arm_r_r11_t1_c12,
+	arm_r_r12_t1_c12,
+	arm_r_r13_t1_c12,
+	arm_r_r14_t1_c12,
+	arm_r_r15_t1_c12,
+	arm_r_r0_t2_c12,
+	arm_r_r1_t2_c12,
+	arm_r_r2_t2_c12,
+	arm_r_r3_t2_c12,
+	arm_r_r4_t2_c12,
+	arm_r_r5_t2_c12,
+	arm_r_r6_t2_c12,
+	arm_r_r7_t2_c12,
+	arm_r_r8_t2_c12,
+	arm_r_r9_t2_c12,
+	arm_r_r10_t2_c12,
+	arm_r_r11_t2_c12,
+	arm_r_r12_t2_c12,
+	arm_r_r13_t2_c12,
+	arm_r_r14_t2_c12,
+	arm_r_r15_t2_c12,
+	arm_r_r0_t3_c12,
+	arm_r_r1_t3_c12,
+	arm_r_r2_t3_c12,
+	arm_r_r3_t3_c12,
+	arm_r_r4_t3_c12,
+	arm_r_r5_t3_c12,
+	arm_r_r6_t3_c12,
+	arm_r_r7_t3_c12,
+	arm_r_r8_t3_c12,
+	arm_r_r9_t3_c12,
+	arm_r_r10_t3_c12,
+	arm_r_r11_t3_c12,
+	arm_r_r12_t3_c12,
+	arm_r_r13_t3_c12,
+	arm_r_r14_t3_c12,
+	arm_r_r15_t3_c12,
+	arm_r_r0_t4_c12,
+	arm_r_r1_t4_c12,
+	arm_r_r2_t4_c12,
+	arm_r_r3_t4_c12,
+	arm_r_r4_t4_c12,
+	arm_r_r5_t4_c12,
+	arm_r_r6_t4_c12,
+	arm_r_r7_t4_c12,
+	arm_r_r8_t4_c12,
+	arm_r_r9_t4_c12,
+	arm_r_r10_t4_c12,
+	arm_r_r11_t4_c12,
+	arm_r_r12_t4_c12,
+	arm_r_r13_t4_c12,
+	arm_r_r14_t4_c12,
+	arm_r_r15_t4_c12,
+	arm_r_r0_t5_c12,
+	arm_r_r1_t5_c12,
+	arm_r_r2_t5_c12,
+	arm_r_r3_t5_c12,
+	arm_r_r4_t5_c12,
+	arm_r_r5_t5_c12,
+	arm_r_r6_t5_c12,
+	arm_r_r7_t5_c12,
+	arm_r_r8_t5_c12,
+	arm_r_r9_t5_c12,
+	arm_r_r10_t5_c12,
+	arm_r_r11_t5_c12,
+	arm_r_r12_t5_c12,
+	arm_r_r13_t5_c12,
+	arm_r_r14_t5_c12,
+	arm_r_r15_t5_c12,
+	arm_r_r0_t6_c12,
+	arm_r_r1_t6_c12,
+	arm_r_r2_t6_c12,
+	arm_r_r3_t6_c12,
+	arm_r_r4_t6_c12,
+	arm_r_r5_t6_c12,
+	arm_r_r6_t6_c12,
+	arm_r_r7_t6_c12,
+	arm_r_r8_t6_c12,
+	arm_r_r9_t6_c12,
+	arm_r_r10_t6_c12,
+	arm_r_r11_t6_c12,
+	arm_r_r12_t6_c12,
+	arm_r_r13_t6_c12,
+	arm_r_r14_t6_c12,
+	arm_r_r15_t6_c12,
+	arm_r_r0_t7_c12,
+	arm_r_r1_t7_c12,
+	arm_r_r2_t7_c12,
+	arm_r_r3_t7_c12,
+	arm_r_r4_t7_c12,
+	arm_r_r5_t7_c12,
+	arm_r_r6_t7_c12,
+	arm_r_r7_t7_c12,
+	arm_r_r8_t7_c12,
+	arm_r_r9_t7_c12,
+	arm_r_r10_t7_c12,
+	arm_r_r11_t7_c12,
+	arm_r_r12_t7_c12,
+	arm_r_r13_t7_c12,
+	arm_r_r14_t7_c12,
+	arm_r_r15_t7_c12,
+	arm_r_r0_t0_c13,
+	arm_r_r1_t0_c13,
+	arm_r_r2_t0_c13,
+	arm_r_r3_t0_c13,
+	arm_r_r4_t0_c13,
+	arm_r_r5_t0_c13,
+	arm_r_r6_t0_c13,
+	arm_r_r7_t0_c13,
+	arm_r_r8_t0_c13,
+	arm_r_r9_t0_c13,
+	arm_r_r10_t0_c13,
+	arm_r_r11_t0_c13,
+	arm_r_r12_t0_c13,
+	arm_r_r13_t0_c13,
+	arm_r_r14_t0_c13,
+	arm_r_r15_t0_c13,
+	arm_r_r0_t1_c13,
+	arm_r_r1_t1_c13,
+	arm_r_r2_t1_c13,
+	arm_r_r3_t1_c13,
+	arm_r_r4_t1_c13,
+	arm_r_r5_t1_c13,
+	arm_r_r6_t1_c13,
+	arm_r_r7_t1_c13,
+	arm_r_r8_t1_c13,
+	arm_r_r9_t1_c13,
+	arm_r_r10_t1_c13,
+	arm_r_r11_t1_c13,
+	arm_r_r12_t1_c13,
+	arm_r_r13_t1_c13,
+	arm_r_r14_t1_c13,
+	arm_r_r15_t1_c13,
+	arm_r_r0_t2_c13,
+	arm_r_r1_t2_c13,
+	arm_r_r2_t2_c13,
+	arm_r_r3_t2_c13,
+	arm_r_r4_t2_c13,
+	arm_r_r5_t2_c13,
+	arm_r_r6_t2_c13,
+	arm_r_r7_t2_c13,
+	arm_r_r8_t2_c13,
+	arm_r_r9_t2_c13,
+	arm_r_r10_t2_c13,
+	arm_r_r11_t2_c13,
+	arm_r_r12_t2_c13,
+	arm_r_r13_t2_c13,
+	arm_r_r14_t2_c13,
+	arm_r_r15_t2_c13,
+	arm_r_r0_t3_c13,
+	arm_r_r1_t3_c13,
+	arm_r_r2_t3_c13,
+	arm_r_r3_t3_c13,
+	arm_r_r4_t3_c13,
+	arm_r_r5_t3_c13,
+	arm_r_r6_t3_c13,
+	arm_r_r7_t3_c13,
+	arm_r_r8_t3_c13,
+	arm_r_r9_t3_c13,
+	arm_r_r10_t3_c13,
+	arm_r_r11_t3_c13,
+	arm_r_r12_t3_c13,
+	arm_r_r13_t3_c13,
+	arm_r_r14_t3_c13,
+	arm_r_r15_t3_c13,
+	arm_r_r0_t4_c13,
+	arm_r_r1_t4_c13,
+	arm_r_r2_t4_c13,
+	arm_r_r3_t4_c13,
+	arm_r_r4_t4_c13,
+	arm_r_r5_t4_c13,
+	arm_r_r6_t4_c13,
+	arm_r_r7_t4_c13,
+	arm_r_r8_t4_c13,
+	arm_r_r9_t4_c13,
+	arm_r_r10_t4_c13,
+	arm_r_r11_t4_c13,
+	arm_r_r12_t4_c13,
+	arm_r_r13_t4_c13,
+	arm_r_r14_t4_c13,
+	arm_r_r15_t4_c13,
+	arm_r_r0_t5_c13,
+	arm_r_r1_t5_c13,
+	arm_r_r2_t5_c13,
+	arm_r_r3_t5_c13,
+	arm_r_r4_t5_c13,
+	arm_r_r5_t5_c13,
+	arm_r_r6_t5_c13,
+	arm_r_r7_t5_c13,
+	arm_r_r8_t5_c13,
+	arm_r_r9_t5_c13,
+	arm_r_r10_t5_c13,
+	arm_r_r11_t5_c13,
+	arm_r_r12_t5_c13,
+	arm_r_r13_t5_c13,
+	arm_r_r14_t5_c13,
+	arm_r_r15_t5_c13,
+	arm_r_r0_t6_c13,
+	arm_r_r1_t6_c13,
+	arm_r_r2_t6_c13,
+	arm_r_r3_t6_c13,
+	arm_r_r4_t6_c13,
+	arm_r_r5_t6_c13,
+	arm_r_r6_t6_c13,
+	arm_r_r7_t6_c13,
+	arm_r_r8_t6_c13,
+	arm_r_r9_t6_c13,
+	arm_r_r10_t6_c13,
+	arm_r_r11_t6_c13,
+	arm_r_r12_t6_c13,
+	arm_r_r13_t6_c13,
+	arm_r_r14_t6_c13,
+	arm_r_r15_t6_c13,
+	arm_r_r0_t7_c13,
+	arm_r_r1_t7_c13,
+	arm_r_r2_t7_c13,
+	arm_r_r3_t7_c13,
+	arm_r_r4_t7_c13,
+	arm_r_r5_t7_c13,
+	arm_r_r6_t7_c13,
+	arm_r_r7_t7_c13,
+	arm_r_r8_t7_c13,
+	arm_r_r9_t7_c13,
+	arm_r_r10_t7_c13,
+	arm_r_r11_t7_c13,
+	arm_r_r12_t7_c13,
+	arm_r_r13_t7_c13,
+	arm_r_r14_t7_c13,
+	arm_r_r15_t7_c13,
+	arm_r_r0_t0_c14,
+	arm_r_r1_t0_c14,
+	arm_r_r2_t0_c14,
+	arm_r_r3_t0_c14,
+	arm_r_r4_t0_c14,
+	arm_r_r5_t0_c14,
+	arm_r_r6_t0_c14,
+	arm_r_r7_t0_c14,
+	arm_r_r8_t0_c14,
+	arm_r_r9_t0_c14,
+	arm_r_r10_t0_c14,
+	arm_r_r11_t0_c14,
+	arm_r_r12_t0_c14,
+	arm_r_r13_t0_c14,
+	arm_r_r14_t0_c14,
+	arm_r_r15_t0_c14,
+	arm_r_r0_t1_c14,
+	arm_r_r1_t1_c14,
+	arm_r_r2_t1_c14,
+	arm_r_r3_t1_c14,
+	arm_r_r4_t1_c14,
+	arm_r_r5_t1_c14,
+	arm_r_r6_t1_c14,
+	arm_r_r7_t1_c14,
+	arm_r_r8_t1_c14,
+	arm_r_r9_t1_c14,
+	arm_r_r10_t1_c14,
+	arm_r_r11_t1_c14,
+	arm_r_r12_t1_c14,
+	arm_r_r13_t1_c14,
+	arm_r_r14_t1_c14,
+	arm_r_r15_t1_c14,
+	arm_r_r0_t2_c14,
+	arm_r_r1_t2_c14,
+	arm_r_r2_t2_c14,
+	arm_r_r3_t2_c14,
+	arm_r_r4_t2_c14,
+	arm_r_r5_t2_c14,
+	arm_r_r6_t2_c14,
+	arm_r_r7_t2_c14,
+	arm_r_r8_t2_c14,
+	arm_r_r9_t2_c14,
+	arm_r_r10_t2_c14,
+	arm_r_r11_t2_c14,
+	arm_r_r12_t2_c14,
+	arm_r_r13_t2_c14,
+	arm_r_r14_t2_c14,
+	arm_r_r15_t2_c14,
+	arm_r_r0_t3_c14,
+	arm_r_r1_t3_c14,
+	arm_r_r2_t3_c14,
+	arm_r_r3_t3_c14,
+	arm_r_r4_t3_c14,
+	arm_r_r5_t3_c14,
+	arm_r_r6_t3_c14,
+	arm_r_r7_t3_c14,
+	arm_r_r8_t3_c14,
+	arm_r_r9_t3_c14,
+	arm_r_r10_t3_c14,
+	arm_r_r11_t3_c14,
+	arm_r_r12_t3_c14,
+	arm_r_r13_t3_c14,
+	arm_r_r14_t3_c14,
+	arm_r_r15_t3_c14,
+	arm_r_r0_t4_c14,
+	arm_r_r1_t4_c14,
+	arm_r_r2_t4_c14,
+	arm_r_r3_t4_c14,
+	arm_r_r4_t4_c14,
+	arm_r_r5_t4_c14,
+	arm_r_r6_t4_c14,
+	arm_r_r7_t4_c14,
+	arm_r_r8_t4_c14,
+	arm_r_r9_t4_c14,
+	arm_r_r10_t4_c14,
+	arm_r_r11_t4_c14,
+	arm_r_r12_t4_c14,
+	arm_r_r13_t4_c14,
+	arm_r_r14_t4_c14,
+	arm_r_r15_t4_c14,
+	arm_r_r0_t5_c14,
+	arm_r_r1_t5_c14,
+	arm_r_r2_t5_c14,
+	arm_r_r3_t5_c14,
+	arm_r_r4_t5_c14,
+	arm_r_r5_t5_c14,
+	arm_r_r6_t5_c14,
+	arm_r_r7_t5_c14,
+	arm_r_r8_t5_c14,
+	arm_r_r9_t5_c14,
+	arm_r_r10_t5_c14,
+	arm_r_r11_t5_c14,
+	arm_r_r12_t5_c14,
+	arm_r_r13_t5_c14,
+	arm_r_r14_t5_c14,
+	arm_r_r15_t5_c14,
+	arm_r_r0_t6_c14,
+	arm_r_r1_t6_c14,
+	arm_r_r2_t6_c14,
+	arm_r_r3_t6_c14,
+	arm_r_r4_t6_c14,
+	arm_r_r5_t6_c14,
+	arm_r_r6_t6_c14,
+	arm_r_r7_t6_c14,
+	arm_r_r8_t6_c14,
+	arm_r_r9_t6_c14,
+	arm_r_r10_t6_c14,
+	arm_r_r11_t6_c14,
+	arm_r_r12_t6_c14,
+	arm_r_r13_t6_c14,
+	arm_r_r14_t6_c14,
+	arm_r_r15_t6_c14,
+	arm_r_r0_t7_c14,
+	arm_r_r1_t7_c14,
+	arm_r_r2_t7_c14,
+	arm_r_r3_t7_c14,
+	arm_r_r4_t7_c14,
+	arm_r_r5_t7_c14,
+	arm_r_r6_t7_c14,
+	arm_r_r7_t7_c14,
+	arm_r_r8_t7_c14,
+	arm_r_r9_t7_c14,
+	arm_r_r10_t7_c14,
+	arm_r_r11_t7_c14,
+	arm_r_r12_t7_c14,
+	arm_r_r13_t7_c14,
+	arm_r_r14_t7_c14,
+	arm_r_r15_t7_c14,
+	arm_r_r0_t0_c15,
+	arm_r_r1_t0_c15,
+	arm_r_r2_t0_c15,
+	arm_r_r3_t0_c15,
+	arm_r_r4_t0_c15,
+	arm_r_r5_t0_c15,
+	arm_r_r6_t0_c15,
+	arm_r_r7_t0_c15,
+	arm_r_r8_t0_c15,
+	arm_r_r9_t0_c15,
+	arm_r_r10_t0_c15,
+	arm_r_r11_t0_c15,
+	arm_r_r12_t0_c15,
+	arm_r_r13_t0_c15,
+	arm_r_r14_t0_c15,
+	arm_r_r15_t0_c15,
+	arm_r_r0_t1_c15,
+	arm_r_r1_t1_c15,
+	arm_r_r2_t1_c15,
+	arm_r_r3_t1_c15,
+	arm_r_r4_t1_c15,
+	arm_r_r5_t1_c15,
+	arm_r_r6_t1_c15,
+	arm_r_r7_t1_c15,
+	arm_r_r8_t1_c15,
+	arm_r_r9_t1_c15,
+	arm_r_r10_t1_c15,
+	arm_r_r11_t1_c15,
+	arm_r_r12_t1_c15,
+	arm_r_r13_t1_c15,
+	arm_r_r14_t1_c15,
+	arm_r_r15_t1_c15,
+	arm_r_r0_t2_c15,
+	arm_r_r1_t2_c15,
+	arm_r_r2_t2_c15,
+	arm_r_r3_t2_c15,
+	arm_r_r4_t2_c15,
+	arm_r_r5_t2_c15,
+	arm_r_r6_t2_c15,
+	arm_r_r7_t2_c15,
+	arm_r_r8_t2_c15,
+	arm_r_r9_t2_c15,
+	arm_r_r10_t2_c15,
+	arm_r_r11_t2_c15,
+	arm_r_r12_t2_c15,
+	arm_r_r13_t2_c15,
+	arm_r_r14_t2_c15,
+	arm_r_r15_t2_c15,
+	arm_r_r0_t3_c15,
+	arm_r_r1_t3_c15,
+	arm_r_r2_t3_c15,
+	arm_r_r3_t3_c15,
+	arm_r_r4_t3_c15,
+	arm_r_r5_t3_c15,
+	arm_r_r6_t3_c15,
+	arm_r_r7_t3_c15,
+	arm_r_r8_t3_c15,
+	arm_r_r9_t3_c15,
+	arm_r_r10_t3_c15,
+	arm_r_r11_t3_c15,
+	arm_r_r12_t3_c15,
+	arm_r_r13_t3_c15,
+	arm_r_r14_t3_c15,
+	arm_r_r15_t3_c15,
+	arm_r_r0_t4_c15,
+	arm_r_r1_t4_c15,
+	arm_r_r2_t4_c15,
+	arm_r_r3_t4_c15,
+	arm_r_r4_t4_c15,
+	arm_r_r5_t4_c15,
+	arm_r_r6_t4_c15,
+	arm_r_r7_t4_c15,
+	arm_r_r8_t4_c15,
+	arm_r_r9_t4_c15,
+	arm_r_r10_t4_c15,
+	arm_r_r11_t4_c15,
+	arm_r_r12_t4_c15,
+	arm_r_r13_t4_c15,
+	arm_r_r14_t4_c15,
+	arm_r_r15_t4_c15,
+	arm_r_r0_t5_c15,
+	arm_r_r1_t5_c15,
+	arm_r_r2_t5_c15,
+	arm_r_r3_t5_c15,
+	arm_r_r4_t5_c15,
+	arm_r_r5_t5_c15,
+	arm_r_r6_t5_c15,
+	arm_r_r7_t5_c15,
+	arm_r_r8_t5_c15,
+	arm_r_r9_t5_c15,
+	arm_r_r10_t5_c15,
+	arm_r_r11_t5_c15,
+	arm_r_r12_t5_c15,
+	arm_r_r13_t5_c15,
+	arm_r_r14_t5_c15,
+	arm_r_r15_t5_c15,
+	arm_r_r0_t6_c15,
+	arm_r_r1_t6_c15,
+	arm_r_r2_t6_c15,
+	arm_r_r3_t6_c15,
+	arm_r_r4_t6_c15,
+	arm_r_r5_t6_c15,
+	arm_r_r6_t6_c15,
+	arm_r_r7_t6_c15,
+	arm_r_r8_t6_c15,
+	arm_r_r9_t6_c15,
+	arm_r_r10_t6_c15,
+	arm_r_r11_t6_c15,
+	arm_r_r12_t6_c15,
+	arm_r_r13_t6_c15,
+	arm_r_r14_t6_c15,
+	arm_r_r15_t6_c15,
+	arm_r_r0_t7_c15,
+	arm_r_r1_t7_c15,
+	arm_r_r2_t7_c15,
+	arm_r_r3_t7_c15,
+	arm_r_r4_t7_c15,
+	arm_r_r5_t7_c15,
+	arm_r_r6_t7_c15,
+	arm_r_r7_t7_c15,
+	arm_r_r8_t7_c15,
+	arm_r_r9_t7_c15,
+	arm_r_r10_t7_c15,
+	arm_r_r11_t7_c15,
+	arm_r_r12_t7_c15,
+	arm_r_r13_t7_c15,
+	arm_r_r14_t7_c15,
+	arm_r_r15_t7_c15,
+	arm_r_r0_t0_c16,
+	arm_r_r1_t0_c16,
+	arm_r_r2_t0_c16,
+	arm_r_r3_t0_c16,
+	arm_r_r4_t0_c16,
+	arm_r_r5_t0_c16,
+	arm_r_r6_t0_c16,
+	arm_r_r7_t0_c16,
+	arm_r_r8_t0_c16,
+	arm_r_r9_t0_c16,
+	arm_r_r10_t0_c16,
+	arm_r_r11_t0_c16,
+	arm_r_r12_t0_c16,
+	arm_r_r13_t0_c16,
+	arm_r_r14_t0_c16,
+	arm_r_r15_t0_c16,
+	arm_r_r0_t1_c16,
+	arm_r_r1_t1_c16,
+	arm_r_r2_t1_c16,
+	arm_r_r3_t1_c16,
+	arm_r_r4_t1_c16,
+	arm_r_r5_t1_c16,
+	arm_r_r6_t1_c16,
+	arm_r_r7_t1_c16,
+	arm_r_r8_t1_c16,
+	arm_r_r9_t1_c16,
+	arm_r_r10_t1_c16,
+	arm_r_r11_t1_c16,
+	arm_r_r12_t1_c16,
+	arm_r_r13_t1_c16,
+	arm_r_r14_t1_c16,
+	arm_r_r15_t1_c16,
+	arm_r_r0_t2_c16,
+	arm_r_r1_t2_c16,
+	arm_r_r2_t2_c16,
+	arm_r_r3_t2_c16,
+	arm_r_r4_t2_c16,
+	arm_r_r5_t2_c16,
+	arm_r_r6_t2_c16,
+	arm_r_r7_t2_c16,
+	arm_r_r8_t2_c16,
+	arm_r_r9_t2_c16,
+	arm_r_r10_t2_c16,
+	arm_r_r11_t2_c16,
+	arm_r_r12_t2_c16,
+	arm_r_r13_t2_c16,
+	arm_r_r14_t2_c16,
+	arm_r_r15_t2_c16,
+	arm_r_r0_t3_c16,
+	arm_r_r1_t3_c16,
+	arm_r_r2_t3_c16,
+	arm_r_r3_t3_c16,
+	arm_r_r4_t3_c16,
+	arm_r_r5_t3_c16,
+	arm_r_r6_t3_c16,
+	arm_r_r7_t3_c16,
+	arm_r_r8_t3_c16,
+	arm_r_r9_t3_c16,
+	arm_r_r10_t3_c16,
+	arm_r_r11_t3_c16,
+	arm_r_r12_t3_c16,
+	arm_r_r13_t3_c16,
+	arm_r_r14_t3_c16,
+	arm_r_r15_t3_c16,
+	arm_r_r0_t4_c16,
+	arm_r_r1_t4_c16,
+	arm_r_r2_t4_c16,
+	arm_r_r3_t4_c16,
+	arm_r_r4_t4_c16,
+	arm_r_r5_t4_c16,
+	arm_r_r6_t4_c16,
+	arm_r_r7_t4_c16,
+	arm_r_r8_t4_c16,
+	arm_r_r9_t4_c16,
+	arm_r_r10_t4_c16,
+	arm_r_r11_t4_c16,
+	arm_r_r12_t4_c16,
+	arm_r_r13_t4_c16,
+	arm_r_r14_t4_c16,
+	arm_r_r15_t4_c16,
+	arm_r_r0_t5_c16,
+	arm_r_r1_t5_c16,
+	arm_r_r2_t5_c16,
+	arm_r_r3_t5_c16,
+	arm_r_r4_t5_c16,
+	arm_r_r5_t5_c16,
+	arm_r_r6_t5_c16,
+	arm_r_r7_t5_c16,
+	arm_r_r8_t5_c16,
+	arm_r_r9_t5_c16,
+	arm_r_r10_t5_c16,
+	arm_r_r11_t5_c16,
+	arm_r_r12_t5_c16,
+	arm_r_r13_t5_c16,
+	arm_r_r14_t5_c16,
+	arm_r_r15_t5_c16,
+	arm_r_r0_t6_c16,
+	arm_r_r1_t6_c16,
+	arm_r_r2_t6_c16,
+	arm_r_r3_t6_c16,
+	arm_r_r4_t6_c16,
+	arm_r_r5_t6_c16,
+	arm_r_r6_t6_c16,
+	arm_r_r7_t6_c16,
+	arm_r_r8_t6_c16,
+	arm_r_r9_t6_c16,
+	arm_r_r10_t6_c16,
+	arm_r_r11_t6_c16,
+	arm_r_r12_t6_c16,
+	arm_r_r13_t6_c16,
+	arm_r_r14_t6_c16,
+	arm_r_r15_t6_c16,
+	arm_r_r0_t7_c16,
+	arm_r_r1_t7_c16,
+	arm_r_r2_t7_c16,
+	arm_r_r3_t7_c16,
+	arm_r_r4_t7_c16,
+	arm_r_r5_t7_c16,
+	arm_r_r6_t7_c16,
+	arm_r_r7_t7_c16,
+	arm_r_r8_t7_c16,
+	arm_r_r9_t7_c16,
+	arm_r_r10_t7_c16,
+	arm_r_r11_t7_c16,
+	arm_r_r12_t7_c16,
+	arm_r_r13_t7_c16,
+	arm_r_r14_t7_c16,
+	arm_r_r15_t7_c16,
+	arm_r_r0_t0_c17,
+	arm_r_r1_t0_c17,
+	arm_r_r2_t0_c17,
+	arm_r_r3_t0_c17,
+	arm_r_r4_t0_c17,
+	arm_r_r5_t0_c17,
+	arm_r_r6_t0_c17,
+	arm_r_r7_t0_c17,
+	arm_r_r8_t0_c17,
+	arm_r_r9_t0_c17,
+	arm_r_r10_t0_c17,
+	arm_r_r11_t0_c17,
+	arm_r_r12_t0_c17,
+	arm_r_r13_t0_c17,
+	arm_r_r14_t0_c17,
+	arm_r_r15_t0_c17,
+	arm_r_r0_t1_c17,
+	arm_r_r1_t1_c17,
+	arm_r_r2_t1_c17,
+	arm_r_r3_t1_c17,
+	arm_r_r4_t1_c17,
+	arm_r_r5_t1_c17,
+	arm_r_r6_t1_c17,
+	arm_r_r7_t1_c17,
+	arm_r_r8_t1_c17,
+	arm_r_r9_t1_c17,
+	arm_r_r10_t1_c17,
+	arm_r_r11_t1_c17,
+	arm_r_r12_t1_c17,
+	arm_r_r13_t1_c17,
+	arm_r_r14_t1_c17,
+	arm_r_r15_t1_c17,
+	arm_r_r0_t2_c17,
+	arm_r_r1_t2_c17,
+	arm_r_r2_t2_c17,
+	arm_r_r3_t2_c17,
+	arm_r_r4_t2_c17,
+	arm_r_r5_t2_c17,
+	arm_r_r6_t2_c17,
+	arm_r_r7_t2_c17,
+	arm_r_r8_t2_c17,
+	arm_r_r9_t2_c17,
+	arm_r_r10_t2_c17,
+	arm_r_r11_t2_c17,
+	arm_r_r12_t2_c17,
+	arm_r_r13_t2_c17,
+	arm_r_r14_t2_c17,
+	arm_r_r15_t2_c17,
+	arm_r_r0_t3_c17,
+	arm_r_r1_t3_c17,
+	arm_r_r2_t3_c17,
+	arm_r_r3_t3_c17,
+	arm_r_r4_t3_c17,
+	arm_r_r5_t3_c17,
+	arm_r_r6_t3_c17,
+	arm_r_r7_t3_c17,
+	arm_r_r8_t3_c17,
+	arm_r_r9_t3_c17,
+	arm_r_r10_t3_c17,
+	arm_r_r11_t3_c17,
+	arm_r_r12_t3_c17,
+	arm_r_r13_t3_c17,
+	arm_r_r14_t3_c17,
+	arm_r_r15_t3_c17,
+	arm_r_r0_t4_c17,
+	arm_r_r1_t4_c17,
+	arm_r_r2_t4_c17,
+	arm_r_r3_t4_c17,
+	arm_r_r4_t4_c17,
+	arm_r_r5_t4_c17,
+	arm_r_r6_t4_c17,
+	arm_r_r7_t4_c17,
+	arm_r_r8_t4_c17,
+	arm_r_r9_t4_c17,
+	arm_r_r10_t4_c17,
+	arm_r_r11_t4_c17,
+	arm_r_r12_t4_c17,
+	arm_r_r13_t4_c17,
+	arm_r_r14_t4_c17,
+	arm_r_r15_t4_c17,
+	arm_r_r0_t5_c17,
+	arm_r_r1_t5_c17,
+	arm_r_r2_t5_c17,
+	arm_r_r3_t5_c17,
+	arm_r_r4_t5_c17,
+	arm_r_r5_t5_c17,
+	arm_r_r6_t5_c17,
+	arm_r_r7_t5_c17,
+	arm_r_r8_t5_c17,
+	arm_r_r9_t5_c17,
+	arm_r_r10_t5_c17,
+	arm_r_r11_t5_c17,
+	arm_r_r12_t5_c17,
+	arm_r_r13_t5_c17,
+	arm_r_r14_t5_c17,
+	arm_r_r15_t5_c17,
+	arm_r_r0_t6_c17,
+	arm_r_r1_t6_c17,
+	arm_r_r2_t6_c17,
+	arm_r_r3_t6_c17,
+	arm_r_r4_t6_c17,
+	arm_r_r5_t6_c17,
+	arm_r_r6_t6_c17,
+	arm_r_r7_t6_c17,
+	arm_r_r8_t6_c17,
+	arm_r_r9_t6_c17,
+	arm_r_r10_t6_c17,
+	arm_r_r11_t6_c17,
+	arm_r_r12_t6_c17,
+	arm_r_r13_t6_c17,
+	arm_r_r14_t6_c17,
+	arm_r_r15_t6_c17,
+	arm_r_r0_t7_c17,
+	arm_r_r1_t7_c17,
+	arm_r_r2_t7_c17,
+	arm_r_r3_t7_c17,
+	arm_r_r4_t7_c17,
+	arm_r_r5_t7_c17,
+	arm_r_r6_t7_c17,
+	arm_r_r7_t7_c17,
+	arm_r_r8_t7_c17,
+	arm_r_r9_t7_c17,
+	arm_r_r10_t7_c17,
+	arm_r_r11_t7_c17,
+	arm_r_r12_t7_c17,
+	arm_r_r13_t7_c17,
+	arm_r_r14_t7_c17,
+	arm_r_r15_t7_c17,
+	arm_r_r0_t0_c18,
+	arm_r_r1_t0_c18,
+	arm_r_r2_t0_c18,
+	arm_r_r3_t0_c18,
+	arm_r_r4_t0_c18,
+	arm_r_r5_t0_c18,
+	arm_r_r6_t0_c18,
+	arm_r_r7_t0_c18,
+	arm_r_r8_t0_c18,
+	arm_r_r9_t0_c18,
+	arm_r_r10_t0_c18,
+	arm_r_r11_t0_c18,
+	arm_r_r12_t0_c18,
+	arm_r_r13_t0_c18,
+	arm_r_r14_t0_c18,
+	arm_r_r15_t0_c18,
+	arm_r_r0_t1_c18,
+	arm_r_r1_t1_c18,
+	arm_r_r2_t1_c18,
+	arm_r_r3_t1_c18,
+	arm_r_r4_t1_c18,
+	arm_r_r5_t1_c18,
+	arm_r_r6_t1_c18,
+	arm_r_r7_t1_c18,
+	arm_r_r8_t1_c18,
+	arm_r_r9_t1_c18,
+	arm_r_r10_t1_c18,
+	arm_r_r11_t1_c18,
+	arm_r_r12_t1_c18,
+	arm_r_r13_t1_c18,
+	arm_r_r14_t1_c18,
+	arm_r_r15_t1_c18,
+	arm_r_r0_t2_c18,
+	arm_r_r1_t2_c18,
+	arm_r_r2_t2_c18,
+	arm_r_r3_t2_c18,
+	arm_r_r4_t2_c18,
+	arm_r_r5_t2_c18,
+	arm_r_r6_t2_c18,
+	arm_r_r7_t2_c18,
+	arm_r_r8_t2_c18,
+	arm_r_r9_t2_c18,
+	arm_r_r10_t2_c18,
+	arm_r_r11_t2_c18,
+	arm_r_r12_t2_c18,
+	arm_r_r13_t2_c18,
+	arm_r_r14_t2_c18,
+	arm_r_r15_t2_c18,
+	arm_r_r0_t3_c18,
+	arm_r_r1_t3_c18,
+	arm_r_r2_t3_c18,
+	arm_r_r3_t3_c18,
+	arm_r_r4_t3_c18,
+	arm_r_r5_t3_c18,
+	arm_r_r6_t3_c18,
+	arm_r_r7_t3_c18,
+	arm_r_r8_t3_c18,
+	arm_r_r9_t3_c18,
+	arm_r_r10_t3_c18,
+	arm_r_r11_t3_c18,
+	arm_r_r12_t3_c18,
+	arm_r_r13_t3_c18,
+	arm_r_r14_t3_c18,
+	arm_r_r15_t3_c18,
+	arm_r_r0_t4_c18,
+	arm_r_r1_t4_c18,
+	arm_r_r2_t4_c18,
+	arm_r_r3_t4_c18,
+	arm_r_r4_t4_c18,
+	arm_r_r5_t4_c18,
+	arm_r_r6_t4_c18,
+	arm_r_r7_t4_c18,
+	arm_r_r8_t4_c18,
+	arm_r_r9_t4_c18,
+	arm_r_r10_t4_c18,
+	arm_r_r11_t4_c18,
+	arm_r_r12_t4_c18,
+	arm_r_r13_t4_c18,
+	arm_r_r14_t4_c18,
+	arm_r_r15_t4_c18,
+	arm_r_r0_t5_c18,
+	arm_r_r1_t5_c18,
+	arm_r_r2_t5_c18,
+	arm_r_r3_t5_c18,
+	arm_r_r4_t5_c18,
+	arm_r_r5_t5_c18,
+	arm_r_r6_t5_c18,
+	arm_r_r7_t5_c18,
+	arm_r_r8_t5_c18,
+	arm_r_r9_t5_c18,
+	arm_r_r10_t5_c18,
+	arm_r_r11_t5_c18,
+	arm_r_r12_t5_c18,
+	arm_r_r13_t5_c18,
+	arm_r_r14_t5_c18,
+	arm_r_r15_t5_c18,
+	arm_r_r0_t6_c18,
+	arm_r_r1_t6_c18,
+	arm_r_r2_t6_c18,
+	arm_r_r3_t6_c18,
+	arm_r_r4_t6_c18,
+	arm_r_r5_t6_c18,
+	arm_r_r6_t6_c18,
+	arm_r_r7_t6_c18,
+	arm_r_r8_t6_c18,
+	arm_r_r9_t6_c18,
+	arm_r_r10_t6_c18,
+	arm_r_r11_t6_c18,
+	arm_r_r12_t6_c18,
+	arm_r_r13_t6_c18,
+	arm_r_r14_t6_c18,
+	arm_r_r15_t6_c18,
+	arm_r_r0_t7_c18,
+	arm_r_r1_t7_c18,
+	arm_r_r2_t7_c18,
+	arm_r_r3_t7_c18,
+	arm_r_r4_t7_c18,
+	arm_r_r5_t7_c18,
+	arm_r_r6_t7_c18,
+	arm_r_r7_t7_c18,
+	arm_r_r8_t7_c18,
+	arm_r_r9_t7_c18,
+	arm_r_r10_t7_c18,
+	arm_r_r11_t7_c18,
+	arm_r_r12_t7_c18,
+	arm_r_r13_t7_c18,
+	arm_r_r14_t7_c18,
+	arm_r_r15_t7_c18,
+	arm_r_r0_t0_c19,
+	arm_r_r1_t0_c19,
+	arm_r_r2_t0_c19,
+	arm_r_r3_t0_c19,
+	arm_r_r4_t0_c19,
+	arm_r_r5_t0_c19,
+	arm_r_r6_t0_c19,
+	arm_r_r7_t0_c19,
+	arm_r_r8_t0_c19,
+	arm_r_r9_t0_c19,
+	arm_r_r10_t0_c19,
+	arm_r_r11_t0_c19,
+	arm_r_r12_t0_c19,
+	arm_r_r13_t0_c19,
+	arm_r_r14_t0_c19,
+	arm_r_r15_t0_c19,
+	arm_r_r0_t1_c19,
+	arm_r_r1_t1_c19,
+	arm_r_r2_t1_c19,
+	arm_r_r3_t1_c19,
+	arm_r_r4_t1_c19,
+	arm_r_r5_t1_c19,
+	arm_r_r6_t1_c19,
+	arm_r_r7_t1_c19,
+	arm_r_r8_t1_c19,
+	arm_r_r9_t1_c19,
+	arm_r_r10_t1_c19,
+	arm_r_r11_t1_c19,
+	arm_r_r12_t1_c19,
+	arm_r_r13_t1_c19,
+	arm_r_r14_t1_c19,
+	arm_r_r15_t1_c19,
+	arm_r_r0_t2_c19,
+	arm_r_r1_t2_c19,
+	arm_r_r2_t2_c19,
+	arm_r_r3_t2_c19,
+	arm_r_r4_t2_c19,
+	arm_r_r5_t2_c19,
+	arm_r_r6_t2_c19,
+	arm_r_r7_t2_c19,
+	arm_r_r8_t2_c19,
+	arm_r_r9_t2_c19,
+	arm_r_r10_t2_c19,
+	arm_r_r11_t2_c19,
+	arm_r_r12_t2_c19,
+	arm_r_r13_t2_c19,
+	arm_r_r14_t2_c19,
+	arm_r_r15_t2_c19,
+	arm_r_r0_t3_c19,
+	arm_r_r1_t3_c19,
+	arm_r_r2_t3_c19,
+	arm_r_r3_t3_c19,
+	arm_r_r4_t3_c19,
+	arm_r_r5_t3_c19,
+	arm_r_r6_t3_c19,
+	arm_r_r7_t3_c19,
+	arm_r_r8_t3_c19,
+	arm_r_r9_t3_c19,
+	arm_r_r10_t3_c19,
+	arm_r_r11_t3_c19,
+	arm_r_r12_t3_c19,
+	arm_r_r13_t3_c19,
+	arm_r_r14_t3_c19,
+	arm_r_r15_t3_c19,
+	arm_r_r0_t4_c19,
+	arm_r_r1_t4_c19,
+	arm_r_r2_t4_c19,
+	arm_r_r3_t4_c19,
+	arm_r_r4_t4_c19,
+	arm_r_r5_t4_c19,
+	arm_r_r6_t4_c19,
+	arm_r_r7_t4_c19,
+	arm_r_r8_t4_c19,
+	arm_r_r9_t4_c19,
+	arm_r_r10_t4_c19,
+	arm_r_r11_t4_c19,
+	arm_r_r12_t4_c19,
+	arm_r_r13_t4_c19,
+	arm_r_r14_t4_c19,
+	arm_r_r15_t4_c19,
+	arm_r_r0_t5_c19,
+	arm_r_r1_t5_c19,
+	arm_r_r2_t5_c19,
+	arm_r_r3_t5_c19,
+	arm_r_r4_t5_c19,
+	arm_r_r5_t5_c19,
+	arm_r_r6_t5_c19,
+	arm_r_r7_t5_c19,
+	arm_r_r8_t5_c19,
+	arm_r_r9_t5_c19,
+	arm_r_r10_t5_c19,
+	arm_r_r11_t5_c19,
+	arm_r_r12_t5_c19,
+	arm_r_r13_t5_c19,
+	arm_r_r14_t5_c19,
+	arm_r_r15_t5_c19,
+	arm_r_r0_t6_c19,
+	arm_r_r1_t6_c19,
+	arm_r_r2_t6_c19,
+	arm_r_r3_t6_c19,
+	arm_r_r4_t6_c19,
+	arm_r_r5_t6_c19,
+	arm_r_r6_t6_c19,
+	arm_r_r7_t6_c19,
+	arm_r_r8_t6_c19,
+	arm_r_r9_t6_c19,
+	arm_r_r10_t6_c19,
+	arm_r_r11_t6_c19,
+	arm_r_r12_t6_c19,
+	arm_r_r13_t6_c19,
+	arm_r_r14_t6_c19,
+	arm_r_r15_t6_c19,
+	arm_r_r0_t7_c19,
+	arm_r_r1_t7_c19,
+	arm_r_r2_t7_c19,
+	arm_r_r3_t7_c19,
+	arm_r_r4_t7_c19,
+	arm_r_r5_t7_c19,
+	arm_r_r6_t7_c19,
+	arm_r_r7_t7_c19,
+	arm_r_r8_t7_c19,
+	arm_r_r9_t7_c19,
+	arm_r_r10_t7_c19,
+	arm_r_r11_t7_c19,
+	arm_r_r12_t7_c19,
+	arm_r_r13_t7_c19,
+	arm_r_r14_t7_c19,
+	arm_r_r15_t7_c19,
+	arm_r_r0_t0_c20,
+	arm_r_r1_t0_c20,
+	arm_r_r2_t0_c20,
+	arm_r_r3_t0_c20,
+	arm_r_r4_t0_c20,
+	arm_r_r5_t0_c20,
+	arm_r_r6_t0_c20,
+	arm_r_r7_t0_c20,
+	arm_r_r8_t0_c20,
+	arm_r_r9_t0_c20,
+	arm_r_r10_t0_c20,
+	arm_r_r11_t0_c20,
+	arm_r_r12_t0_c20,
+	arm_r_r13_t0_c20,
+	arm_r_r14_t0_c20,
+	arm_r_r15_t0_c20,
+	arm_r_r0_t1_c20,
+	arm_r_r1_t1_c20,
+	arm_r_r2_t1_c20,
+	arm_r_r3_t1_c20,
+	arm_r_r4_t1_c20,
+	arm_r_r5_t1_c20,
+	arm_r_r6_t1_c20,
+	arm_r_r7_t1_c20,
+	arm_r_r8_t1_c20,
+	arm_r_r9_t1_c20,
+	arm_r_r10_t1_c20,
+	arm_r_r11_t1_c20,
+	arm_r_r12_t1_c20,
+	arm_r_r13_t1_c20,
+	arm_r_r14_t1_c20,
+	arm_r_r15_t1_c20,
+	arm_r_r0_t2_c20,
+	arm_r_r1_t2_c20,
+	arm_r_r2_t2_c20,
+	arm_r_r3_t2_c20,
+	arm_r_r4_t2_c20,
+	arm_r_r5_t2_c20,
+	arm_r_r6_t2_c20,
+	arm_r_r7_t2_c20,
+	arm_r_r8_t2_c20,
+	arm_r_r9_t2_c20,
+	arm_r_r10_t2_c20,
+	arm_r_r11_t2_c20,
+	arm_r_r12_t2_c20,
+	arm_r_r13_t2_c20,
+	arm_r_r14_t2_c20,
+	arm_r_r15_t2_c20,
+	arm_r_r0_t3_c20,
+	arm_r_r1_t3_c20,
+	arm_r_r2_t3_c20,
+	arm_r_r3_t3_c20,
+	arm_r_r4_t3_c20,
+	arm_r_r5_t3_c20,
+	arm_r_r6_t3_c20,
+	arm_r_r7_t3_c20,
+	arm_r_r8_t3_c20,
+	arm_r_r9_t3_c20,
+	arm_r_r10_t3_c20,
+	arm_r_r11_t3_c20,
+	arm_r_r12_t3_c20,
+	arm_r_r13_t3_c20,
+	arm_r_r14_t3_c20,
+	arm_r_r15_t3_c20,
+	arm_r_r0_t4_c20,
+	arm_r_r1_t4_c20,
+	arm_r_r2_t4_c20,
+	arm_r_r3_t4_c20,
+	arm_r_r4_t4_c20,
+	arm_r_r5_t4_c20,
+	arm_r_r6_t4_c20,
+	arm_r_r7_t4_c20,
+	arm_r_r8_t4_c20,
+	arm_r_r9_t4_c20,
+	arm_r_r10_t4_c20,
+	arm_r_r11_t4_c20,
+	arm_r_r12_t4_c20,
+	arm_r_r13_t4_c20,
+	arm_r_r14_t4_c20,
+	arm_r_r15_t4_c20,
+	arm_r_r0_t5_c20,
+	arm_r_r1_t5_c20,
+	arm_r_r2_t5_c20,
+	arm_r_r3_t5_c20,
+	arm_r_r4_t5_c20,
+	arm_r_r5_t5_c20,
+	arm_r_r6_t5_c20,
+	arm_r_r7_t5_c20,
+	arm_r_r8_t5_c20,
+	arm_r_r9_t5_c20,
+	arm_r_r10_t5_c20,
+	arm_r_r11_t5_c20,
+	arm_r_r12_t5_c20,
+	arm_r_r13_t5_c20,
+	arm_r_r14_t5_c20,
+	arm_r_r15_t5_c20,
+	arm_r_r0_t6_c20,
+	arm_r_r1_t6_c20,
+	arm_r_r2_t6_c20,
+	arm_r_r3_t6_c20,
+	arm_r_r4_t6_c20,
+	arm_r_r5_t6_c20,
+	arm_r_r6_t6_c20,
+	arm_r_r7_t6_c20,
+	arm_r_r8_t6_c20,
+	arm_r_r9_t6_c20,
+	arm_r_r10_t6_c20,
+	arm_r_r11_t6_c20,
+	arm_r_r12_t6_c20,
+	arm_r_r13_t6_c20,
+	arm_r_r14_t6_c20,
+	arm_r_r15_t6_c20,
+	arm_r_r0_t7_c20,
+	arm_r_r1_t7_c20,
+	arm_r_r2_t7_c20,
+	arm_r_r3_t7_c20,
+	arm_r_r4_t7_c20,
+	arm_r_r5_t7_c20,
+	arm_r_r6_t7_c20,
+	arm_r_r7_t7_c20,
+	arm_r_r8_t7_c20,
+	arm_r_r9_t7_c20,
+	arm_r_r10_t7_c20,
+	arm_r_r11_t7_c20,
+	arm_r_r12_t7_c20,
+	arm_r_r13_t7_c20,
+	arm_r_r14_t7_c20,
+	arm_r_r15_t7_c20,
+	arm_r_r0_t0_c21,
+	arm_r_r1_t0_c21,
+	arm_r_r2_t0_c21,
+	arm_r_r3_t0_c21,
+	arm_r_r4_t0_c21,
+	arm_r_r5_t0_c21,
+	arm_r_r6_t0_c21,
+	arm_r_r7_t0_c21,
+	arm_r_r8_t0_c21,
+	arm_r_r9_t0_c21,
+	arm_r_r10_t0_c21,
+	arm_r_r11_t0_c21,
+	arm_r_r12_t0_c21,
+	arm_r_r13_t0_c21,
+	arm_r_r14_t0_c21,
+	arm_r_r15_t0_c21,
+	arm_r_r0_t1_c21,
+	arm_r_r1_t1_c21,
+	arm_r_r2_t1_c21,
+	arm_r_r3_t1_c21,
+	arm_r_r4_t1_c21,
+	arm_r_r5_t1_c21,
+	arm_r_r6_t1_c21,
+	arm_r_r7_t1_c21,
+	arm_r_r8_t1_c21,
+	arm_r_r9_t1_c21,
+	arm_r_r10_t1_c21,
+	arm_r_r11_t1_c21,
+	arm_r_r12_t1_c21,
+	arm_r_r13_t1_c21,
+	arm_r_r14_t1_c21,
+	arm_r_r15_t1_c21,
+	arm_r_r0_t2_c21,
+	arm_r_r1_t2_c21,
+	arm_r_r2_t2_c21,
+	arm_r_r3_t2_c21,
+	arm_r_r4_t2_c21,
+	arm_r_r5_t2_c21,
+	arm_r_r6_t2_c21,
+	arm_r_r7_t2_c21,
+	arm_r_r8_t2_c21,
+	arm_r_r9_t2_c21,
+	arm_r_r10_t2_c21,
+	arm_r_r11_t2_c21,
+	arm_r_r12_t2_c21,
+	arm_r_r13_t2_c21,
+	arm_r_r14_t2_c21,
+	arm_r_r15_t2_c21,
+	arm_r_r0_t3_c21,
+	arm_r_r1_t3_c21,
+	arm_r_r2_t3_c21,
+	arm_r_r3_t3_c21,
+	arm_r_r4_t3_c21,
+	arm_r_r5_t3_c21,
+	arm_r_r6_t3_c21,
+	arm_r_r7_t3_c21,
+	arm_r_r8_t3_c21,
+	arm_r_r9_t3_c21,
+	arm_r_r10_t3_c21,
+	arm_r_r11_t3_c21,
+	arm_r_r12_t3_c21,
+	arm_r_r13_t3_c21,
+	arm_r_r14_t3_c21,
+	arm_r_r15_t3_c21,
+	arm_r_r0_t4_c21,
+	arm_r_r1_t4_c21,
+	arm_r_r2_t4_c21,
+	arm_r_r3_t4_c21,
+	arm_r_r4_t4_c21,
+	arm_r_r5_t4_c21,
+	arm_r_r6_t4_c21,
+	arm_r_r7_t4_c21,
+	arm_r_r8_t4_c21,
+	arm_r_r9_t4_c21,
+	arm_r_r10_t4_c21,
+	arm_r_r11_t4_c21,
+	arm_r_r12_t4_c21,
+	arm_r_r13_t4_c21,
+	arm_r_r14_t4_c21,
+	arm_r_r15_t4_c21,
+	arm_r_r0_t5_c21,
+	arm_r_r1_t5_c21,
+	arm_r_r2_t5_c21,
+	arm_r_r3_t5_c21,
+	arm_r_r4_t5_c21,
+	arm_r_r5_t5_c21,
+	arm_r_r6_t5_c21,
+	arm_r_r7_t5_c21,
+	arm_r_r8_t5_c21,
+	arm_r_r9_t5_c21,
+	arm_r_r10_t5_c21,
+	arm_r_r11_t5_c21,
+	arm_r_r12_t5_c21,
+	arm_r_r13_t5_c21,
+	arm_r_r14_t5_c21,
+	arm_r_r15_t5_c21,
+	arm_r_r0_t6_c21,
+	arm_r_r1_t6_c21,
+	arm_r_r2_t6_c21,
+	arm_r_r3_t6_c21,
+	arm_r_r4_t6_c21,
+	arm_r_r5_t6_c21,
+	arm_r_r6_t6_c21,
+	arm_r_r7_t6_c21,
+	arm_r_r8_t6_c21,
+	arm_r_r9_t6_c21,
+	arm_r_r10_t6_c21,
+	arm_r_r11_t6_c21,
+	arm_r_r12_t6_c21,
+	arm_r_r13_t6_c21,
+	arm_r_r14_t6_c21,
+	arm_r_r15_t6_c21,
+	arm_r_r0_t7_c21,
+	arm_r_r1_t7_c21,
+	arm_r_r2_t7_c21,
+	arm_r_r3_t7_c21,
+	arm_r_r4_t7_c21,
+	arm_r_r5_t7_c21,
+	arm_r_r6_t7_c21,
+	arm_r_r7_t7_c21,
+	arm_r_r8_t7_c21,
+	arm_r_r9_t7_c21,
+	arm_r_r10_t7_c21,
+	arm_r_r11_t7_c21,
+	arm_r_r12_t7_c21,
+	arm_r_r13_t7_c21,
+	arm_r_r14_t7_c21,
+	arm_r_r15_t7_c21,
+	arm_r_r0_t0_c22,
+	arm_r_r1_t0_c22,
+	arm_r_r2_t0_c22,
+	arm_r_r3_t0_c22,
+	arm_r_r4_t0_c22,
+	arm_r_r5_t0_c22,
+	arm_r_r6_t0_c22,
+	arm_r_r7_t0_c22,
+	arm_r_r8_t0_c22,
+	arm_r_r9_t0_c22,
+	arm_r_r10_t0_c22,
+	arm_r_r11_t0_c22,
+	arm_r_r12_t0_c22,
+	arm_r_r13_t0_c22,
+	arm_r_r14_t0_c22,
+	arm_r_r15_t0_c22,
+	arm_r_r0_t1_c22,
+	arm_r_r1_t1_c22,
+	arm_r_r2_t1_c22,
+	arm_r_r3_t1_c22,
+	arm_r_r4_t1_c22,
+	arm_r_r5_t1_c22,
+	arm_r_r6_t1_c22,
+	arm_r_r7_t1_c22,
+	arm_r_r8_t1_c22,
+	arm_r_r9_t1_c22,
+	arm_r_r10_t1_c22,
+	arm_r_r11_t1_c22,
+	arm_r_r12_t1_c22,
+	arm_r_r13_t1_c22,
+	arm_r_r14_t1_c22,
+	arm_r_r15_t1_c22,
+	arm_r_r0_t2_c22,
+	arm_r_r1_t2_c22,
+	arm_r_r2_t2_c22,
+	arm_r_r3_t2_c22,
+	arm_r_r4_t2_c22,
+	arm_r_r5_t2_c22,
+	arm_r_r6_t2_c22,
+	arm_r_r7_t2_c22,
+	arm_r_r8_t2_c22,
+	arm_r_r9_t2_c22,
+	arm_r_r10_t2_c22,
+	arm_r_r11_t2_c22,
+	arm_r_r12_t2_c22,
+	arm_r_r13_t2_c22,
+	arm_r_r14_t2_c22,
+	arm_r_r15_t2_c22,
+	arm_r_r0_t3_c22,
+	arm_r_r1_t3_c22,
+	arm_r_r2_t3_c22,
+	arm_r_r3_t3_c22,
+	arm_r_r4_t3_c22,
+	arm_r_r5_t3_c22,
+	arm_r_r6_t3_c22,
+	arm_r_r7_t3_c22,
+	arm_r_r8_t3_c22,
+	arm_r_r9_t3_c22,
+	arm_r_r10_t3_c22,
+	arm_r_r11_t3_c22,
+	arm_r_r12_t3_c22,
+	arm_r_r13_t3_c22,
+	arm_r_r14_t3_c22,
+	arm_r_r15_t3_c22,
+	arm_r_r0_t4_c22,
+	arm_r_r1_t4_c22,
+	arm_r_r2_t4_c22,
+	arm_r_r3_t4_c22,
+	arm_r_r4_t4_c22,
+	arm_r_r5_t4_c22,
+	arm_r_r6_t4_c22,
+	arm_r_r7_t4_c22,
+	arm_r_r8_t4_c22,
+	arm_r_r9_t4_c22,
+	arm_r_r10_t4_c22,
+	arm_r_r11_t4_c22,
+	arm_r_r12_t4_c22,
+	arm_r_r13_t4_c22,
+	arm_r_r14_t4_c22,
+	arm_r_r15_t4_c22,
+	arm_r_r0_t5_c22,
+	arm_r_r1_t5_c22,
+	arm_r_r2_t5_c22,
+	arm_r_r3_t5_c22,
+	arm_r_r4_t5_c22,
+	arm_r_r5_t5_c22,
+	arm_r_r6_t5_c22,
+	arm_r_r7_t5_c22,
+	arm_r_r8_t5_c22,
+	arm_r_r9_t5_c22,
+	arm_r_r10_t5_c22,
+	arm_r_r11_t5_c22,
+	arm_r_r12_t5_c22,
+	arm_r_r13_t5_c22,
+	arm_r_r14_t5_c22,
+	arm_r_r15_t5_c22,
+	arm_r_r0_t6_c22,
+	arm_r_r1_t6_c22,
+	arm_r_r2_t6_c22,
+	arm_r_r3_t6_c22,
+	arm_r_r4_t6_c22,
+	arm_r_r5_t6_c22,
+	arm_r_r6_t6_c22,
+	arm_r_r7_t6_c22,
+	arm_r_r8_t6_c22,
+	arm_r_r9_t6_c22,
+	arm_r_r10_t6_c22,
+	arm_r_r11_t6_c22,
+	arm_r_r12_t6_c22,
+	arm_r_r13_t6_c22,
+	arm_r_r14_t6_c22,
+	arm_r_r15_t6_c22,
+	arm_r_r0_t7_c22,
+	arm_r_r1_t7_c22,
+	arm_r_r2_t7_c22,
+	arm_r_r3_t7_c22,
+	arm_r_r4_t7_c22,
+	arm_r_r5_t7_c22,
+	arm_r_r6_t7_c22,
+	arm_r_r7_t7_c22,
+	arm_r_r8_t7_c22,
+	arm_r_r9_t7_c22,
+	arm_r_r10_t7_c22,
+	arm_r_r11_t7_c22,
+	arm_r_r12_t7_c22,
+	arm_r_r13_t7_c22,
+	arm_r_r14_t7_c22,
+	arm_r_r15_t7_c22,
+	arm_r_r0_t0_c23,
+	arm_r_r1_t0_c23,
+	arm_r_r2_t0_c23,
+	arm_r_r3_t0_c23,
+	arm_r_r4_t0_c23,
+	arm_r_r5_t0_c23,
+	arm_r_r6_t0_c23,
+	arm_r_r7_t0_c23,
+	arm_r_r8_t0_c23,
+	arm_r_r9_t0_c23,
+	arm_r_r10_t0_c23,
+	arm_r_r11_t0_c23,
+	arm_r_r12_t0_c23,
+	arm_r_r13_t0_c23,
+	arm_r_r14_t0_c23,
+	arm_r_r15_t0_c23,
+	arm_r_r0_t1_c23,
+	arm_r_r1_t1_c23,
+	arm_r_r2_t1_c23,
+	arm_r_r3_t1_c23,
+	arm_r_r4_t1_c23,
+	arm_r_r5_t1_c23,
+	arm_r_r6_t1_c23,
+	arm_r_r7_t1_c23,
+	arm_r_r8_t1_c23,
+	arm_r_r9_t1_c23,
+	arm_r_r10_t1_c23,
+	arm_r_r11_t1_c23,
+	arm_r_r12_t1_c23,
+	arm_r_r13_t1_c23,
+	arm_r_r14_t1_c23,
+	arm_r_r15_t1_c23,
+	arm_r_r0_t2_c23,
+	arm_r_r1_t2_c23,
+	arm_r_r2_t2_c23,
+	arm_r_r3_t2_c23,
+	arm_r_r4_t2_c23,
+	arm_r_r5_t2_c23,
+	arm_r_r6_t2_c23,
+	arm_r_r7_t2_c23,
+	arm_r_r8_t2_c23,
+	arm_r_r9_t2_c23,
+	arm_r_r10_t2_c23,
+	arm_r_r11_t2_c23,
+	arm_r_r12_t2_c23,
+	arm_r_r13_t2_c23,
+	arm_r_r14_t2_c23,
+	arm_r_r15_t2_c23,
+	arm_r_r0_t3_c23,
+	arm_r_r1_t3_c23,
+	arm_r_r2_t3_c23,
+	arm_r_r3_t3_c23,
+	arm_r_r4_t3_c23,
+	arm_r_r5_t3_c23,
+	arm_r_r6_t3_c23,
+	arm_r_r7_t3_c23,
+	arm_r_r8_t3_c23,
+	arm_r_r9_t3_c23,
+	arm_r_r10_t3_c23,
+	arm_r_r11_t3_c23,
+	arm_r_r12_t3_c23,
+	arm_r_r13_t3_c23,
+	arm_r_r14_t3_c23,
+	arm_r_r15_t3_c23,
+	arm_r_r0_t4_c23,
+	arm_r_r1_t4_c23,
+	arm_r_r2_t4_c23,
+	arm_r_r3_t4_c23,
+	arm_r_r4_t4_c23,
+	arm_r_r5_t4_c23,
+	arm_r_r6_t4_c23,
+	arm_r_r7_t4_c23,
+	arm_r_r8_t4_c23,
+	arm_r_r9_t4_c23,
+	arm_r_r10_t4_c23,
+	arm_r_r11_t4_c23,
+	arm_r_r12_t4_c23,
+	arm_r_r13_t4_c23,
+	arm_r_r14_t4_c23,
+	arm_r_r15_t4_c23,
+	arm_r_r0_t5_c23,
+	arm_r_r1_t5_c23,
+	arm_r_r2_t5_c23,
+	arm_r_r3_t5_c23,
+	arm_r_r4_t5_c23,
+	arm_r_r5_t5_c23,
+	arm_r_r6_t5_c23,
+	arm_r_r7_t5_c23,
+	arm_r_r8_t5_c23,
+	arm_r_r9_t5_c23,
+	arm_r_r10_t5_c23,
+	arm_r_r11_t5_c23,
+	arm_r_r12_t5_c23,
+	arm_r_r13_t5_c23,
+	arm_r_r14_t5_c23,
+	arm_r_r15_t5_c23,
+	arm_r_r0_t6_c23,
+	arm_r_r1_t6_c23,
+	arm_r_r2_t6_c23,
+	arm_r_r3_t6_c23,
+	arm_r_r4_t6_c23,
+	arm_r_r5_t6_c23,
+	arm_r_r6_t6_c23,
+	arm_r_r7_t6_c23,
+	arm_r_r8_t6_c23,
+	arm_r_r9_t6_c23,
+	arm_r_r10_t6_c23,
+	arm_r_r11_t6_c23,
+	arm_r_r12_t6_c23,
+	arm_r_r13_t6_c23,
+	arm_r_r14_t6_c23,
+	arm_r_r15_t6_c23,
+	arm_r_r0_t7_c23,
+	arm_r_r1_t7_c23,
+	arm_r_r2_t7_c23,
+	arm_r_r3_t7_c23,
+	arm_r_r4_t7_c23,
+	arm_r_r5_t7_c23,
+	arm_r_r6_t7_c23,
+	arm_r_r7_t7_c23,
+	arm_r_r8_t7_c23,
+	arm_r_r9_t7_c23,
+	arm_r_r10_t7_c23,
+	arm_r_r11_t7_c23,
+	arm_r_r12_t7_c23,
+	arm_r_r13_t7_c23,
+	arm_r_r14_t7_c23,
+	arm_r_r15_t7_c23,
+	arm_r_r0_t0_c24,
+	arm_r_r1_t0_c24,
+	arm_r_r2_t0_c24,
+	arm_r_r3_t0_c24,
+	arm_r_r4_t0_c24,
+	arm_r_r5_t0_c24,
+	arm_r_r6_t0_c24,
+	arm_r_r7_t0_c24,
+	arm_r_r8_t0_c24,
+	arm_r_r9_t0_c24,
+	arm_r_r10_t0_c24,
+	arm_r_r11_t0_c24,
+	arm_r_r12_t0_c24,
+	arm_r_r13_t0_c24,
+	arm_r_r14_t0_c24,
+	arm_r_r15_t0_c24,
+	arm_r_r0_t1_c24,
+	arm_r_r1_t1_c24,
+	arm_r_r2_t1_c24,
+	arm_r_r3_t1_c24,
+	arm_r_r4_t1_c24,
+	arm_r_r5_t1_c24,
+	arm_r_r6_t1_c24,
+	arm_r_r7_t1_c24,
+	arm_r_r8_t1_c24,
+	arm_r_r9_t1_c24,
+	arm_r_r10_t1_c24,
+	arm_r_r11_t1_c24,
+	arm_r_r12_t1_c24,
+	arm_r_r13_t1_c24,
+	arm_r_r14_t1_c24,
+	arm_r_r15_t1_c24,
+	arm_r_r0_t2_c24,
+	arm_r_r1_t2_c24,
+	arm_r_r2_t2_c24,
+	arm_r_r3_t2_c24,
+	arm_r_r4_t2_c24,
+	arm_r_r5_t2_c24,
+	arm_r_r6_t2_c24,
+	arm_r_r7_t2_c24,
+	arm_r_r8_t2_c24,
+	arm_r_r9_t2_c24,
+	arm_r_r10_t2_c24,
+	arm_r_r11_t2_c24,
+	arm_r_r12_t2_c24,
+	arm_r_r13_t2_c24,
+	arm_r_r14_t2_c24,
+	arm_r_r15_t2_c24,
+	arm_r_r0_t3_c24,
+	arm_r_r1_t3_c24,
+	arm_r_r2_t3_c24,
+	arm_r_r3_t3_c24,
+	arm_r_r4_t3_c24,
+	arm_r_r5_t3_c24,
+	arm_r_r6_t3_c24,
+	arm_r_r7_t3_c24,
+	arm_r_r8_t3_c24,
+	arm_r_r9_t3_c24,
+	arm_r_r10_t3_c24,
+	arm_r_r11_t3_c24,
+	arm_r_r12_t3_c24,
+	arm_r_r13_t3_c24,
+	arm_r_r14_t3_c24,
+	arm_r_r15_t3_c24,
+	arm_r_r0_t4_c24,
+	arm_r_r1_t4_c24,
+	arm_r_r2_t4_c24,
+	arm_r_r3_t4_c24,
+	arm_r_r4_t4_c24,
+	arm_r_r5_t4_c24,
+	arm_r_r6_t4_c24,
+	arm_r_r7_t4_c24,
+	arm_r_r8_t4_c24,
+	arm_r_r9_t4_c24,
+	arm_r_r10_t4_c24,
+	arm_r_r11_t4_c24,
+	arm_r_r12_t4_c24,
+	arm_r_r13_t4_c24,
+	arm_r_r14_t4_c24,
+	arm_r_r15_t4_c24,
+	arm_r_r0_t5_c24,
+	arm_r_r1_t5_c24,
+	arm_r_r2_t5_c24,
+	arm_r_r3_t5_c24,
+	arm_r_r4_t5_c24,
+	arm_r_r5_t5_c24,
+	arm_r_r6_t5_c24,
+	arm_r_r7_t5_c24,
+	arm_r_r8_t5_c24,
+	arm_r_r9_t5_c24,
+	arm_r_r10_t5_c24,
+	arm_r_r11_t5_c24,
+	arm_r_r12_t5_c24,
+	arm_r_r13_t5_c24,
+	arm_r_r14_t5_c24,
+	arm_r_r15_t5_c24,
+	arm_r_r0_t6_c24,
+	arm_r_r1_t6_c24,
+	arm_r_r2_t6_c24,
+	arm_r_r3_t6_c24,
+	arm_r_r4_t6_c24,
+	arm_r_r5_t6_c24,
+	arm_r_r6_t6_c24,
+	arm_r_r7_t6_c24,
+	arm_r_r8_t6_c24,
+	arm_r_r9_t6_c24,
+	arm_r_r10_t6_c24,
+	arm_r_r11_t6_c24,
+	arm_r_r12_t6_c24,
+	arm_r_r13_t6_c24,
+	arm_r_r14_t6_c24,
+	arm_r_r15_t6_c24,
+	arm_r_r0_t7_c24,
+	arm_r_r1_t7_c24,
+	arm_r_r2_t7_c24,
+	arm_r_r3_t7_c24,
+	arm_r_r4_t7_c24,
+	arm_r_r5_t7_c24,
+	arm_r_r6_t7_c24,
+	arm_r_r7_t7_c24,
+	arm_r_r8_t7_c24,
+	arm_r_r9_t7_c24,
+	arm_r_r10_t7_c24,
+	arm_r_r11_t7_c24,
+	arm_r_r12_t7_c24,
+	arm_r_r13_t7_c24,
+	arm_r_r14_t7_c24,
+	arm_r_r15_t7_c24,
+	arm_r_r0_t0_c25,
+	arm_r_r1_t0_c25,
+	arm_r_r2_t0_c25,
+	arm_r_r3_t0_c25,
+	arm_r_r4_t0_c25,
+	arm_r_r5_t0_c25,
+	arm_r_r6_t0_c25,
+	arm_r_r7_t0_c25,
+	arm_r_r8_t0_c25,
+	arm_r_r9_t0_c25,
+	arm_r_r10_t0_c25,
+	arm_r_r11_t0_c25,
+	arm_r_r12_t0_c25,
+	arm_r_r13_t0_c25,
+	arm_r_r14_t0_c25,
+	arm_r_r15_t0_c25,
+	arm_r_r0_t1_c25,
+	arm_r_r1_t1_c25,
+	arm_r_r2_t1_c25,
+	arm_r_r3_t1_c25,
+	arm_r_r4_t1_c25,
+	arm_r_r5_t1_c25,
+	arm_r_r6_t1_c25,
+	arm_r_r7_t1_c25,
+	arm_r_r8_t1_c25,
+	arm_r_r9_t1_c25,
+	arm_r_r10_t1_c25,
+	arm_r_r11_t1_c25,
+	arm_r_r12_t1_c25,
+	arm_r_r13_t1_c25,
+	arm_r_r14_t1_c25,
+	arm_r_r15_t1_c25,
+	arm_r_r0_t2_c25,
+	arm_r_r1_t2_c25,
+	arm_r_r2_t2_c25,
+	arm_r_r3_t2_c25,
+	arm_r_r4_t2_c25,
+	arm_r_r5_t2_c25,
+	arm_r_r6_t2_c25,
+	arm_r_r7_t2_c25,
+	arm_r_r8_t2_c25,
+	arm_r_r9_t2_c25,
+	arm_r_r10_t2_c25,
+	arm_r_r11_t2_c25,
+	arm_r_r12_t2_c25,
+	arm_r_r13_t2_c25,
+	arm_r_r14_t2_c25,
+	arm_r_r15_t2_c25,
+	arm_r_r0_t3_c25,
+	arm_r_r1_t3_c25,
+	arm_r_r2_t3_c25,
+	arm_r_r3_t3_c25,
+	arm_r_r4_t3_c25,
+	arm_r_r5_t3_c25,
+	arm_r_r6_t3_c25,
+	arm_r_r7_t3_c25,
+	arm_r_r8_t3_c25,
+	arm_r_r9_t3_c25,
+	arm_r_r10_t3_c25,
+	arm_r_r11_t3_c25,
+	arm_r_r12_t3_c25,
+	arm_r_r13_t3_c25,
+	arm_r_r14_t3_c25,
+	arm_r_r15_t3_c25,
+	arm_r_r0_t4_c25,
+	arm_r_r1_t4_c25,
+	arm_r_r2_t4_c25,
+	arm_r_r3_t4_c25,
+	arm_r_r4_t4_c25,
+	arm_r_r5_t4_c25,
+	arm_r_r6_t4_c25,
+	arm_r_r7_t4_c25,
+	arm_r_r8_t4_c25,
+	arm_r_r9_t4_c25,
+	arm_r_r10_t4_c25,
+	arm_r_r11_t4_c25,
+	arm_r_r12_t4_c25,
+	arm_r_r13_t4_c25,
+	arm_r_r14_t4_c25,
+	arm_r_r15_t4_c25,
+	arm_r_r0_t5_c25,
+	arm_r_r1_t5_c25,
+	arm_r_r2_t5_c25,
+	arm_r_r3_t5_c25,
+	arm_r_r4_t5_c25,
+	arm_r_r5_t5_c25,
+	arm_r_r6_t5_c25,
+	arm_r_r7_t5_c25,
+	arm_r_r8_t5_c25,
+	arm_r_r9_t5_c25,
+	arm_r_r10_t5_c25,
+	arm_r_r11_t5_c25,
+	arm_r_r12_t5_c25,
+	arm_r_r13_t5_c25,
+	arm_r_r14_t5_c25,
+	arm_r_r15_t5_c25,
+	arm_r_r0_t6_c25,
+	arm_r_r1_t6_c25,
+	arm_r_r2_t6_c25,
+	arm_r_r3_t6_c25,
+	arm_r_r4_t6_c25,
+	arm_r_r5_t6_c25,
+	arm_r_r6_t6_c25,
+	arm_r_r7_t6_c25,
+	arm_r_r8_t6_c25,
+	arm_r_r9_t6_c25,
+	arm_r_r10_t6_c25,
+	arm_r_r11_t6_c25,
+	arm_r_r12_t6_c25,
+	arm_r_r13_t6_c25,
+	arm_r_r14_t6_c25,
+	arm_r_r15_t6_c25,
+	arm_r_r0_t7_c25,
+	arm_r_r1_t7_c25,
+	arm_r_r2_t7_c25,
+	arm_r_r3_t7_c25,
+	arm_r_r4_t7_c25,
+	arm_r_r5_t7_c25,
+	arm_r_r6_t7_c25,
+	arm_r_r7_t7_c25,
+	arm_r_r8_t7_c25,
+	arm_r_r9_t7_c25,
+	arm_r_r10_t7_c25,
+	arm_r_r11_t7_c25,
+	arm_r_r12_t7_c25,
+	arm_r_r13_t7_c25,
+	arm_r_r14_t7_c25,
+	arm_r_r15_t7_c25,
+	arm_r_r0_t0_c26,
+	arm_r_r1_t0_c26,
+	arm_r_r2_t0_c26,
+	arm_r_r3_t0_c26,
+	arm_r_r4_t0_c26,
+	arm_r_r5_t0_c26,
+	arm_r_r6_t0_c26,
+	arm_r_r7_t0_c26,
+	arm_r_r8_t0_c26,
+	arm_r_r9_t0_c26,
+	arm_r_r10_t0_c26,
+	arm_r_r11_t0_c26,
+	arm_r_r12_t0_c26,
+	arm_r_r13_t0_c26,
+	arm_r_r14_t0_c26,
+	arm_r_r15_t0_c26,
+	arm_r_r0_t1_c26,
+	arm_r_r1_t1_c26,
+	arm_r_r2_t1_c26,
+	arm_r_r3_t1_c26,
+	arm_r_r4_t1_c26,
+	arm_r_r5_t1_c26,
+	arm_r_r6_t1_c26,
+	arm_r_r7_t1_c26,
+	arm_r_r8_t1_c26,
+	arm_r_r9_t1_c26,
+	arm_r_r10_t1_c26,
+	arm_r_r11_t1_c26,
+	arm_r_r12_t1_c26,
+	arm_r_r13_t1_c26,
+	arm_r_r14_t1_c26,
+	arm_r_r15_t1_c26,
+	arm_r_r0_t2_c26,
+	arm_r_r1_t2_c26,
+	arm_r_r2_t2_c26,
+	arm_r_r3_t2_c26,
+	arm_r_r4_t2_c26,
+	arm_r_r5_t2_c26,
+	arm_r_r6_t2_c26,
+	arm_r_r7_t2_c26,
+	arm_r_r8_t2_c26,
+	arm_r_r9_t2_c26,
+	arm_r_r10_t2_c26,
+	arm_r_r11_t2_c26,
+	arm_r_r12_t2_c26,
+	arm_r_r13_t2_c26,
+	arm_r_r14_t2_c26,
+	arm_r_r15_t2_c26,
+	arm_r_r0_t3_c26,
+	arm_r_r1_t3_c26,
+	arm_r_r2_t3_c26,
+	arm_r_r3_t3_c26,
+	arm_r_r4_t3_c26,
+	arm_r_r5_t3_c26,
+	arm_r_r6_t3_c26,
+	arm_r_r7_t3_c26,
+	arm_r_r8_t3_c26,
+	arm_r_r9_t3_c26,
+	arm_r_r10_t3_c26,
+	arm_r_r11_t3_c26,
+	arm_r_r12_t3_c26,
+	arm_r_r13_t3_c26,
+	arm_r_r14_t3_c26,
+	arm_r_r15_t3_c26,
+	arm_r_r0_t4_c26,
+	arm_r_r1_t4_c26,
+	arm_r_r2_t4_c26,
+	arm_r_r3_t4_c26,
+	arm_r_r4_t4_c26,
+	arm_r_r5_t4_c26,
+	arm_r_r6_t4_c26,
+	arm_r_r7_t4_c26,
+	arm_r_r8_t4_c26,
+	arm_r_r9_t4_c26,
+	arm_r_r10_t4_c26,
+	arm_r_r11_t4_c26,
+	arm_r_r12_t4_c26,
+	arm_r_r13_t4_c26,
+	arm_r_r14_t4_c26,
+	arm_r_r15_t4_c26,
+	arm_r_r0_t5_c26,
+	arm_r_r1_t5_c26,
+	arm_r_r2_t5_c26,
+	arm_r_r3_t5_c26,
+	arm_r_r4_t5_c26,
+	arm_r_r5_t5_c26,
+	arm_r_r6_t5_c26,
+	arm_r_r7_t5_c26,
+	arm_r_r8_t5_c26,
+	arm_r_r9_t5_c26,
+	arm_r_r10_t5_c26,
+	arm_r_r11_t5_c26,
+	arm_r_r12_t5_c26,
+	arm_r_r13_t5_c26,
+	arm_r_r14_t5_c26,
+	arm_r_r15_t5_c26,
+	arm_r_r0_t6_c26,
+	arm_r_r1_t6_c26,
+	arm_r_r2_t6_c26,
+	arm_r_r3_t6_c26,
+	arm_r_r4_t6_c26,
+	arm_r_r5_t6_c26,
+	arm_r_r6_t6_c26,
+	arm_r_r7_t6_c26,
+	arm_r_r8_t6_c26,
+	arm_r_r9_t6_c26,
+	arm_r_r10_t6_c26,
+	arm_r_r11_t6_c26,
+	arm_r_r12_t6_c26,
+	arm_r_r13_t6_c26,
+	arm_r_r14_t6_c26,
+	arm_r_r15_t6_c26,
+	arm_r_r0_t7_c26,
+	arm_r_r1_t7_c26,
+	arm_r_r2_t7_c26,
+	arm_r_r3_t7_c26,
+	arm_r_r4_t7_c26,
+	arm_r_r5_t7_c26,
+	arm_r_r6_t7_c26,
+	arm_r_r7_t7_c26,
+	arm_r_r8_t7_c26,
+	arm_r_r9_t7_c26,
+	arm_r_r10_t7_c26,
+	arm_r_r11_t7_c26,
+	arm_r_r12_t7_c26,
+	arm_r_r13_t7_c26,
+	arm_r_r14_t7_c26,
+	arm_r_r15_t7_c26,
+	arm_r_r0_t0_c27,
+	arm_r_r1_t0_c27,
+	arm_r_r2_t0_c27,
+	arm_r_r3_t0_c27,
+	arm_r_r4_t0_c27,
+	arm_r_r5_t0_c27,
+	arm_r_r6_t0_c27,
+	arm_r_r7_t0_c27,
+	arm_r_r8_t0_c27,
+	arm_r_r9_t0_c27,
+	arm_r_r10_t0_c27,
+	arm_r_r11_t0_c27,
+	arm_r_r12_t0_c27,
+	arm_r_r13_t0_c27,
+	arm_r_r14_t0_c27,
+	arm_r_r15_t0_c27,
+	arm_r_r0_t1_c27,
+	arm_r_r1_t1_c27,
+	arm_r_r2_t1_c27,
+	arm_r_r3_t1_c27,
+	arm_r_r4_t1_c27,
+	arm_r_r5_t1_c27,
+	arm_r_r6_t1_c27,
+	arm_r_r7_t1_c27,
+	arm_r_r8_t1_c27,
+	arm_r_r9_t1_c27,
+	arm_r_r10_t1_c27,
+	arm_r_r11_t1_c27,
+	arm_r_r12_t1_c27,
+	arm_r_r13_t1_c27,
+	arm_r_r14_t1_c27,
+	arm_r_r15_t1_c27,
+	arm_r_r0_t2_c27,
+	arm_r_r1_t2_c27,
+	arm_r_r2_t2_c27,
+	arm_r_r3_t2_c27,
+	arm_r_r4_t2_c27,
+	arm_r_r5_t2_c27,
+	arm_r_r6_t2_c27,
+	arm_r_r7_t2_c27,
+	arm_r_r8_t2_c27,
+	arm_r_r9_t2_c27,
+	arm_r_r10_t2_c27,
+	arm_r_r11_t2_c27,
+	arm_r_r12_t2_c27,
+	arm_r_r13_t2_c27,
+	arm_r_r14_t2_c27,
+	arm_r_r15_t2_c27,
+	arm_r_r0_t3_c27,
+	arm_r_r1_t3_c27,
+	arm_r_r2_t3_c27,
+	arm_r_r3_t3_c27,
+	arm_r_r4_t3_c27,
+	arm_r_r5_t3_c27,
+	arm_r_r6_t3_c27,
+	arm_r_r7_t3_c27,
+	arm_r_r8_t3_c27,
+	arm_r_r9_t3_c27,
+	arm_r_r10_t3_c27,
+	arm_r_r11_t3_c27,
+	arm_r_r12_t3_c27,
+	arm_r_r13_t3_c27,
+	arm_r_r14_t3_c27,
+	arm_r_r15_t3_c27,
+	arm_r_r0_t4_c27,
+	arm_r_r1_t4_c27,
+	arm_r_r2_t4_c27,
+	arm_r_r3_t4_c27,
+	arm_r_r4_t4_c27,
+	arm_r_r5_t4_c27,
+	arm_r_r6_t4_c27,
+	arm_r_r7_t4_c27,
+	arm_r_r8_t4_c27,
+	arm_r_r9_t4_c27,
+	arm_r_r10_t4_c27,
+	arm_r_r11_t4_c27,
+	arm_r_r12_t4_c27,
+	arm_r_r13_t4_c27,
+	arm_r_r14_t4_c27,
+	arm_r_r15_t4_c27,
+	arm_r_r0_t5_c27,
+	arm_r_r1_t5_c27,
+	arm_r_r2_t5_c27,
+	arm_r_r3_t5_c27,
+	arm_r_r4_t5_c27,
+	arm_r_r5_t5_c27,
+	arm_r_r6_t5_c27,
+	arm_r_r7_t5_c27,
+	arm_r_r8_t5_c27,
+	arm_r_r9_t5_c27,
+	arm_r_r10_t5_c27,
+	arm_r_r11_t5_c27,
+	arm_r_r12_t5_c27,
+	arm_r_r13_t5_c27,
+	arm_r_r14_t5_c27,
+	arm_r_r15_t5_c27,
+	arm_r_r0_t6_c27,
+	arm_r_r1_t6_c27,
+	arm_r_r2_t6_c27,
+	arm_r_r3_t6_c27,
+	arm_r_r4_t6_c27,
+	arm_r_r5_t6_c27,
+	arm_r_r6_t6_c27,
+	arm_r_r7_t6_c27,
+	arm_r_r8_t6_c27,
+	arm_r_r9_t6_c27,
+	arm_r_r10_t6_c27,
+	arm_r_r11_t6_c27,
+	arm_r_r12_t6_c27,
+	arm_r_r13_t6_c27,
+	arm_r_r14_t6_c27,
+	arm_r_r15_t6_c27,
+	arm_r_r0_t7_c27,
+	arm_r_r1_t7_c27,
+	arm_r_r2_t7_c27,
+	arm_r_r3_t7_c27,
+	arm_r_r4_t7_c27,
+	arm_r_r5_t7_c27,
+	arm_r_r6_t7_c27,
+	arm_r_r7_t7_c27,
+	arm_r_r8_t7_c27,
+	arm_r_r9_t7_c27,
+	arm_r_r10_t7_c27,
+	arm_r_r11_t7_c27,
+	arm_r_r12_t7_c27,
+	arm_r_r13_t7_c27,
+	arm_r_r14_t7_c27,
+	arm_r_r15_t7_c27,
+	arm_r_r0_t0_c28,
+	arm_r_r1_t0_c28,
+	arm_r_r2_t0_c28,
+	arm_r_r3_t0_c28,
+	arm_r_r4_t0_c28,
+	arm_r_r5_t0_c28,
+	arm_r_r6_t0_c28,
+	arm_r_r7_t0_c28,
+	arm_r_r8_t0_c28,
+	arm_r_r9_t0_c28,
+	arm_r_r10_t0_c28,
+	arm_r_r11_t0_c28,
+	arm_r_r12_t0_c28,
+	arm_r_r13_t0_c28,
+	arm_r_r14_t0_c28,
+	arm_r_r15_t0_c28,
+	arm_r_r0_t1_c28,
+	arm_r_r1_t1_c28,
+	arm_r_r2_t1_c28,
+	arm_r_r3_t1_c28,
+	arm_r_r4_t1_c28,
+	arm_r_r5_t1_c28,
+	arm_r_r6_t1_c28,
+	arm_r_r7_t1_c28,
+	arm_r_r8_t1_c28,
+	arm_r_r9_t1_c28,
+	arm_r_r10_t1_c28,
+	arm_r_r11_t1_c28,
+	arm_r_r12_t1_c28,
+	arm_r_r13_t1_c28,
+	arm_r_r14_t1_c28,
+	arm_r_r15_t1_c28,
+	arm_r_r0_t2_c28,
+	arm_r_r1_t2_c28,
+	arm_r_r2_t2_c28,
+	arm_r_r3_t2_c28,
+	arm_r_r4_t2_c28,
+	arm_r_r5_t2_c28,
+	arm_r_r6_t2_c28,
+	arm_r_r7_t2_c28,
+	arm_r_r8_t2_c28,
+	arm_r_r9_t2_c28,
+	arm_r_r10_t2_c28,
+	arm_r_r11_t2_c28,
+	arm_r_r12_t2_c28,
+	arm_r_r13_t2_c28,
+	arm_r_r14_t2_c28,
+	arm_r_r15_t2_c28,
+	arm_r_r0_t3_c28,
+	arm_r_r1_t3_c28,
+	arm_r_r2_t3_c28,
+	arm_r_r3_t3_c28,
+	arm_r_r4_t3_c28,
+	arm_r_r5_t3_c28,
+	arm_r_r6_t3_c28,
+	arm_r_r7_t3_c28,
+	arm_r_r8_t3_c28,
+	arm_r_r9_t3_c28,
+	arm_r_r10_t3_c28,
+	arm_r_r11_t3_c28,
+	arm_r_r12_t3_c28,
+	arm_r_r13_t3_c28,
+	arm_r_r14_t3_c28,
+	arm_r_r15_t3_c28,
+	arm_r_r0_t4_c28,
+	arm_r_r1_t4_c28,
+	arm_r_r2_t4_c28,
+	arm_r_r3_t4_c28,
+	arm_r_r4_t4_c28,
+	arm_r_r5_t4_c28,
+	arm_r_r6_t4_c28,
+	arm_r_r7_t4_c28,
+	arm_r_r8_t4_c28,
+	arm_r_r9_t4_c28,
+	arm_r_r10_t4_c28,
+	arm_r_r11_t4_c28,
+	arm_r_r12_t4_c28,
+	arm_r_r13_t4_c28,
+	arm_r_r14_t4_c28,
+	arm_r_r15_t4_c28,
+	arm_r_r0_t5_c28,
+	arm_r_r1_t5_c28,
+	arm_r_r2_t5_c28,
+	arm_r_r3_t5_c28,
+	arm_r_r4_t5_c28,
+	arm_r_r5_t5_c28,
+	arm_r_r6_t5_c28,
+	arm_r_r7_t5_c28,
+	arm_r_r8_t5_c28,
+	arm_r_r9_t5_c28,
+	arm_r_r10_t5_c28,
+	arm_r_r11_t5_c28,
+	arm_r_r12_t5_c28,
+	arm_r_r13_t5_c28,
+	arm_r_r14_t5_c28,
+	arm_r_r15_t5_c28,
+	arm_r_r0_t6_c28,
+	arm_r_r1_t6_c28,
+	arm_r_r2_t6_c28,
+	arm_r_r3_t6_c28,
+	arm_r_r4_t6_c28,
+	arm_r_r5_t6_c28,
+	arm_r_r6_t6_c28,
+	arm_r_r7_t6_c28,
+	arm_r_r8_t6_c28,
+	arm_r_r9_t6_c28,
+	arm_r_r10_t6_c28,
+	arm_r_r11_t6_c28,
+	arm_r_r12_t6_c28,
+	arm_r_r13_t6_c28,
+	arm_r_r14_t6_c28,
+	arm_r_r15_t6_c28,
+	arm_r_r0_t7_c28,
+	arm_r_r1_t7_c28,
+	arm_r_r2_t7_c28,
+	arm_r_r3_t7_c28,
+	arm_r_r4_t7_c28,
+	arm_r_r5_t7_c28,
+	arm_r_r6_t7_c28,
+	arm_r_r7_t7_c28,
+	arm_r_r8_t7_c28,
+	arm_r_r9_t7_c28,
+	arm_r_r10_t7_c28,
+	arm_r_r11_t7_c28,
+	arm_r_r12_t7_c28,
+	arm_r_r13_t7_c28,
+	arm_r_r14_t7_c28,
+	arm_r_r15_t7_c28,
+	arm_r_r0_t0_c29,
+	arm_r_r1_t0_c29,
+	arm_r_r2_t0_c29,
+	arm_r_r3_t0_c29,
+	arm_r_r4_t0_c29,
+	arm_r_r5_t0_c29,
+	arm_r_r6_t0_c29,
+	arm_r_r7_t0_c29,
+	arm_r_r8_t0_c29,
+	arm_r_r9_t0_c29,
+	arm_r_r10_t0_c29,
+	arm_r_r11_t0_c29,
+	arm_r_r12_t0_c29,
+	arm_r_r13_t0_c29,
+	arm_r_r14_t0_c29,
+	arm_r_r15_t0_c29,
+	arm_r_r0_t1_c29,
+	arm_r_r1_t1_c29,
+	arm_r_r2_t1_c29,
+	arm_r_r3_t1_c29,
+	arm_r_r4_t1_c29,
+	arm_r_r5_t1_c29,
+	arm_r_r6_t1_c29,
+	arm_r_r7_t1_c29,
+	arm_r_r8_t1_c29,
+	arm_r_r9_t1_c29,
+	arm_r_r10_t1_c29,
+	arm_r_r11_t1_c29,
+	arm_r_r12_t1_c29,
+	arm_r_r13_t1_c29,
+	arm_r_r14_t1_c29,
+	arm_r_r15_t1_c29,
+	arm_r_r0_t2_c29,
+	arm_r_r1_t2_c29,
+	arm_r_r2_t2_c29,
+	arm_r_r3_t2_c29,
+	arm_r_r4_t2_c29,
+	arm_r_r5_t2_c29,
+	arm_r_r6_t2_c29,
+	arm_r_r7_t2_c29,
+	arm_r_r8_t2_c29,
+	arm_r_r9_t2_c29,
+	arm_r_r10_t2_c29,
+	arm_r_r11_t2_c29,
+	arm_r_r12_t2_c29,
+	arm_r_r13_t2_c29,
+	arm_r_r14_t2_c29,
+	arm_r_r15_t2_c29,
+	arm_r_r0_t3_c29,
+	arm_r_r1_t3_c29,
+	arm_r_r2_t3_c29,
+	arm_r_r3_t3_c29,
+	arm_r_r4_t3_c29,
+	arm_r_r5_t3_c29,
+	arm_r_r6_t3_c29,
+	arm_r_r7_t3_c29,
+	arm_r_r8_t3_c29,
+	arm_r_r9_t3_c29,
+	arm_r_r10_t3_c29,
+	arm_r_r11_t3_c29,
+	arm_r_r12_t3_c29,
+	arm_r_r13_t3_c29,
+	arm_r_r14_t3_c29,
+	arm_r_r15_t3_c29,
+	arm_r_r0_t4_c29,
+	arm_r_r1_t4_c29,
+	arm_r_r2_t4_c29,
+	arm_r_r3_t4_c29,
+	arm_r_r4_t4_c29,
+	arm_r_r5_t4_c29,
+	arm_r_r6_t4_c29,
+	arm_r_r7_t4_c29,
+	arm_r_r8_t4_c29,
+	arm_r_r9_t4_c29,
+	arm_r_r10_t4_c29,
+	arm_r_r11_t4_c29,
+	arm_r_r12_t4_c29,
+	arm_r_r13_t4_c29,
+	arm_r_r14_t4_c29,
+	arm_r_r15_t4_c29,
+	arm_r_r0_t5_c29,
+	arm_r_r1_t5_c29,
+	arm_r_r2_t5_c29,
+	arm_r_r3_t5_c29,
+	arm_r_r4_t5_c29,
+	arm_r_r5_t5_c29,
+	arm_r_r6_t5_c29,
+	arm_r_r7_t5_c29,
+	arm_r_r8_t5_c29,
+	arm_r_r9_t5_c29,
+	arm_r_r10_t5_c29,
+	arm_r_r11_t5_c29,
+	arm_r_r12_t5_c29,
+	arm_r_r13_t5_c29,
+	arm_r_r14_t5_c29,
+	arm_r_r15_t5_c29,
+	arm_r_r0_t6_c29,
+	arm_r_r1_t6_c29,
+	arm_r_r2_t6_c29,
+	arm_r_r3_t6_c29,
+	arm_r_r4_t6_c29,
+	arm_r_r5_t6_c29,
+	arm_r_r6_t6_c29,
+	arm_r_r7_t6_c29,
+	arm_r_r8_t6_c29,
+	arm_r_r9_t6_c29,
+	arm_r_r10_t6_c29,
+	arm_r_r11_t6_c29,
+	arm_r_r12_t6_c29,
+	arm_r_r13_t6_c29,
+	arm_r_r14_t6_c29,
+	arm_r_r15_t6_c29,
+	arm_r_r0_t7_c29,
+	arm_r_r1_t7_c29,
+	arm_r_r2_t7_c29,
+	arm_r_r3_t7_c29,
+	arm_r_r4_t7_c29,
+	arm_r_r5_t7_c29,
+	arm_r_r6_t7_c29,
+	arm_r_r7_t7_c29,
+	arm_r_r8_t7_c29,
+	arm_r_r9_t7_c29,
+	arm_r_r10_t7_c29,
+	arm_r_r11_t7_c29,
+	arm_r_r12_t7_c29,
+	arm_r_r13_t7_c29,
+	arm_r_r14_t7_c29,
+	arm_r_r15_t7_c29,
+	arm_r_r0_t0_c30,
+	arm_r_r1_t0_c30,
+	arm_r_r2_t0_c30,
+	arm_r_r3_t0_c30,
+	arm_r_r4_t0_c30,
+	arm_r_r5_t0_c30,
+	arm_r_r6_t0_c30,
+	arm_r_r7_t0_c30,
+	arm_r_r8_t0_c30,
+	arm_r_r9_t0_c30,
+	arm_r_r10_t0_c30,
+	arm_r_r11_t0_c30,
+	arm_r_r12_t0_c30,
+	arm_r_r13_t0_c30,
+	arm_r_r14_t0_c30,
+	arm_r_r15_t0_c30,
+	arm_r_r0_t1_c30,
+	arm_r_r1_t1_c30,
+	arm_r_r2_t1_c30,
+	arm_r_r3_t1_c30,
+	arm_r_r4_t1_c30,
+	arm_r_r5_t1_c30,
+	arm_r_r6_t1_c30,
+	arm_r_r7_t1_c30,
+	arm_r_r8_t1_c30,
+	arm_r_r9_t1_c30,
+	arm_r_r10_t1_c30,
+	arm_r_r11_t1_c30,
+	arm_r_r12_t1_c30,
+	arm_r_r13_t1_c30,
+	arm_r_r14_t1_c30,
+	arm_r_r15_t1_c30,
+	arm_r_r0_t2_c30,
+	arm_r_r1_t2_c30,
+	arm_r_r2_t2_c30,
+	arm_r_r3_t2_c30,
+	arm_r_r4_t2_c30,
+	arm_r_r5_t2_c30,
+	arm_r_r6_t2_c30,
+	arm_r_r7_t2_c30,
+	arm_r_r8_t2_c30,
+	arm_r_r9_t2_c30,
+	arm_r_r10_t2_c30,
+	arm_r_r11_t2_c30,
+	arm_r_r12_t2_c30,
+	arm_r_r13_t2_c30,
+	arm_r_r14_t2_c30,
+	arm_r_r15_t2_c30,
+	arm_r_r0_t3_c30,
+	arm_r_r1_t3_c30,
+	arm_r_r2_t3_c30,
+	arm_r_r3_t3_c30,
+	arm_r_r4_t3_c30,
+	arm_r_r5_t3_c30,
+	arm_r_r6_t3_c30,
+	arm_r_r7_t3_c30,
+	arm_r_r8_t3_c30,
+	arm_r_r9_t3_c30,
+	arm_r_r10_t3_c30,
+	arm_r_r11_t3_c30,
+	arm_r_r12_t3_c30,
+	arm_r_r13_t3_c30,
+	arm_r_r14_t3_c30,
+	arm_r_r15_t3_c30,
+	arm_r_r0_t4_c30,
+	arm_r_r1_t4_c30,
+	arm_r_r2_t4_c30,
+	arm_r_r3_t4_c30,
+	arm_r_r4_t4_c30,
+	arm_r_r5_t4_c30,
+	arm_r_r6_t4_c30,
+	arm_r_r7_t4_c30,
+	arm_r_r8_t4_c30,
+	arm_r_r9_t4_c30,
+	arm_r_r10_t4_c30,
+	arm_r_r11_t4_c30,
+	arm_r_r12_t4_c30,
+	arm_r_r13_t4_c30,
+	arm_r_r14_t4_c30,
+	arm_r_r15_t4_c30,
+	arm_r_r0_t5_c30,
+	arm_r_r1_t5_c30,
+	arm_r_r2_t5_c30,
+	arm_r_r3_t5_c30,
+	arm_r_r4_t5_c30,
+	arm_r_r5_t5_c30,
+	arm_r_r6_t5_c30,
+	arm_r_r7_t5_c30,
+	arm_r_r8_t5_c30,
+	arm_r_r9_t5_c30,
+	arm_r_r10_t5_c30,
+	arm_r_r11_t5_c30,
+	arm_r_r12_t5_c30,
+	arm_r_r13_t5_c30,
+	arm_r_r14_t5_c30,
+	arm_r_r15_t5_c30,
+	arm_r_r0_t6_c30,
+	arm_r_r1_t6_c30,
+	arm_r_r2_t6_c30,
+	arm_r_r3_t6_c30,
+	arm_r_r4_t6_c30,
+	arm_r_r5_t6_c30,
+	arm_r_r6_t6_c30,
+	arm_r_r7_t6_c30,
+	arm_r_r8_t6_c30,
+	arm_r_r9_t6_c30,
+	arm_r_r10_t6_c30,
+	arm_r_r11_t6_c30,
+	arm_r_r12_t6_c30,
+	arm_r_r13_t6_c30,
+	arm_r_r14_t6_c30,
+	arm_r_r15_t6_c30,
+	arm_r_r0_t7_c30,
+	arm_r_r1_t7_c30,
+	arm_r_r2_t7_c30,
+	arm_r_r3_t7_c30,
+	arm_r_r4_t7_c30,
+	arm_r_r5_t7_c30,
+	arm_r_r6_t7_c30,
+	arm_r_r7_t7_c30,
+	arm_r_r8_t7_c30,
+	arm_r_r9_t7_c30,
+	arm_r_r10_t7_c30,
+	arm_r_r11_t7_c30,
+	arm_r_r12_t7_c30,
+	arm_r_r13_t7_c30,
+	arm_r_r14_t7_c30,
+	arm_r_r15_t7_c30,
+	arm_r_r0_t0_c31,
+	arm_r_r1_t0_c31,
+	arm_r_r2_t0_c31,
+	arm_r_r3_t0_c31,
+	arm_r_r4_t0_c31,
+	arm_r_r5_t0_c31,
+	arm_r_r6_t0_c31,
+	arm_r_r7_t0_c31,
+	arm_r_r8_t0_c31,
+	arm_r_r9_t0_c31,
+	arm_r_r10_t0_c31,
+	arm_r_r11_t0_c31,
+	arm_r_r12_t0_c31,
+	arm_r_r13_t0_c31,
+	arm_r_r14_t0_c31,
+	arm_r_r15_t0_c31,
+	arm_r_r0_t1_c31,
+	arm_r_r1_t1_c31,
+	arm_r_r2_t1_c31,
+	arm_r_r3_t1_c31,
+	arm_r_r4_t1_c31,
+	arm_r_r5_t1_c31,
+	arm_r_r6_t1_c31,
+	arm_r_r7_t1_c31,
+	arm_r_r8_t1_c31,
+	arm_r_r9_t1_c31,
+	arm_r_r10_t1_c31,
+	arm_r_r11_t1_c31,
+	arm_r_r12_t1_c31,
+	arm_r_r13_t1_c31,
+	arm_r_r14_t1_c31,
+	arm_r_r15_t1_c31,
+	arm_r_r0_t2_c31,
+	arm_r_r1_t2_c31,
+	arm_r_r2_t2_c31,
+	arm_r_r3_t2_c31,
+	arm_r_r4_t2_c31,
+	arm_r_r5_t2_c31,
+	arm_r_r6_t2_c31,
+	arm_r_r7_t2_c31,
+	arm_r_r8_t2_c31,
+	arm_r_r9_t2_c31,
+	arm_r_r10_t2_c31,
+	arm_r_r11_t2_c31,
+	arm_r_r12_t2_c31,
+	arm_r_r13_t2_c31,
+	arm_r_r14_t2_c31,
+	arm_r_r15_t2_c31,
+	arm_r_r0_t3_c31,
+	arm_r_r1_t3_c31,
+	arm_r_r2_t3_c31,
+	arm_r_r3_t3_c31,
+	arm_r_r4_t3_c31,
+	arm_r_r5_t3_c31,
+	arm_r_r6_t3_c31,
+	arm_r_r7_t3_c31,
+	arm_r_r8_t3_c31,
+	arm_r_r9_t3_c31,
+	arm_r_r10_t3_c31,
+	arm_r_r11_t3_c31,
+	arm_r_r12_t3_c31,
+	arm_r_r13_t3_c31,
+	arm_r_r14_t3_c31,
+	arm_r_r15_t3_c31,
+	arm_r_r0_t4_c31,
+	arm_r_r1_t4_c31,
+	arm_r_r2_t4_c31,
+	arm_r_r3_t4_c31,
+	arm_r_r4_t4_c31,
+	arm_r_r5_t4_c31,
+	arm_r_r6_t4_c31,
+	arm_r_r7_t4_c31,
+	arm_r_r8_t4_c31,
+	arm_r_r9_t4_c31,
+	arm_r_r10_t4_c31,
+	arm_r_r11_t4_c31,
+	arm_r_r12_t4_c31,
+	arm_r_r13_t4_c31,
+	arm_r_r14_t4_c31,
+	arm_r_r15_t4_c31,
+	arm_r_r0_t5_c31,
+	arm_r_r1_t5_c31,
+	arm_r_r2_t5_c31,
+	arm_r_r3_t5_c31,
+	arm_r_r4_t5_c31,
+	arm_r_r5_t5_c31,
+	arm_r_r6_t5_c31,
+	arm_r_r7_t5_c31,
+	arm_r_r8_t5_c31,
+	arm_r_r9_t5_c31,
+	arm_r_r10_t5_c31,
+	arm_r_r11_t5_c31,
+	arm_r_r12_t5_c31,
+	arm_r_r13_t5_c31,
+	arm_r_r14_t5_c31,
+	arm_r_r15_t5_c31,
+	arm_r_r0_t6_c31,
+	arm_r_r1_t6_c31,
+	arm_r_r2_t6_c31,
+	arm_r_r3_t6_c31,
+	arm_r_r4_t6_c31,
+	arm_r_r5_t6_c31,
+	arm_r_r6_t6_c31,
+	arm_r_r7_t6_c31,
+	arm_r_r8_t6_c31,
+	arm_r_r9_t6_c31,
+	arm_r_r10_t6_c31,
+	arm_r_r11_t6_c31,
+	arm_r_r12_t6_c31,
+	arm_r_r13_t6_c31,
+	arm_r_r14_t6_c31,
+	arm_r_r15_t6_c31,
+	arm_r_r0_t7_c31,
+	arm_r_r1_t7_c31,
+	arm_r_r2_t7_c31,
+	arm_r_r3_t7_c31,
+	arm_r_r4_t7_c31,
+	arm_r_r5_t7_c31,
+	arm_r_r6_t7_c31,
+	arm_r_r7_t7_c31,
+	arm_r_r8_t7_c31,
+	arm_r_r9_t7_c31,
+	arm_r_r10_t7_c31,
+	arm_r_r11_t7_c31,
+	arm_r_r12_t7_c31,
+	arm_r_r13_t7_c31,
+	arm_r_r14_t7_c31,
+	arm_r_r15_t7_c31,
+	arm_rs_r0_t0_c0,
+	arm_rs_r1_t0_c0,
+	arm_rs_r2_t0_c0,
+	arm_rs_r3_t0_c0,
+	arm_rs_r4_t0_c0,
+	arm_rs_r5_t0_c0,
+	arm_rs_r6_t0_c0,
+	arm_rs_r7_t0_c0,
+	arm_rs_r8_t0_c0,
+	arm_rs_r9_t0_c0,
+	arm_rs_r10_t0_c0,
+	arm_rs_r11_t0_c0,
+	arm_rs_r12_t0_c0,
+	arm_rs_r13_t0_c0,
+	arm_rs_r14_t0_c0,
+	arm_rs_r15_t0_c0,
+	arm_rs_r0_t1_c0,
+	arm_rs_r1_t1_c0,
+	arm_rs_r2_t1_c0,
+	arm_rs_r3_t1_c0,
+	arm_rs_r4_t1_c0,
+	arm_rs_r5_t1_c0,
+	arm_rs_r6_t1_c0,
+	arm_rs_r7_t1_c0,
+	arm_rs_r8_t1_c0,
+	arm_rs_r9_t1_c0,
+	arm_rs_r10_t1_c0,
+	arm_rs_r11_t1_c0,
+	arm_rs_r12_t1_c0,
+	arm_rs_r13_t1_c0,
+	arm_rs_r14_t1_c0,
+	arm_rs_r15_t1_c0,
+	arm_rs_r0_t2_c0,
+	arm_rs_r1_t2_c0,
+	arm_rs_r2_t2_c0,
+	arm_rs_r3_t2_c0,
+	arm_rs_r4_t2_c0,
+	arm_rs_r5_t2_c0,
+	arm_rs_r6_t2_c0,
+	arm_rs_r7_t2_c0,
+	arm_rs_r8_t2_c0,
+	arm_rs_r9_t2_c0,
+	arm_rs_r10_t2_c0,
+	arm_rs_r11_t2_c0,
+	arm_rs_r12_t2_c0,
+	arm_rs_r13_t2_c0,
+	arm_rs_r14_t2_c0,
+	arm_rs_r15_t2_c0,
+	arm_rs_r0_t3_c0,
+	arm_rs_r1_t3_c0,
+	arm_rs_r2_t3_c0,
+	arm_rs_r3_t3_c0,
+	arm_rs_r4_t3_c0,
+	arm_rs_r5_t3_c0,
+	arm_rs_r6_t3_c0,
+	arm_rs_r7_t3_c0,
+	arm_rs_r8_t3_c0,
+	arm_rs_r9_t3_c0,
+	arm_rs_r10_t3_c0,
+	arm_rs_r11_t3_c0,
+	arm_rs_r12_t3_c0,
+	arm_rs_r13_t3_c0,
+	arm_rs_r14_t3_c0,
+	arm_rs_r15_t3_c0,
+	arm_rs_r0_t4_c0,
+	arm_rs_r1_t4_c0,
+	arm_rs_r2_t4_c0,
+	arm_rs_r3_t4_c0,
+	arm_rs_r4_t4_c0,
+	arm_rs_r5_t4_c0,
+	arm_rs_r6_t4_c0,
+	arm_rs_r7_t4_c0,
+	arm_rs_r8_t4_c0,
+	arm_rs_r9_t4_c0,
+	arm_rs_r10_t4_c0,
+	arm_rs_r11_t4_c0,
+	arm_rs_r12_t4_c0,
+	arm_rs_r13_t4_c0,
+	arm_rs_r14_t4_c0,
+	arm_rs_r15_t4_c0,
+	arm_rs_r0_t5_c0,
+	arm_rs_r1_t5_c0,
+	arm_rs_r2_t5_c0,
+	arm_rs_r3_t5_c0,
+	arm_rs_r4_t5_c0,
+	arm_rs_r5_t5_c0,
+	arm_rs_r6_t5_c0,
+	arm_rs_r7_t5_c0,
+	arm_rs_r8_t5_c0,
+	arm_rs_r9_t5_c0,
+	arm_rs_r10_t5_c0,
+	arm_rs_r11_t5_c0,
+	arm_rs_r12_t5_c0,
+	arm_rs_r13_t5_c0,
+	arm_rs_r14_t5_c0,
+	arm_rs_r15_t5_c0,
+	arm_rs_r0_t6_c0,
+	arm_rs_r1_t6_c0,
+	arm_rs_r2_t6_c0,
+	arm_rs_r3_t6_c0,
+	arm_rs_r4_t6_c0,
+	arm_rs_r5_t6_c0,
+	arm_rs_r6_t6_c0,
+	arm_rs_r7_t6_c0,
+	arm_rs_r8_t6_c0,
+	arm_rs_r9_t6_c0,
+	arm_rs_r10_t6_c0,
+	arm_rs_r11_t6_c0,
+	arm_rs_r12_t6_c0,
+	arm_rs_r13_t6_c0,
+	arm_rs_r14_t6_c0,
+	arm_rs_r15_t6_c0,
+	arm_rs_r0_t7_c0,
+	arm_rs_r1_t7_c0,
+	arm_rs_r2_t7_c0,
+	arm_rs_r3_t7_c0,
+	arm_rs_r4_t7_c0,
+	arm_rs_r5_t7_c0,
+	arm_rs_r6_t7_c0,
+	arm_rs_r7_t7_c0,
+	arm_rs_r8_t7_c0,
+	arm_rs_r9_t7_c0,
+	arm_rs_r10_t7_c0,
+	arm_rs_r11_t7_c0,
+	arm_rs_r12_t7_c0,
+	arm_rs_r13_t7_c0,
+	arm_rs_r14_t7_c0,
+	arm_rs_r15_t7_c0,
+	arm_rs_r0_t0_c1,
+	arm_rs_r1_t0_c1,
+	arm_rs_r2_t0_c1,
+	arm_rs_r3_t0_c1,
+	arm_rs_r4_t0_c1,
+	arm_rs_r5_t0_c1,
+	arm_rs_r6_t0_c1,
+	arm_rs_r7_t0_c1,
+	arm_rs_r8_t0_c1,
+	arm_rs_r9_t0_c1,
+	arm_rs_r10_t0_c1,
+	arm_rs_r11_t0_c1,
+	arm_rs_r12_t0_c1,
+	arm_rs_r13_t0_c1,
+	arm_rs_r14_t0_c1,
+	arm_rs_r15_t0_c1,
+	arm_rs_r0_t1_c1,
+	arm_rs_r1_t1_c1,
+	arm_rs_r2_t1_c1,
+	arm_rs_r3_t1_c1,
+	arm_rs_r4_t1_c1,
+	arm_rs_r5_t1_c1,
+	arm_rs_r6_t1_c1,
+	arm_rs_r7_t1_c1,
+	arm_rs_r8_t1_c1,
+	arm_rs_r9_t1_c1,
+	arm_rs_r10_t1_c1,
+	arm_rs_r11_t1_c1,
+	arm_rs_r12_t1_c1,
+	arm_rs_r13_t1_c1,
+	arm_rs_r14_t1_c1,
+	arm_rs_r15_t1_c1,
+	arm_rs_r0_t2_c1,
+	arm_rs_r1_t2_c1,
+	arm_rs_r2_t2_c1,
+	arm_rs_r3_t2_c1,
+	arm_rs_r4_t2_c1,
+	arm_rs_r5_t2_c1,
+	arm_rs_r6_t2_c1,
+	arm_rs_r7_t2_c1,
+	arm_rs_r8_t2_c1,
+	arm_rs_r9_t2_c1,
+	arm_rs_r10_t2_c1,
+	arm_rs_r11_t2_c1,
+	arm_rs_r12_t2_c1,
+	arm_rs_r13_t2_c1,
+	arm_rs_r14_t2_c1,
+	arm_rs_r15_t2_c1,
+	arm_rs_r0_t3_c1,
+	arm_rs_r1_t3_c1,
+	arm_rs_r2_t3_c1,
+	arm_rs_r3_t3_c1,
+	arm_rs_r4_t3_c1,
+	arm_rs_r5_t3_c1,
+	arm_rs_r6_t3_c1,
+	arm_rs_r7_t3_c1,
+	arm_rs_r8_t3_c1,
+	arm_rs_r9_t3_c1,
+	arm_rs_r10_t3_c1,
+	arm_rs_r11_t3_c1,
+	arm_rs_r12_t3_c1,
+	arm_rs_r13_t3_c1,
+	arm_rs_r14_t3_c1,
+	arm_rs_r15_t3_c1,
+	arm_rs_r0_t4_c1,
+	arm_rs_r1_t4_c1,
+	arm_rs_r2_t4_c1,
+	arm_rs_r3_t4_c1,
+	arm_rs_r4_t4_c1,
+	arm_rs_r5_t4_c1,
+	arm_rs_r6_t4_c1,
+	arm_rs_r7_t4_c1,
+	arm_rs_r8_t4_c1,
+	arm_rs_r9_t4_c1,
+	arm_rs_r10_t4_c1,
+	arm_rs_r11_t4_c1,
+	arm_rs_r12_t4_c1,
+	arm_rs_r13_t4_c1,
+	arm_rs_r14_t4_c1,
+	arm_rs_r15_t4_c1,
+	arm_rs_r0_t5_c1,
+	arm_rs_r1_t5_c1,
+	arm_rs_r2_t5_c1,
+	arm_rs_r3_t5_c1,
+	arm_rs_r4_t5_c1,
+	arm_rs_r5_t5_c1,
+	arm_rs_r6_t5_c1,
+	arm_rs_r7_t5_c1,
+	arm_rs_r8_t5_c1,
+	arm_rs_r9_t5_c1,
+	arm_rs_r10_t5_c1,
+	arm_rs_r11_t5_c1,
+	arm_rs_r12_t5_c1,
+	arm_rs_r13_t5_c1,
+	arm_rs_r14_t5_c1,
+	arm_rs_r15_t5_c1,
+	arm_rs_r0_t6_c1,
+	arm_rs_r1_t6_c1,
+	arm_rs_r2_t6_c1,
+	arm_rs_r3_t6_c1,
+	arm_rs_r4_t6_c1,
+	arm_rs_r5_t6_c1,
+	arm_rs_r6_t6_c1,
+	arm_rs_r7_t6_c1,
+	arm_rs_r8_t6_c1,
+	arm_rs_r9_t6_c1,
+	arm_rs_r10_t6_c1,
+	arm_rs_r11_t6_c1,
+	arm_rs_r12_t6_c1,
+	arm_rs_r13_t6_c1,
+	arm_rs_r14_t6_c1,
+	arm_rs_r15_t6_c1,
+	arm_rs_r0_t7_c1,
+	arm_rs_r1_t7_c1,
+	arm_rs_r2_t7_c1,
+	arm_rs_r3_t7_c1,
+	arm_rs_r4_t7_c1,
+	arm_rs_r5_t7_c1,
+	arm_rs_r6_t7_c1,
+	arm_rs_r7_t7_c1,
+	arm_rs_r8_t7_c1,
+	arm_rs_r9_t7_c1,
+	arm_rs_r10_t7_c1,
+	arm_rs_r11_t7_c1,
+	arm_rs_r12_t7_c1,
+	arm_rs_r13_t7_c1,
+	arm_rs_r14_t7_c1,
+	arm_rs_r15_t7_c1,
+	arm_rs_r0_t0_c2,
+	arm_rs_r1_t0_c2,
+	arm_rs_r2_t0_c2,
+	arm_rs_r3_t0_c2,
+	arm_rs_r4_t0_c2,
+	arm_rs_r5_t0_c2,
+	arm_rs_r6_t0_c2,
+	arm_rs_r7_t0_c2,
+	arm_rs_r8_t0_c2,
+	arm_rs_r9_t0_c2,
+	arm_rs_r10_t0_c2,
+	arm_rs_r11_t0_c2,
+	arm_rs_r12_t0_c2,
+	arm_rs_r13_t0_c2,
+	arm_rs_r14_t0_c2,
+	arm_rs_r15_t0_c2,
+	arm_rs_r0_t1_c2,
+	arm_rs_r1_t1_c2,
+	arm_rs_r2_t1_c2,
+	arm_rs_r3_t1_c2,
+	arm_rs_r4_t1_c2,
+	arm_rs_r5_t1_c2,
+	arm_rs_r6_t1_c2,
+	arm_rs_r7_t1_c2,
+	arm_rs_r8_t1_c2,
+	arm_rs_r9_t1_c2,
+	arm_rs_r10_t1_c2,
+	arm_rs_r11_t1_c2,
+	arm_rs_r12_t1_c2,
+	arm_rs_r13_t1_c2,
+	arm_rs_r14_t1_c2,
+	arm_rs_r15_t1_c2,
+	arm_rs_r0_t2_c2,
+	arm_rs_r1_t2_c2,
+	arm_rs_r2_t2_c2,
+	arm_rs_r3_t2_c2,
+	arm_rs_r4_t2_c2,
+	arm_rs_r5_t2_c2,
+	arm_rs_r6_t2_c2,
+	arm_rs_r7_t2_c2,
+	arm_rs_r8_t2_c2,
+	arm_rs_r9_t2_c2,
+	arm_rs_r10_t2_c2,
+	arm_rs_r11_t2_c2,
+	arm_rs_r12_t2_c2,
+	arm_rs_r13_t2_c2,
+	arm_rs_r14_t2_c2,
+	arm_rs_r15_t2_c2,
+	arm_rs_r0_t3_c2,
+	arm_rs_r1_t3_c2,
+	arm_rs_r2_t3_c2,
+	arm_rs_r3_t3_c2,
+	arm_rs_r4_t3_c2,
+	arm_rs_r5_t3_c2,
+	arm_rs_r6_t3_c2,
+	arm_rs_r7_t3_c2,
+	arm_rs_r8_t3_c2,
+	arm_rs_r9_t3_c2,
+	arm_rs_r10_t3_c2,
+	arm_rs_r11_t3_c2,
+	arm_rs_r12_t3_c2,
+	arm_rs_r13_t3_c2,
+	arm_rs_r14_t3_c2,
+	arm_rs_r15_t3_c2,
+	arm_rs_r0_t4_c2,
+	arm_rs_r1_t4_c2,
+	arm_rs_r2_t4_c2,
+	arm_rs_r3_t4_c2,
+	arm_rs_r4_t4_c2,
+	arm_rs_r5_t4_c2,
+	arm_rs_r6_t4_c2,
+	arm_rs_r7_t4_c2,
+	arm_rs_r8_t4_c2,
+	arm_rs_r9_t4_c2,
+	arm_rs_r10_t4_c2,
+	arm_rs_r11_t4_c2,
+	arm_rs_r12_t4_c2,
+	arm_rs_r13_t4_c2,
+	arm_rs_r14_t4_c2,
+	arm_rs_r15_t4_c2,
+	arm_rs_r0_t5_c2,
+	arm_rs_r1_t5_c2,
+	arm_rs_r2_t5_c2,
+	arm_rs_r3_t5_c2,
+	arm_rs_r4_t5_c2,
+	arm_rs_r5_t5_c2,
+	arm_rs_r6_t5_c2,
+	arm_rs_r7_t5_c2,
+	arm_rs_r8_t5_c2,
+	arm_rs_r9_t5_c2,
+	arm_rs_r10_t5_c2,
+	arm_rs_r11_t5_c2,
+	arm_rs_r12_t5_c2,
+	arm_rs_r13_t5_c2,
+	arm_rs_r14_t5_c2,
+	arm_rs_r15_t5_c2,
+	arm_rs_r0_t6_c2,
+	arm_rs_r1_t6_c2,
+	arm_rs_r2_t6_c2,
+	arm_rs_r3_t6_c2,
+	arm_rs_r4_t6_c2,
+	arm_rs_r5_t6_c2,
+	arm_rs_r6_t6_c2,
+	arm_rs_r7_t6_c2,
+	arm_rs_r8_t6_c2,
+	arm_rs_r9_t6_c2,
+	arm_rs_r10_t6_c2,
+	arm_rs_r11_t6_c2,
+	arm_rs_r12_t6_c2,
+	arm_rs_r13_t6_c2,
+	arm_rs_r14_t6_c2,
+	arm_rs_r15_t6_c2,
+	arm_rs_r0_t7_c2,
+	arm_rs_r1_t7_c2,
+	arm_rs_r2_t7_c2,
+	arm_rs_r3_t7_c2,
+	arm_rs_r4_t7_c2,
+	arm_rs_r5_t7_c2,
+	arm_rs_r6_t7_c2,
+	arm_rs_r7_t7_c2,
+	arm_rs_r8_t7_c2,
+	arm_rs_r9_t7_c2,
+	arm_rs_r10_t7_c2,
+	arm_rs_r11_t7_c2,
+	arm_rs_r12_t7_c2,
+	arm_rs_r13_t7_c2,
+	arm_rs_r14_t7_c2,
+	arm_rs_r15_t7_c2,
+	arm_rs_r0_t0_c3,
+	arm_rs_r1_t0_c3,
+	arm_rs_r2_t0_c3,
+	arm_rs_r3_t0_c3,
+	arm_rs_r4_t0_c3,
+	arm_rs_r5_t0_c3,
+	arm_rs_r6_t0_c3,
+	arm_rs_r7_t0_c3,
+	arm_rs_r8_t0_c3,
+	arm_rs_r9_t0_c3,
+	arm_rs_r10_t0_c3,
+	arm_rs_r11_t0_c3,
+	arm_rs_r12_t0_c3,
+	arm_rs_r13_t0_c3,
+	arm_rs_r14_t0_c3,
+	arm_rs_r15_t0_c3,
+	arm_rs_r0_t1_c3,
+	arm_rs_r1_t1_c3,
+	arm_rs_r2_t1_c3,
+	arm_rs_r3_t1_c3,
+	arm_rs_r4_t1_c3,
+	arm_rs_r5_t1_c3,
+	arm_rs_r6_t1_c3,
+	arm_rs_r7_t1_c3,
+	arm_rs_r8_t1_c3,
+	arm_rs_r9_t1_c3,
+	arm_rs_r10_t1_c3,
+	arm_rs_r11_t1_c3,
+	arm_rs_r12_t1_c3,
+	arm_rs_r13_t1_c3,
+	arm_rs_r14_t1_c3,
+	arm_rs_r15_t1_c3,
+	arm_rs_r0_t2_c3,
+	arm_rs_r1_t2_c3,
+	arm_rs_r2_t2_c3,
+	arm_rs_r3_t2_c3,
+	arm_rs_r4_t2_c3,
+	arm_rs_r5_t2_c3,
+	arm_rs_r6_t2_c3,
+	arm_rs_r7_t2_c3,
+	arm_rs_r8_t2_c3,
+	arm_rs_r9_t2_c3,
+	arm_rs_r10_t2_c3,
+	arm_rs_r11_t2_c3,
+	arm_rs_r12_t2_c3,
+	arm_rs_r13_t2_c3,
+	arm_rs_r14_t2_c3,
+	arm_rs_r15_t2_c3,
+	arm_rs_r0_t3_c3,
+	arm_rs_r1_t3_c3,
+	arm_rs_r2_t3_c3,
+	arm_rs_r3_t3_c3,
+	arm_rs_r4_t3_c3,
+	arm_rs_r5_t3_c3,
+	arm_rs_r6_t3_c3,
+	arm_rs_r7_t3_c3,
+	arm_rs_r8_t3_c3,
+	arm_rs_r9_t3_c3,
+	arm_rs_r10_t3_c3,
+	arm_rs_r11_t3_c3,
+	arm_rs_r12_t3_c3,
+	arm_rs_r13_t3_c3,
+	arm_rs_r14_t3_c3,
+	arm_rs_r15_t3_c3,
+	arm_rs_r0_t4_c3,
+	arm_rs_r1_t4_c3,
+	arm_rs_r2_t4_c3,
+	arm_rs_r3_t4_c3,
+	arm_rs_r4_t4_c3,
+	arm_rs_r5_t4_c3,
+	arm_rs_r6_t4_c3,
+	arm_rs_r7_t4_c3,
+	arm_rs_r8_t4_c3,
+	arm_rs_r9_t4_c3,
+	arm_rs_r10_t4_c3,
+	arm_rs_r11_t4_c3,
+	arm_rs_r12_t4_c3,
+	arm_rs_r13_t4_c3,
+	arm_rs_r14_t4_c3,
+	arm_rs_r15_t4_c3,
+	arm_rs_r0_t5_c3,
+	arm_rs_r1_t5_c3,
+	arm_rs_r2_t5_c3,
+	arm_rs_r3_t5_c3,
+	arm_rs_r4_t5_c3,
+	arm_rs_r5_t5_c3,
+	arm_rs_r6_t5_c3,
+	arm_rs_r7_t5_c3,
+	arm_rs_r8_t5_c3,
+	arm_rs_r9_t5_c3,
+	arm_rs_r10_t5_c3,
+	arm_rs_r11_t5_c3,
+	arm_rs_r12_t5_c3,
+	arm_rs_r13_t5_c3,
+	arm_rs_r14_t5_c3,
+	arm_rs_r15_t5_c3,
+	arm_rs_r0_t6_c3,
+	arm_rs_r1_t6_c3,
+	arm_rs_r2_t6_c3,
+	arm_rs_r3_t6_c3,
+	arm_rs_r4_t6_c3,
+	arm_rs_r5_t6_c3,
+	arm_rs_r6_t6_c3,
+	arm_rs_r7_t6_c3,
+	arm_rs_r8_t6_c3,
+	arm_rs_r9_t6_c3,
+	arm_rs_r10_t6_c3,
+	arm_rs_r11_t6_c3,
+	arm_rs_r12_t6_c3,
+	arm_rs_r13_t6_c3,
+	arm_rs_r14_t6_c3,
+	arm_rs_r15_t6_c3,
+	arm_rs_r0_t7_c3,
+	arm_rs_r1_t7_c3,
+	arm_rs_r2_t7_c3,
+	arm_rs_r3_t7_c3,
+	arm_rs_r4_t7_c3,
+	arm_rs_r5_t7_c3,
+	arm_rs_r6_t7_c3,
+	arm_rs_r7_t7_c3,
+	arm_rs_r8_t7_c3,
+	arm_rs_r9_t7_c3,
+	arm_rs_r10_t7_c3,
+	arm_rs_r11_t7_c3,
+	arm_rs_r12_t7_c3,
+	arm_rs_r13_t7_c3,
+	arm_rs_r14_t7_c3,
+	arm_rs_r15_t7_c3,
+	arm_rs_r0_t0_c4,
+	arm_rs_r1_t0_c4,
+	arm_rs_r2_t0_c4,
+	arm_rs_r3_t0_c4,
+	arm_rs_r4_t0_c4,
+	arm_rs_r5_t0_c4,
+	arm_rs_r6_t0_c4,
+	arm_rs_r7_t0_c4,
+	arm_rs_r8_t0_c4,
+	arm_rs_r9_t0_c4,
+	arm_rs_r10_t0_c4,
+	arm_rs_r11_t0_c4,
+	arm_rs_r12_t0_c4,
+	arm_rs_r13_t0_c4,
+	arm_rs_r14_t0_c4,
+	arm_rs_r15_t0_c4,
+	arm_rs_r0_t1_c4,
+	arm_rs_r1_t1_c4,
+	arm_rs_r2_t1_c4,
+	arm_rs_r3_t1_c4,
+	arm_rs_r4_t1_c4,
+	arm_rs_r5_t1_c4,
+	arm_rs_r6_t1_c4,
+	arm_rs_r7_t1_c4,
+	arm_rs_r8_t1_c4,
+	arm_rs_r9_t1_c4,
+	arm_rs_r10_t1_c4,
+	arm_rs_r11_t1_c4,
+	arm_rs_r12_t1_c4,
+	arm_rs_r13_t1_c4,
+	arm_rs_r14_t1_c4,
+	arm_rs_r15_t1_c4,
+	arm_rs_r0_t2_c4,
+	arm_rs_r1_t2_c4,
+	arm_rs_r2_t2_c4,
+	arm_rs_r3_t2_c4,
+	arm_rs_r4_t2_c4,
+	arm_rs_r5_t2_c4,
+	arm_rs_r6_t2_c4,
+	arm_rs_r7_t2_c4,
+	arm_rs_r8_t2_c4,
+	arm_rs_r9_t2_c4,
+	arm_rs_r10_t2_c4,
+	arm_rs_r11_t2_c4,
+	arm_rs_r12_t2_c4,
+	arm_rs_r13_t2_c4,
+	arm_rs_r14_t2_c4,
+	arm_rs_r15_t2_c4,
+	arm_rs_r0_t3_c4,
+	arm_rs_r1_t3_c4,
+	arm_rs_r2_t3_c4,
+	arm_rs_r3_t3_c4,
+	arm_rs_r4_t3_c4,
+	arm_rs_r5_t3_c4,
+	arm_rs_r6_t3_c4,
+	arm_rs_r7_t3_c4,
+	arm_rs_r8_t3_c4,
+	arm_rs_r9_t3_c4,
+	arm_rs_r10_t3_c4,
+	arm_rs_r11_t3_c4,
+	arm_rs_r12_t3_c4,
+	arm_rs_r13_t3_c4,
+	arm_rs_r14_t3_c4,
+	arm_rs_r15_t3_c4,
+	arm_rs_r0_t4_c4,
+	arm_rs_r1_t4_c4,
+	arm_rs_r2_t4_c4,
+	arm_rs_r3_t4_c4,
+	arm_rs_r4_t4_c4,
+	arm_rs_r5_t4_c4,
+	arm_rs_r6_t4_c4,
+	arm_rs_r7_t4_c4,
+	arm_rs_r8_t4_c4,
+	arm_rs_r9_t4_c4,
+	arm_rs_r10_t4_c4,
+	arm_rs_r11_t4_c4,
+	arm_rs_r12_t4_c4,
+	arm_rs_r13_t4_c4,
+	arm_rs_r14_t4_c4,
+	arm_rs_r15_t4_c4,
+	arm_rs_r0_t5_c4,
+	arm_rs_r1_t5_c4,
+	arm_rs_r2_t5_c4,
+	arm_rs_r3_t5_c4,
+	arm_rs_r4_t5_c4,
+	arm_rs_r5_t5_c4,
+	arm_rs_r6_t5_c4,
+	arm_rs_r7_t5_c4,
+	arm_rs_r8_t5_c4,
+	arm_rs_r9_t5_c4,
+	arm_rs_r10_t5_c4,
+	arm_rs_r11_t5_c4,
+	arm_rs_r12_t5_c4,
+	arm_rs_r13_t5_c4,
+	arm_rs_r14_t5_c4,
+	arm_rs_r15_t5_c4,
+	arm_rs_r0_t6_c4,
+	arm_rs_r1_t6_c4,
+	arm_rs_r2_t6_c4,
+	arm_rs_r3_t6_c4,
+	arm_rs_r4_t6_c4,
+	arm_rs_r5_t6_c4,
+	arm_rs_r6_t6_c4,
+	arm_rs_r7_t6_c4,
+	arm_rs_r8_t6_c4,
+	arm_rs_r9_t6_c4,
+	arm_rs_r10_t6_c4,
+	arm_rs_r11_t6_c4,
+	arm_rs_r12_t6_c4,
+	arm_rs_r13_t6_c4,
+	arm_rs_r14_t6_c4,
+	arm_rs_r15_t6_c4,
+	arm_rs_r0_t7_c4,
+	arm_rs_r1_t7_c4,
+	arm_rs_r2_t7_c4,
+	arm_rs_r3_t7_c4,
+	arm_rs_r4_t7_c4,
+	arm_rs_r5_t7_c4,
+	arm_rs_r6_t7_c4,
+	arm_rs_r7_t7_c4,
+	arm_rs_r8_t7_c4,
+	arm_rs_r9_t7_c4,
+	arm_rs_r10_t7_c4,
+	arm_rs_r11_t7_c4,
+	arm_rs_r12_t7_c4,
+	arm_rs_r13_t7_c4,
+	arm_rs_r14_t7_c4,
+	arm_rs_r15_t7_c4,
+	arm_rs_r0_t0_c5,
+	arm_rs_r1_t0_c5,
+	arm_rs_r2_t0_c5,
+	arm_rs_r3_t0_c5,
+	arm_rs_r4_t0_c5,
+	arm_rs_r5_t0_c5,
+	arm_rs_r6_t0_c5,
+	arm_rs_r7_t0_c5,
+	arm_rs_r8_t0_c5,
+	arm_rs_r9_t0_c5,
+	arm_rs_r10_t0_c5,
+	arm_rs_r11_t0_c5,
+	arm_rs_r12_t0_c5,
+	arm_rs_r13_t0_c5,
+	arm_rs_r14_t0_c5,
+	arm_rs_r15_t0_c5,
+	arm_rs_r0_t1_c5,
+	arm_rs_r1_t1_c5,
+	arm_rs_r2_t1_c5,
+	arm_rs_r3_t1_c5,
+	arm_rs_r4_t1_c5,
+	arm_rs_r5_t1_c5,
+	arm_rs_r6_t1_c5,
+	arm_rs_r7_t1_c5,
+	arm_rs_r8_t1_c5,
+	arm_rs_r9_t1_c5,
+	arm_rs_r10_t1_c5,
+	arm_rs_r11_t1_c5,
+	arm_rs_r12_t1_c5,
+	arm_rs_r13_t1_c5,
+	arm_rs_r14_t1_c5,
+	arm_rs_r15_t1_c5,
+	arm_rs_r0_t2_c5,
+	arm_rs_r1_t2_c5,
+	arm_rs_r2_t2_c5,
+	arm_rs_r3_t2_c5,
+	arm_rs_r4_t2_c5,
+	arm_rs_r5_t2_c5,
+	arm_rs_r6_t2_c5,
+	arm_rs_r7_t2_c5,
+	arm_rs_r8_t2_c5,
+	arm_rs_r9_t2_c5,
+	arm_rs_r10_t2_c5,
+	arm_rs_r11_t2_c5,
+	arm_rs_r12_t2_c5,
+	arm_rs_r13_t2_c5,
+	arm_rs_r14_t2_c5,
+	arm_rs_r15_t2_c5,
+	arm_rs_r0_t3_c5,
+	arm_rs_r1_t3_c5,
+	arm_rs_r2_t3_c5,
+	arm_rs_r3_t3_c5,
+	arm_rs_r4_t3_c5,
+	arm_rs_r5_t3_c5,
+	arm_rs_r6_t3_c5,
+	arm_rs_r7_t3_c5,
+	arm_rs_r8_t3_c5,
+	arm_rs_r9_t3_c5,
+	arm_rs_r10_t3_c5,
+	arm_rs_r11_t3_c5,
+	arm_rs_r12_t3_c5,
+	arm_rs_r13_t3_c5,
+	arm_rs_r14_t3_c5,
+	arm_rs_r15_t3_c5,
+	arm_rs_r0_t4_c5,
+	arm_rs_r1_t4_c5,
+	arm_rs_r2_t4_c5,
+	arm_rs_r3_t4_c5,
+	arm_rs_r4_t4_c5,
+	arm_rs_r5_t4_c5,
+	arm_rs_r6_t4_c5,
+	arm_rs_r7_t4_c5,
+	arm_rs_r8_t4_c5,
+	arm_rs_r9_t4_c5,
+	arm_rs_r10_t4_c5,
+	arm_rs_r11_t4_c5,
+	arm_rs_r12_t4_c5,
+	arm_rs_r13_t4_c5,
+	arm_rs_r14_t4_c5,
+	arm_rs_r15_t4_c5,
+	arm_rs_r0_t5_c5,
+	arm_rs_r1_t5_c5,
+	arm_rs_r2_t5_c5,
+	arm_rs_r3_t5_c5,
+	arm_rs_r4_t5_c5,
+	arm_rs_r5_t5_c5,
+	arm_rs_r6_t5_c5,
+	arm_rs_r7_t5_c5,
+	arm_rs_r8_t5_c5,
+	arm_rs_r9_t5_c5,
+	arm_rs_r10_t5_c5,
+	arm_rs_r11_t5_c5,
+	arm_rs_r12_t5_c5,
+	arm_rs_r13_t5_c5,
+	arm_rs_r14_t5_c5,
+	arm_rs_r15_t5_c5,
+	arm_rs_r0_t6_c5,
+	arm_rs_r1_t6_c5,
+	arm_rs_r2_t6_c5,
+	arm_rs_r3_t6_c5,
+	arm_rs_r4_t6_c5,
+	arm_rs_r5_t6_c5,
+	arm_rs_r6_t6_c5,
+	arm_rs_r7_t6_c5,
+	arm_rs_r8_t6_c5,
+	arm_rs_r9_t6_c5,
+	arm_rs_r10_t6_c5,
+	arm_rs_r11_t6_c5,
+	arm_rs_r12_t6_c5,
+	arm_rs_r13_t6_c5,
+	arm_rs_r14_t6_c5,
+	arm_rs_r15_t6_c5,
+	arm_rs_r0_t7_c5,
+	arm_rs_r1_t7_c5,
+	arm_rs_r2_t7_c5,
+	arm_rs_r3_t7_c5,
+	arm_rs_r4_t7_c5,
+	arm_rs_r5_t7_c5,
+	arm_rs_r6_t7_c5,
+	arm_rs_r7_t7_c5,
+	arm_rs_r8_t7_c5,
+	arm_rs_r9_t7_c5,
+	arm_rs_r10_t7_c5,
+	arm_rs_r11_t7_c5,
+	arm_rs_r12_t7_c5,
+	arm_rs_r13_t7_c5,
+	arm_rs_r14_t7_c5,
+	arm_rs_r15_t7_c5,
+	arm_rs_r0_t0_c6,
+	arm_rs_r1_t0_c6,
+	arm_rs_r2_t0_c6,
+	arm_rs_r3_t0_c6,
+	arm_rs_r4_t0_c6,
+	arm_rs_r5_t0_c6,
+	arm_rs_r6_t0_c6,
+	arm_rs_r7_t0_c6,
+	arm_rs_r8_t0_c6,
+	arm_rs_r9_t0_c6,
+	arm_rs_r10_t0_c6,
+	arm_rs_r11_t0_c6,
+	arm_rs_r12_t0_c6,
+	arm_rs_r13_t0_c6,
+	arm_rs_r14_t0_c6,
+	arm_rs_r15_t0_c6,
+	arm_rs_r0_t1_c6,
+	arm_rs_r1_t1_c6,
+	arm_rs_r2_t1_c6,
+	arm_rs_r3_t1_c6,
+	arm_rs_r4_t1_c6,
+	arm_rs_r5_t1_c6,
+	arm_rs_r6_t1_c6,
+	arm_rs_r7_t1_c6,
+	arm_rs_r8_t1_c6,
+	arm_rs_r9_t1_c6,
+	arm_rs_r10_t1_c6,
+	arm_rs_r11_t1_c6,
+	arm_rs_r12_t1_c6,
+	arm_rs_r13_t1_c6,
+	arm_rs_r14_t1_c6,
+	arm_rs_r15_t1_c6,
+	arm_rs_r0_t2_c6,
+	arm_rs_r1_t2_c6,
+	arm_rs_r2_t2_c6,
+	arm_rs_r3_t2_c6,
+	arm_rs_r4_t2_c6,
+	arm_rs_r5_t2_c6,
+	arm_rs_r6_t2_c6,
+	arm_rs_r7_t2_c6,
+	arm_rs_r8_t2_c6,
+	arm_rs_r9_t2_c6,
+	arm_rs_r10_t2_c6,
+	arm_rs_r11_t2_c6,
+	arm_rs_r12_t2_c6,
+	arm_rs_r13_t2_c6,
+	arm_rs_r14_t2_c6,
+	arm_rs_r15_t2_c6,
+	arm_rs_r0_t3_c6,
+	arm_rs_r1_t3_c6,
+	arm_rs_r2_t3_c6,
+	arm_rs_r3_t3_c6,
+	arm_rs_r4_t3_c6,
+	arm_rs_r5_t3_c6,
+	arm_rs_r6_t3_c6,
+	arm_rs_r7_t3_c6,
+	arm_rs_r8_t3_c6,
+	arm_rs_r9_t3_c6,
+	arm_rs_r10_t3_c6,
+	arm_rs_r11_t3_c6,
+	arm_rs_r12_t3_c6,
+	arm_rs_r13_t3_c6,
+	arm_rs_r14_t3_c6,
+	arm_rs_r15_t3_c6,
+	arm_rs_r0_t4_c6,
+	arm_rs_r1_t4_c6,
+	arm_rs_r2_t4_c6,
+	arm_rs_r3_t4_c6,
+	arm_rs_r4_t4_c6,
+	arm_rs_r5_t4_c6,
+	arm_rs_r6_t4_c6,
+	arm_rs_r7_t4_c6,
+	arm_rs_r8_t4_c6,
+	arm_rs_r9_t4_c6,
+	arm_rs_r10_t4_c6,
+	arm_rs_r11_t4_c6,
+	arm_rs_r12_t4_c6,
+	arm_rs_r13_t4_c6,
+	arm_rs_r14_t4_c6,
+	arm_rs_r15_t4_c6,
+	arm_rs_r0_t5_c6,
+	arm_rs_r1_t5_c6,
+	arm_rs_r2_t5_c6,
+	arm_rs_r3_t5_c6,
+	arm_rs_r4_t5_c6,
+	arm_rs_r5_t5_c6,
+	arm_rs_r6_t5_c6,
+	arm_rs_r7_t5_c6,
+	arm_rs_r8_t5_c6,
+	arm_rs_r9_t5_c6,
+	arm_rs_r10_t5_c6,
+	arm_rs_r11_t5_c6,
+	arm_rs_r12_t5_c6,
+	arm_rs_r13_t5_c6,
+	arm_rs_r14_t5_c6,
+	arm_rs_r15_t5_c6,
+	arm_rs_r0_t6_c6,
+	arm_rs_r1_t6_c6,
+	arm_rs_r2_t6_c6,
+	arm_rs_r3_t6_c6,
+	arm_rs_r4_t6_c6,
+	arm_rs_r5_t6_c6,
+	arm_rs_r6_t6_c6,
+	arm_rs_r7_t6_c6,
+	arm_rs_r8_t6_c6,
+	arm_rs_r9_t6_c6,
+	arm_rs_r10_t6_c6,
+	arm_rs_r11_t6_c6,
+	arm_rs_r12_t6_c6,
+	arm_rs_r13_t6_c6,
+	arm_rs_r14_t6_c6,
+	arm_rs_r15_t6_c6,
+	arm_rs_r0_t7_c6,
+	arm_rs_r1_t7_c6,
+	arm_rs_r2_t7_c6,
+	arm_rs_r3_t7_c6,
+	arm_rs_r4_t7_c6,
+	arm_rs_r5_t7_c6,
+	arm_rs_r6_t7_c6,
+	arm_rs_r7_t7_c6,
+	arm_rs_r8_t7_c6,
+	arm_rs_r9_t7_c6,
+	arm_rs_r10_t7_c6,
+	arm_rs_r11_t7_c6,
+	arm_rs_r12_t7_c6,
+	arm_rs_r13_t7_c6,
+	arm_rs_r14_t7_c6,
+	arm_rs_r15_t7_c6,
+	arm_rs_r0_t0_c7,
+	arm_rs_r1_t0_c7,
+	arm_rs_r2_t0_c7,
+	arm_rs_r3_t0_c7,
+	arm_rs_r4_t0_c7,
+	arm_rs_r5_t0_c7,
+	arm_rs_r6_t0_c7,
+	arm_rs_r7_t0_c7,
+	arm_rs_r8_t0_c7,
+	arm_rs_r9_t0_c7,
+	arm_rs_r10_t0_c7,
+	arm_rs_r11_t0_c7,
+	arm_rs_r12_t0_c7,
+	arm_rs_r13_t0_c7,
+	arm_rs_r14_t0_c7,
+	arm_rs_r15_t0_c7,
+	arm_rs_r0_t1_c7,
+	arm_rs_r1_t1_c7,
+	arm_rs_r2_t1_c7,
+	arm_rs_r3_t1_c7,
+	arm_rs_r4_t1_c7,
+	arm_rs_r5_t1_c7,
+	arm_rs_r6_t1_c7,
+	arm_rs_r7_t1_c7,
+	arm_rs_r8_t1_c7,
+	arm_rs_r9_t1_c7,
+	arm_rs_r10_t1_c7,
+	arm_rs_r11_t1_c7,
+	arm_rs_r12_t1_c7,
+	arm_rs_r13_t1_c7,
+	arm_rs_r14_t1_c7,
+	arm_rs_r15_t1_c7,
+	arm_rs_r0_t2_c7,
+	arm_rs_r1_t2_c7,
+	arm_rs_r2_t2_c7,
+	arm_rs_r3_t2_c7,
+	arm_rs_r4_t2_c7,
+	arm_rs_r5_t2_c7,
+	arm_rs_r6_t2_c7,
+	arm_rs_r7_t2_c7,
+	arm_rs_r8_t2_c7,
+	arm_rs_r9_t2_c7,
+	arm_rs_r10_t2_c7,
+	arm_rs_r11_t2_c7,
+	arm_rs_r12_t2_c7,
+	arm_rs_r13_t2_c7,
+	arm_rs_r14_t2_c7,
+	arm_rs_r15_t2_c7,
+	arm_rs_r0_t3_c7,
+	arm_rs_r1_t3_c7,
+	arm_rs_r2_t3_c7,
+	arm_rs_r3_t3_c7,
+	arm_rs_r4_t3_c7,
+	arm_rs_r5_t3_c7,
+	arm_rs_r6_t3_c7,
+	arm_rs_r7_t3_c7,
+	arm_rs_r8_t3_c7,
+	arm_rs_r9_t3_c7,
+	arm_rs_r10_t3_c7,
+	arm_rs_r11_t3_c7,
+	arm_rs_r12_t3_c7,
+	arm_rs_r13_t3_c7,
+	arm_rs_r14_t3_c7,
+	arm_rs_r15_t3_c7,
+	arm_rs_r0_t4_c7,
+	arm_rs_r1_t4_c7,
+	arm_rs_r2_t4_c7,
+	arm_rs_r3_t4_c7,
+	arm_rs_r4_t4_c7,
+	arm_rs_r5_t4_c7,
+	arm_rs_r6_t4_c7,
+	arm_rs_r7_t4_c7,
+	arm_rs_r8_t4_c7,
+	arm_rs_r9_t4_c7,
+	arm_rs_r10_t4_c7,
+	arm_rs_r11_t4_c7,
+	arm_rs_r12_t4_c7,
+	arm_rs_r13_t4_c7,
+	arm_rs_r14_t4_c7,
+	arm_rs_r15_t4_c7,
+	arm_rs_r0_t5_c7,
+	arm_rs_r1_t5_c7,
+	arm_rs_r2_t5_c7,
+	arm_rs_r3_t5_c7,
+	arm_rs_r4_t5_c7,
+	arm_rs_r5_t5_c7,
+	arm_rs_r6_t5_c7,
+	arm_rs_r7_t5_c7,
+	arm_rs_r8_t5_c7,
+	arm_rs_r9_t5_c7,
+	arm_rs_r10_t5_c7,
+	arm_rs_r11_t5_c7,
+	arm_rs_r12_t5_c7,
+	arm_rs_r13_t5_c7,
+	arm_rs_r14_t5_c7,
+	arm_rs_r15_t5_c7,
+	arm_rs_r0_t6_c7,
+	arm_rs_r1_t6_c7,
+	arm_rs_r2_t6_c7,
+	arm_rs_r3_t6_c7,
+	arm_rs_r4_t6_c7,
+	arm_rs_r5_t6_c7,
+	arm_rs_r6_t6_c7,
+	arm_rs_r7_t6_c7,
+	arm_rs_r8_t6_c7,
+	arm_rs_r9_t6_c7,
+	arm_rs_r10_t6_c7,
+	arm_rs_r11_t6_c7,
+	arm_rs_r12_t6_c7,
+	arm_rs_r13_t6_c7,
+	arm_rs_r14_t6_c7,
+	arm_rs_r15_t6_c7,
+	arm_rs_r0_t7_c7,
+	arm_rs_r1_t7_c7,
+	arm_rs_r2_t7_c7,
+	arm_rs_r3_t7_c7,
+	arm_rs_r4_t7_c7,
+	arm_rs_r5_t7_c7,
+	arm_rs_r6_t7_c7,
+	arm_rs_r7_t7_c7,
+	arm_rs_r8_t7_c7,
+	arm_rs_r9_t7_c7,
+	arm_rs_r10_t7_c7,
+	arm_rs_r11_t7_c7,
+	arm_rs_r12_t7_c7,
+	arm_rs_r13_t7_c7,
+	arm_rs_r14_t7_c7,
+	arm_rs_r15_t7_c7,
+	arm_rs_r0_t0_c8,
+	arm_rs_r1_t0_c8,
+	arm_rs_r2_t0_c8,
+	arm_rs_r3_t0_c8,
+	arm_rs_r4_t0_c8,
+	arm_rs_r5_t0_c8,
+	arm_rs_r6_t0_c8,
+	arm_rs_r7_t0_c8,
+	arm_rs_r8_t0_c8,
+	arm_rs_r9_t0_c8,
+	arm_rs_r10_t0_c8,
+	arm_rs_r11_t0_c8,
+	arm_rs_r12_t0_c8,
+	arm_rs_r13_t0_c8,
+	arm_rs_r14_t0_c8,
+	arm_rs_r15_t0_c8,
+	arm_rs_r0_t1_c8,
+	arm_rs_r1_t1_c8,
+	arm_rs_r2_t1_c8,
+	arm_rs_r3_t1_c8,
+	arm_rs_r4_t1_c8,
+	arm_rs_r5_t1_c8,
+	arm_rs_r6_t1_c8,
+	arm_rs_r7_t1_c8,
+	arm_rs_r8_t1_c8,
+	arm_rs_r9_t1_c8,
+	arm_rs_r10_t1_c8,
+	arm_rs_r11_t1_c8,
+	arm_rs_r12_t1_c8,
+	arm_rs_r13_t1_c8,
+	arm_rs_r14_t1_c8,
+	arm_rs_r15_t1_c8,
+	arm_rs_r0_t2_c8,
+	arm_rs_r1_t2_c8,
+	arm_rs_r2_t2_c8,
+	arm_rs_r3_t2_c8,
+	arm_rs_r4_t2_c8,
+	arm_rs_r5_t2_c8,
+	arm_rs_r6_t2_c8,
+	arm_rs_r7_t2_c8,
+	arm_rs_r8_t2_c8,
+	arm_rs_r9_t2_c8,
+	arm_rs_r10_t2_c8,
+	arm_rs_r11_t2_c8,
+	arm_rs_r12_t2_c8,
+	arm_rs_r13_t2_c8,
+	arm_rs_r14_t2_c8,
+	arm_rs_r15_t2_c8,
+	arm_rs_r0_t3_c8,
+	arm_rs_r1_t3_c8,
+	arm_rs_r2_t3_c8,
+	arm_rs_r3_t3_c8,
+	arm_rs_r4_t3_c8,
+	arm_rs_r5_t3_c8,
+	arm_rs_r6_t3_c8,
+	arm_rs_r7_t3_c8,
+	arm_rs_r8_t3_c8,
+	arm_rs_r9_t3_c8,
+	arm_rs_r10_t3_c8,
+	arm_rs_r11_t3_c8,
+	arm_rs_r12_t3_c8,
+	arm_rs_r13_t3_c8,
+	arm_rs_r14_t3_c8,
+	arm_rs_r15_t3_c8,
+	arm_rs_r0_t4_c8,
+	arm_rs_r1_t4_c8,
+	arm_rs_r2_t4_c8,
+	arm_rs_r3_t4_c8,
+	arm_rs_r4_t4_c8,
+	arm_rs_r5_t4_c8,
+	arm_rs_r6_t4_c8,
+	arm_rs_r7_t4_c8,
+	arm_rs_r8_t4_c8,
+	arm_rs_r9_t4_c8,
+	arm_rs_r10_t4_c8,
+	arm_rs_r11_t4_c8,
+	arm_rs_r12_t4_c8,
+	arm_rs_r13_t4_c8,
+	arm_rs_r14_t4_c8,
+	arm_rs_r15_t4_c8,
+	arm_rs_r0_t5_c8,
+	arm_rs_r1_t5_c8,
+	arm_rs_r2_t5_c8,
+	arm_rs_r3_t5_c8,
+	arm_rs_r4_t5_c8,
+	arm_rs_r5_t5_c8,
+	arm_rs_r6_t5_c8,
+	arm_rs_r7_t5_c8,
+	arm_rs_r8_t5_c8,
+	arm_rs_r9_t5_c8,
+	arm_rs_r10_t5_c8,
+	arm_rs_r11_t5_c8,
+	arm_rs_r12_t5_c8,
+	arm_rs_r13_t5_c8,
+	arm_rs_r14_t5_c8,
+	arm_rs_r15_t5_c8,
+	arm_rs_r0_t6_c8,
+	arm_rs_r1_t6_c8,
+	arm_rs_r2_t6_c8,
+	arm_rs_r3_t6_c8,
+	arm_rs_r4_t6_c8,
+	arm_rs_r5_t6_c8,
+	arm_rs_r6_t6_c8,
+	arm_rs_r7_t6_c8,
+	arm_rs_r8_t6_c8,
+	arm_rs_r9_t6_c8,
+	arm_rs_r10_t6_c8,
+	arm_rs_r11_t6_c8,
+	arm_rs_r12_t6_c8,
+	arm_rs_r13_t6_c8,
+	arm_rs_r14_t6_c8,
+	arm_rs_r15_t6_c8,
+	arm_rs_r0_t7_c8,
+	arm_rs_r1_t7_c8,
+	arm_rs_r2_t7_c8,
+	arm_rs_r3_t7_c8,
+	arm_rs_r4_t7_c8,
+	arm_rs_r5_t7_c8,
+	arm_rs_r6_t7_c8,
+	arm_rs_r7_t7_c8,
+	arm_rs_r8_t7_c8,
+	arm_rs_r9_t7_c8,
+	arm_rs_r10_t7_c8,
+	arm_rs_r11_t7_c8,
+	arm_rs_r12_t7_c8,
+	arm_rs_r13_t7_c8,
+	arm_rs_r14_t7_c8,
+	arm_rs_r15_t7_c8,
+	arm_rs_r0_t0_c9,
+	arm_rs_r1_t0_c9,
+	arm_rs_r2_t0_c9,
+	arm_rs_r3_t0_c9,
+	arm_rs_r4_t0_c9,
+	arm_rs_r5_t0_c9,
+	arm_rs_r6_t0_c9,
+	arm_rs_r7_t0_c9,
+	arm_rs_r8_t0_c9,
+	arm_rs_r9_t0_c9,
+	arm_rs_r10_t0_c9,
+	arm_rs_r11_t0_c9,
+	arm_rs_r12_t0_c9,
+	arm_rs_r13_t0_c9,
+	arm_rs_r14_t0_c9,
+	arm_rs_r15_t0_c9,
+	arm_rs_r0_t1_c9,
+	arm_rs_r1_t1_c9,
+	arm_rs_r2_t1_c9,
+	arm_rs_r3_t1_c9,
+	arm_rs_r4_t1_c9,
+	arm_rs_r5_t1_c9,
+	arm_rs_r6_t1_c9,
+	arm_rs_r7_t1_c9,
+	arm_rs_r8_t1_c9,
+	arm_rs_r9_t1_c9,
+	arm_rs_r10_t1_c9,
+	arm_rs_r11_t1_c9,
+	arm_rs_r12_t1_c9,
+	arm_rs_r13_t1_c9,
+	arm_rs_r14_t1_c9,
+	arm_rs_r15_t1_c9,
+	arm_rs_r0_t2_c9,
+	arm_rs_r1_t2_c9,
+	arm_rs_r2_t2_c9,
+	arm_rs_r3_t2_c9,
+	arm_rs_r4_t2_c9,
+	arm_rs_r5_t2_c9,
+	arm_rs_r6_t2_c9,
+	arm_rs_r7_t2_c9,
+	arm_rs_r8_t2_c9,
+	arm_rs_r9_t2_c9,
+	arm_rs_r10_t2_c9,
+	arm_rs_r11_t2_c9,
+	arm_rs_r12_t2_c9,
+	arm_rs_r13_t2_c9,
+	arm_rs_r14_t2_c9,
+	arm_rs_r15_t2_c9,
+	arm_rs_r0_t3_c9,
+	arm_rs_r1_t3_c9,
+	arm_rs_r2_t3_c9,
+	arm_rs_r3_t3_c9,
+	arm_rs_r4_t3_c9,
+	arm_rs_r5_t3_c9,
+	arm_rs_r6_t3_c9,
+	arm_rs_r7_t3_c9,
+	arm_rs_r8_t3_c9,
+	arm_rs_r9_t3_c9,
+	arm_rs_r10_t3_c9,
+	arm_rs_r11_t3_c9,
+	arm_rs_r12_t3_c9,
+	arm_rs_r13_t3_c9,
+	arm_rs_r14_t3_c9,
+	arm_rs_r15_t3_c9,
+	arm_rs_r0_t4_c9,
+	arm_rs_r1_t4_c9,
+	arm_rs_r2_t4_c9,
+	arm_rs_r3_t4_c9,
+	arm_rs_r4_t4_c9,
+	arm_rs_r5_t4_c9,
+	arm_rs_r6_t4_c9,
+	arm_rs_r7_t4_c9,
+	arm_rs_r8_t4_c9,
+	arm_rs_r9_t4_c9,
+	arm_rs_r10_t4_c9,
+	arm_rs_r11_t4_c9,
+	arm_rs_r12_t4_c9,
+	arm_rs_r13_t4_c9,
+	arm_rs_r14_t4_c9,
+	arm_rs_r15_t4_c9,
+	arm_rs_r0_t5_c9,
+	arm_rs_r1_t5_c9,
+	arm_rs_r2_t5_c9,
+	arm_rs_r3_t5_c9,
+	arm_rs_r4_t5_c9,
+	arm_rs_r5_t5_c9,
+	arm_rs_r6_t5_c9,
+	arm_rs_r7_t5_c9,
+	arm_rs_r8_t5_c9,
+	arm_rs_r9_t5_c9,
+	arm_rs_r10_t5_c9,
+	arm_rs_r11_t5_c9,
+	arm_rs_r12_t5_c9,
+	arm_rs_r13_t5_c9,
+	arm_rs_r14_t5_c9,
+	arm_rs_r15_t5_c9,
+	arm_rs_r0_t6_c9,
+	arm_rs_r1_t6_c9,
+	arm_rs_r2_t6_c9,
+	arm_rs_r3_t6_c9,
+	arm_rs_r4_t6_c9,
+	arm_rs_r5_t6_c9,
+	arm_rs_r6_t6_c9,
+	arm_rs_r7_t6_c9,
+	arm_rs_r8_t6_c9,
+	arm_rs_r9_t6_c9,
+	arm_rs_r10_t6_c9,
+	arm_rs_r11_t6_c9,
+	arm_rs_r12_t6_c9,
+	arm_rs_r13_t6_c9,
+	arm_rs_r14_t6_c9,
+	arm_rs_r15_t6_c9,
+	arm_rs_r0_t7_c9,
+	arm_rs_r1_t7_c9,
+	arm_rs_r2_t7_c9,
+	arm_rs_r3_t7_c9,
+	arm_rs_r4_t7_c9,
+	arm_rs_r5_t7_c9,
+	arm_rs_r6_t7_c9,
+	arm_rs_r7_t7_c9,
+	arm_rs_r8_t7_c9,
+	arm_rs_r9_t7_c9,
+	arm_rs_r10_t7_c9,
+	arm_rs_r11_t7_c9,
+	arm_rs_r12_t7_c9,
+	arm_rs_r13_t7_c9,
+	arm_rs_r14_t7_c9,
+	arm_rs_r15_t7_c9,
+	arm_rs_r0_t0_c10,
+	arm_rs_r1_t0_c10,
+	arm_rs_r2_t0_c10,
+	arm_rs_r3_t0_c10,
+	arm_rs_r4_t0_c10,
+	arm_rs_r5_t0_c10,
+	arm_rs_r6_t0_c10,
+	arm_rs_r7_t0_c10,
+	arm_rs_r8_t0_c10,
+	arm_rs_r9_t0_c10,
+	arm_rs_r10_t0_c10,
+	arm_rs_r11_t0_c10,
+	arm_rs_r12_t0_c10,
+	arm_rs_r13_t0_c10,
+	arm_rs_r14_t0_c10,
+	arm_rs_r15_t0_c10,
+	arm_rs_r0_t1_c10,
+	arm_rs_r1_t1_c10,
+	arm_rs_r2_t1_c10,
+	arm_rs_r3_t1_c10,
+	arm_rs_r4_t1_c10,
+	arm_rs_r5_t1_c10,
+	arm_rs_r6_t1_c10,
+	arm_rs_r7_t1_c10,
+	arm_rs_r8_t1_c10,
+	arm_rs_r9_t1_c10,
+	arm_rs_r10_t1_c10,
+	arm_rs_r11_t1_c10,
+	arm_rs_r12_t1_c10,
+	arm_rs_r13_t1_c10,
+	arm_rs_r14_t1_c10,
+	arm_rs_r15_t1_c10,
+	arm_rs_r0_t2_c10,
+	arm_rs_r1_t2_c10,
+	arm_rs_r2_t2_c10,
+	arm_rs_r3_t2_c10,
+	arm_rs_r4_t2_c10,
+	arm_rs_r5_t2_c10,
+	arm_rs_r6_t2_c10,
+	arm_rs_r7_t2_c10,
+	arm_rs_r8_t2_c10,
+	arm_rs_r9_t2_c10,
+	arm_rs_r10_t2_c10,
+	arm_rs_r11_t2_c10,
+	arm_rs_r12_t2_c10,
+	arm_rs_r13_t2_c10,
+	arm_rs_r14_t2_c10,
+	arm_rs_r15_t2_c10,
+	arm_rs_r0_t3_c10,
+	arm_rs_r1_t3_c10,
+	arm_rs_r2_t3_c10,
+	arm_rs_r3_t3_c10,
+	arm_rs_r4_t3_c10,
+	arm_rs_r5_t3_c10,
+	arm_rs_r6_t3_c10,
+	arm_rs_r7_t3_c10,
+	arm_rs_r8_t3_c10,
+	arm_rs_r9_t3_c10,
+	arm_rs_r10_t3_c10,
+	arm_rs_r11_t3_c10,
+	arm_rs_r12_t3_c10,
+	arm_rs_r13_t3_c10,
+	arm_rs_r14_t3_c10,
+	arm_rs_r15_t3_c10,
+	arm_rs_r0_t4_c10,
+	arm_rs_r1_t4_c10,
+	arm_rs_r2_t4_c10,
+	arm_rs_r3_t4_c10,
+	arm_rs_r4_t4_c10,
+	arm_rs_r5_t4_c10,
+	arm_rs_r6_t4_c10,
+	arm_rs_r7_t4_c10,
+	arm_rs_r8_t4_c10,
+	arm_rs_r9_t4_c10,
+	arm_rs_r10_t4_c10,
+	arm_rs_r11_t4_c10,
+	arm_rs_r12_t4_c10,
+	arm_rs_r13_t4_c10,
+	arm_rs_r14_t4_c10,
+	arm_rs_r15_t4_c10,
+	arm_rs_r0_t5_c10,
+	arm_rs_r1_t5_c10,
+	arm_rs_r2_t5_c10,
+	arm_rs_r3_t5_c10,
+	arm_rs_r4_t5_c10,
+	arm_rs_r5_t5_c10,
+	arm_rs_r6_t5_c10,
+	arm_rs_r7_t5_c10,
+	arm_rs_r8_t5_c10,
+	arm_rs_r9_t5_c10,
+	arm_rs_r10_t5_c10,
+	arm_rs_r11_t5_c10,
+	arm_rs_r12_t5_c10,
+	arm_rs_r13_t5_c10,
+	arm_rs_r14_t5_c10,
+	arm_rs_r15_t5_c10,
+	arm_rs_r0_t6_c10,
+	arm_rs_r1_t6_c10,
+	arm_rs_r2_t6_c10,
+	arm_rs_r3_t6_c10,
+	arm_rs_r4_t6_c10,
+	arm_rs_r5_t6_c10,
+	arm_rs_r6_t6_c10,
+	arm_rs_r7_t6_c10,
+	arm_rs_r8_t6_c10,
+	arm_rs_r9_t6_c10,
+	arm_rs_r10_t6_c10,
+	arm_rs_r11_t6_c10,
+	arm_rs_r12_t6_c10,
+	arm_rs_r13_t6_c10,
+	arm_rs_r14_t6_c10,
+	arm_rs_r15_t6_c10,
+	arm_rs_r0_t7_c10,
+	arm_rs_r1_t7_c10,
+	arm_rs_r2_t7_c10,
+	arm_rs_r3_t7_c10,
+	arm_rs_r4_t7_c10,
+	arm_rs_r5_t7_c10,
+	arm_rs_r6_t7_c10,
+	arm_rs_r7_t7_c10,
+	arm_rs_r8_t7_c10,
+	arm_rs_r9_t7_c10,
+	arm_rs_r10_t7_c10,
+	arm_rs_r11_t7_c10,
+	arm_rs_r12_t7_c10,
+	arm_rs_r13_t7_c10,
+	arm_rs_r14_t7_c10,
+	arm_rs_r15_t7_c10,
+	arm_rs_r0_t0_c11,
+	arm_rs_r1_t0_c11,
+	arm_rs_r2_t0_c11,
+	arm_rs_r3_t0_c11,
+	arm_rs_r4_t0_c11,
+	arm_rs_r5_t0_c11,
+	arm_rs_r6_t0_c11,
+	arm_rs_r7_t0_c11,
+	arm_rs_r8_t0_c11,
+	arm_rs_r9_t0_c11,
+	arm_rs_r10_t0_c11,
+	arm_rs_r11_t0_c11,
+	arm_rs_r12_t0_c11,
+	arm_rs_r13_t0_c11,
+	arm_rs_r14_t0_c11,
+	arm_rs_r15_t0_c11,
+	arm_rs_r0_t1_c11,
+	arm_rs_r1_t1_c11,
+	arm_rs_r2_t1_c11,
+	arm_rs_r3_t1_c11,
+	arm_rs_r4_t1_c11,
+	arm_rs_r5_t1_c11,
+	arm_rs_r6_t1_c11,
+	arm_rs_r7_t1_c11,
+	arm_rs_r8_t1_c11,
+	arm_rs_r9_t1_c11,
+	arm_rs_r10_t1_c11,
+	arm_rs_r11_t1_c11,
+	arm_rs_r12_t1_c11,
+	arm_rs_r13_t1_c11,
+	arm_rs_r14_t1_c11,
+	arm_rs_r15_t1_c11,
+	arm_rs_r0_t2_c11,
+	arm_rs_r1_t2_c11,
+	arm_rs_r2_t2_c11,
+	arm_rs_r3_t2_c11,
+	arm_rs_r4_t2_c11,
+	arm_rs_r5_t2_c11,
+	arm_rs_r6_t2_c11,
+	arm_rs_r7_t2_c11,
+	arm_rs_r8_t2_c11,
+	arm_rs_r9_t2_c11,
+	arm_rs_r10_t2_c11,
+	arm_rs_r11_t2_c11,
+	arm_rs_r12_t2_c11,
+	arm_rs_r13_t2_c11,
+	arm_rs_r14_t2_c11,
+	arm_rs_r15_t2_c11,
+	arm_rs_r0_t3_c11,
+	arm_rs_r1_t3_c11,
+	arm_rs_r2_t3_c11,
+	arm_rs_r3_t3_c11,
+	arm_rs_r4_t3_c11,
+	arm_rs_r5_t3_c11,
+	arm_rs_r6_t3_c11,
+	arm_rs_r7_t3_c11,
+	arm_rs_r8_t3_c11,
+	arm_rs_r9_t3_c11,
+	arm_rs_r10_t3_c11,
+	arm_rs_r11_t3_c11,
+	arm_rs_r12_t3_c11,
+	arm_rs_r13_t3_c11,
+	arm_rs_r14_t3_c11,
+	arm_rs_r15_t3_c11,
+	arm_rs_r0_t4_c11,
+	arm_rs_r1_t4_c11,
+	arm_rs_r2_t4_c11,
+	arm_rs_r3_t4_c11,
+	arm_rs_r4_t4_c11,
+	arm_rs_r5_t4_c11,
+	arm_rs_r6_t4_c11,
+	arm_rs_r7_t4_c11,
+	arm_rs_r8_t4_c11,
+	arm_rs_r9_t4_c11,
+	arm_rs_r10_t4_c11,
+	arm_rs_r11_t4_c11,
+	arm_rs_r12_t4_c11,
+	arm_rs_r13_t4_c11,
+	arm_rs_r14_t4_c11,
+	arm_rs_r15_t4_c11,
+	arm_rs_r0_t5_c11,
+	arm_rs_r1_t5_c11,
+	arm_rs_r2_t5_c11,
+	arm_rs_r3_t5_c11,
+	arm_rs_r4_t5_c11,
+	arm_rs_r5_t5_c11,
+	arm_rs_r6_t5_c11,
+	arm_rs_r7_t5_c11,
+	arm_rs_r8_t5_c11,
+	arm_rs_r9_t5_c11,
+	arm_rs_r10_t5_c11,
+	arm_rs_r11_t5_c11,
+	arm_rs_r12_t5_c11,
+	arm_rs_r13_t5_c11,
+	arm_rs_r14_t5_c11,
+	arm_rs_r15_t5_c11,
+	arm_rs_r0_t6_c11,
+	arm_rs_r1_t6_c11,
+	arm_rs_r2_t6_c11,
+	arm_rs_r3_t6_c11,
+	arm_rs_r4_t6_c11,
+	arm_rs_r5_t6_c11,
+	arm_rs_r6_t6_c11,
+	arm_rs_r7_t6_c11,
+	arm_rs_r8_t6_c11,
+	arm_rs_r9_t6_c11,
+	arm_rs_r10_t6_c11,
+	arm_rs_r11_t6_c11,
+	arm_rs_r12_t6_c11,
+	arm_rs_r13_t6_c11,
+	arm_rs_r14_t6_c11,
+	arm_rs_r15_t6_c11,
+	arm_rs_r0_t7_c11,
+	arm_rs_r1_t7_c11,
+	arm_rs_r2_t7_c11,
+	arm_rs_r3_t7_c11,
+	arm_rs_r4_t7_c11,
+	arm_rs_r5_t7_c11,
+	arm_rs_r6_t7_c11,
+	arm_rs_r7_t7_c11,
+	arm_rs_r8_t7_c11,
+	arm_rs_r9_t7_c11,
+	arm_rs_r10_t7_c11,
+	arm_rs_r11_t7_c11,
+	arm_rs_r12_t7_c11,
+	arm_rs_r13_t7_c11,
+	arm_rs_r14_t7_c11,
+	arm_rs_r15_t7_c11,
+	arm_rs_r0_t0_c12,
+	arm_rs_r1_t0_c12,
+	arm_rs_r2_t0_c12,
+	arm_rs_r3_t0_c12,
+	arm_rs_r4_t0_c12,
+	arm_rs_r5_t0_c12,
+	arm_rs_r6_t0_c12,
+	arm_rs_r7_t0_c12,
+	arm_rs_r8_t0_c12,
+	arm_rs_r9_t0_c12,
+	arm_rs_r10_t0_c12,
+	arm_rs_r11_t0_c12,
+	arm_rs_r12_t0_c12,
+	arm_rs_r13_t0_c12,
+	arm_rs_r14_t0_c12,
+	arm_rs_r15_t0_c12,
+	arm_rs_r0_t1_c12,
+	arm_rs_r1_t1_c12,
+	arm_rs_r2_t1_c12,
+	arm_rs_r3_t1_c12,
+	arm_rs_r4_t1_c12,
+	arm_rs_r5_t1_c12,
+	arm_rs_r6_t1_c12,
+	arm_rs_r7_t1_c12,
+	arm_rs_r8_t1_c12,
+	arm_rs_r9_t1_c12,
+	arm_rs_r10_t1_c12,
+	arm_rs_r11_t1_c12,
+	arm_rs_r12_t1_c12,
+	arm_rs_r13_t1_c12,
+	arm_rs_r14_t1_c12,
+	arm_rs_r15_t1_c12,
+	arm_rs_r0_t2_c12,
+	arm_rs_r1_t2_c12,
+	arm_rs_r2_t2_c12,
+	arm_rs_r3_t2_c12,
+	arm_rs_r4_t2_c12,
+	arm_rs_r5_t2_c12,
+	arm_rs_r6_t2_c12,
+	arm_rs_r7_t2_c12,
+	arm_rs_r8_t2_c12,
+	arm_rs_r9_t2_c12,
+	arm_rs_r10_t2_c12,
+	arm_rs_r11_t2_c12,
+	arm_rs_r12_t2_c12,
+	arm_rs_r13_t2_c12,
+	arm_rs_r14_t2_c12,
+	arm_rs_r15_t2_c12,
+	arm_rs_r0_t3_c12,
+	arm_rs_r1_t3_c12,
+	arm_rs_r2_t3_c12,
+	arm_rs_r3_t3_c12,
+	arm_rs_r4_t3_c12,
+	arm_rs_r5_t3_c12,
+	arm_rs_r6_t3_c12,
+	arm_rs_r7_t3_c12,
+	arm_rs_r8_t3_c12,
+	arm_rs_r9_t3_c12,
+	arm_rs_r10_t3_c12,
+	arm_rs_r11_t3_c12,
+	arm_rs_r12_t3_c12,
+	arm_rs_r13_t3_c12,
+	arm_rs_r14_t3_c12,
+	arm_rs_r15_t3_c12,
+	arm_rs_r0_t4_c12,
+	arm_rs_r1_t4_c12,
+	arm_rs_r2_t4_c12,
+	arm_rs_r3_t4_c12,
+	arm_rs_r4_t4_c12,
+	arm_rs_r5_t4_c12,
+	arm_rs_r6_t4_c12,
+	arm_rs_r7_t4_c12,
+	arm_rs_r8_t4_c12,
+	arm_rs_r9_t4_c12,
+	arm_rs_r10_t4_c12,
+	arm_rs_r11_t4_c12,
+	arm_rs_r12_t4_c12,
+	arm_rs_r13_t4_c12,
+	arm_rs_r14_t4_c12,
+	arm_rs_r15_t4_c12,
+	arm_rs_r0_t5_c12,
+	arm_rs_r1_t5_c12,
+	arm_rs_r2_t5_c12,
+	arm_rs_r3_t5_c12,
+	arm_rs_r4_t5_c12,
+	arm_rs_r5_t5_c12,
+	arm_rs_r6_t5_c12,
+	arm_rs_r7_t5_c12,
+	arm_rs_r8_t5_c12,
+	arm_rs_r9_t5_c12,
+	arm_rs_r10_t5_c12,
+	arm_rs_r11_t5_c12,
+	arm_rs_r12_t5_c12,
+	arm_rs_r13_t5_c12,
+	arm_rs_r14_t5_c12,
+	arm_rs_r15_t5_c12,
+	arm_rs_r0_t6_c12,
+	arm_rs_r1_t6_c12,
+	arm_rs_r2_t6_c12,
+	arm_rs_r3_t6_c12,
+	arm_rs_r4_t6_c12,
+	arm_rs_r5_t6_c12,
+	arm_rs_r6_t6_c12,
+	arm_rs_r7_t6_c12,
+	arm_rs_r8_t6_c12,
+	arm_rs_r9_t6_c12,
+	arm_rs_r10_t6_c12,
+	arm_rs_r11_t6_c12,
+	arm_rs_r12_t6_c12,
+	arm_rs_r13_t6_c12,
+	arm_rs_r14_t6_c12,
+	arm_rs_r15_t6_c12,
+	arm_rs_r0_t7_c12,
+	arm_rs_r1_t7_c12,
+	arm_rs_r2_t7_c12,
+	arm_rs_r3_t7_c12,
+	arm_rs_r4_t7_c12,
+	arm_rs_r5_t7_c12,
+	arm_rs_r6_t7_c12,
+	arm_rs_r7_t7_c12,
+	arm_rs_r8_t7_c12,
+	arm_rs_r9_t7_c12,
+	arm_rs_r10_t7_c12,
+	arm_rs_r11_t7_c12,
+	arm_rs_r12_t7_c12,
+	arm_rs_r13_t7_c12,
+	arm_rs_r14_t7_c12,
+	arm_rs_r15_t7_c12,
+	arm_rs_r0_t0_c13,
+	arm_rs_r1_t0_c13,
+	arm_rs_r2_t0_c13,
+	arm_rs_r3_t0_c13,
+	arm_rs_r4_t0_c13,
+	arm_rs_r5_t0_c13,
+	arm_rs_r6_t0_c13,
+	arm_rs_r7_t0_c13,
+	arm_rs_r8_t0_c13,
+	arm_rs_r9_t0_c13,
+	arm_rs_r10_t0_c13,
+	arm_rs_r11_t0_c13,
+	arm_rs_r12_t0_c13,
+	arm_rs_r13_t0_c13,
+	arm_rs_r14_t0_c13,
+	arm_rs_r15_t0_c13,
+	arm_rs_r0_t1_c13,
+	arm_rs_r1_t1_c13,
+	arm_rs_r2_t1_c13,
+	arm_rs_r3_t1_c13,
+	arm_rs_r4_t1_c13,
+	arm_rs_r5_t1_c13,
+	arm_rs_r6_t1_c13,
+	arm_rs_r7_t1_c13,
+	arm_rs_r8_t1_c13,
+	arm_rs_r9_t1_c13,
+	arm_rs_r10_t1_c13,
+	arm_rs_r11_t1_c13,
+	arm_rs_r12_t1_c13,
+	arm_rs_r13_t1_c13,
+	arm_rs_r14_t1_c13,
+	arm_rs_r15_t1_c13,
+	arm_rs_r0_t2_c13,
+	arm_rs_r1_t2_c13,
+	arm_rs_r2_t2_c13,
+	arm_rs_r3_t2_c13,
+	arm_rs_r4_t2_c13,
+	arm_rs_r5_t2_c13,
+	arm_rs_r6_t2_c13,
+	arm_rs_r7_t2_c13,
+	arm_rs_r8_t2_c13,
+	arm_rs_r9_t2_c13,
+	arm_rs_r10_t2_c13,
+	arm_rs_r11_t2_c13,
+	arm_rs_r12_t2_c13,
+	arm_rs_r13_t2_c13,
+	arm_rs_r14_t2_c13,
+	arm_rs_r15_t2_c13,
+	arm_rs_r0_t3_c13,
+	arm_rs_r1_t3_c13,
+	arm_rs_r2_t3_c13,
+	arm_rs_r3_t3_c13,
+	arm_rs_r4_t3_c13,
+	arm_rs_r5_t3_c13,
+	arm_rs_r6_t3_c13,
+	arm_rs_r7_t3_c13,
+	arm_rs_r8_t3_c13,
+	arm_rs_r9_t3_c13,
+	arm_rs_r10_t3_c13,
+	arm_rs_r11_t3_c13,
+	arm_rs_r12_t3_c13,
+	arm_rs_r13_t3_c13,
+	arm_rs_r14_t3_c13,
+	arm_rs_r15_t3_c13,
+	arm_rs_r0_t4_c13,
+	arm_rs_r1_t4_c13,
+	arm_rs_r2_t4_c13,
+	arm_rs_r3_t4_c13,
+	arm_rs_r4_t4_c13,
+	arm_rs_r5_t4_c13,
+	arm_rs_r6_t4_c13,
+	arm_rs_r7_t4_c13,
+	arm_rs_r8_t4_c13,
+	arm_rs_r9_t4_c13,
+	arm_rs_r10_t4_c13,
+	arm_rs_r11_t4_c13,
+	arm_rs_r12_t4_c13,
+	arm_rs_r13_t4_c13,
+	arm_rs_r14_t4_c13,
+	arm_rs_r15_t4_c13,
+	arm_rs_r0_t5_c13,
+	arm_rs_r1_t5_c13,
+	arm_rs_r2_t5_c13,
+	arm_rs_r3_t5_c13,
+	arm_rs_r4_t5_c13,
+	arm_rs_r5_t5_c13,
+	arm_rs_r6_t5_c13,
+	arm_rs_r7_t5_c13,
+	arm_rs_r8_t5_c13,
+	arm_rs_r9_t5_c13,
+	arm_rs_r10_t5_c13,
+	arm_rs_r11_t5_c13,
+	arm_rs_r12_t5_c13,
+	arm_rs_r13_t5_c13,
+	arm_rs_r14_t5_c13,
+	arm_rs_r15_t5_c13,
+	arm_rs_r0_t6_c13,
+	arm_rs_r1_t6_c13,
+	arm_rs_r2_t6_c13,
+	arm_rs_r3_t6_c13,
+	arm_rs_r4_t6_c13,
+	arm_rs_r5_t6_c13,
+	arm_rs_r6_t6_c13,
+	arm_rs_r7_t6_c13,
+	arm_rs_r8_t6_c13,
+	arm_rs_r9_t6_c13,
+	arm_rs_r10_t6_c13,
+	arm_rs_r11_t6_c13,
+	arm_rs_r12_t6_c13,
+	arm_rs_r13_t6_c13,
+	arm_rs_r14_t6_c13,
+	arm_rs_r15_t6_c13,
+	arm_rs_r0_t7_c13,
+	arm_rs_r1_t7_c13,
+	arm_rs_r2_t7_c13,
+	arm_rs_r3_t7_c13,
+	arm_rs_r4_t7_c13,
+	arm_rs_r5_t7_c13,
+	arm_rs_r6_t7_c13,
+	arm_rs_r7_t7_c13,
+	arm_rs_r8_t7_c13,
+	arm_rs_r9_t7_c13,
+	arm_rs_r10_t7_c13,
+	arm_rs_r11_t7_c13,
+	arm_rs_r12_t7_c13,
+	arm_rs_r13_t7_c13,
+	arm_rs_r14_t7_c13,
+	arm_rs_r15_t7_c13,
+	arm_rs_r0_t0_c14,
+	arm_rs_r1_t0_c14,
+	arm_rs_r2_t0_c14,
+	arm_rs_r3_t0_c14,
+	arm_rs_r4_t0_c14,
+	arm_rs_r5_t0_c14,
+	arm_rs_r6_t0_c14,
+	arm_rs_r7_t0_c14,
+	arm_rs_r8_t0_c14,
+	arm_rs_r9_t0_c14,
+	arm_rs_r10_t0_c14,
+	arm_rs_r11_t0_c14,
+	arm_rs_r12_t0_c14,
+	arm_rs_r13_t0_c14,
+	arm_rs_r14_t0_c14,
+	arm_rs_r15_t0_c14,
+	arm_rs_r0_t1_c14,
+	arm_rs_r1_t1_c14,
+	arm_rs_r2_t1_c14,
+	arm_rs_r3_t1_c14,
+	arm_rs_r4_t1_c14,
+	arm_rs_r5_t1_c14,
+	arm_rs_r6_t1_c14,
+	arm_rs_r7_t1_c14,
+	arm_rs_r8_t1_c14,
+	arm_rs_r9_t1_c14,
+	arm_rs_r10_t1_c14,
+	arm_rs_r11_t1_c14,
+	arm_rs_r12_t1_c14,
+	arm_rs_r13_t1_c14,
+	arm_rs_r14_t1_c14,
+	arm_rs_r15_t1_c14,
+	arm_rs_r0_t2_c14,
+	arm_rs_r1_t2_c14,
+	arm_rs_r2_t2_c14,
+	arm_rs_r3_t2_c14,
+	arm_rs_r4_t2_c14,
+	arm_rs_r5_t2_c14,
+	arm_rs_r6_t2_c14,
+	arm_rs_r7_t2_c14,
+	arm_rs_r8_t2_c14,
+	arm_rs_r9_t2_c14,
+	arm_rs_r10_t2_c14,
+	arm_rs_r11_t2_c14,
+	arm_rs_r12_t2_c14,
+	arm_rs_r13_t2_c14,
+	arm_rs_r14_t2_c14,
+	arm_rs_r15_t2_c14,
+	arm_rs_r0_t3_c14,
+	arm_rs_r1_t3_c14,
+	arm_rs_r2_t3_c14,
+	arm_rs_r3_t3_c14,
+	arm_rs_r4_t3_c14,
+	arm_rs_r5_t3_c14,
+	arm_rs_r6_t3_c14,
+	arm_rs_r7_t3_c14,
+	arm_rs_r8_t3_c14,
+	arm_rs_r9_t3_c14,
+	arm_rs_r10_t3_c14,
+	arm_rs_r11_t3_c14,
+	arm_rs_r12_t3_c14,
+	arm_rs_r13_t3_c14,
+	arm_rs_r14_t3_c14,
+	arm_rs_r15_t3_c14,
+	arm_rs_r0_t4_c14,
+	arm_rs_r1_t4_c14,
+	arm_rs_r2_t4_c14,
+	arm_rs_r3_t4_c14,
+	arm_rs_r4_t4_c14,
+	arm_rs_r5_t4_c14,
+	arm_rs_r6_t4_c14,
+	arm_rs_r7_t4_c14,
+	arm_rs_r8_t4_c14,
+	arm_rs_r9_t4_c14,
+	arm_rs_r10_t4_c14,
+	arm_rs_r11_t4_c14,
+	arm_rs_r12_t4_c14,
+	arm_rs_r13_t4_c14,
+	arm_rs_r14_t4_c14,
+	arm_rs_r15_t4_c14,
+	arm_rs_r0_t5_c14,
+	arm_rs_r1_t5_c14,
+	arm_rs_r2_t5_c14,
+	arm_rs_r3_t5_c14,
+	arm_rs_r4_t5_c14,
+	arm_rs_r5_t5_c14,
+	arm_rs_r6_t5_c14,
+	arm_rs_r7_t5_c14,
+	arm_rs_r8_t5_c14,
+	arm_rs_r9_t5_c14,
+	arm_rs_r10_t5_c14,
+	arm_rs_r11_t5_c14,
+	arm_rs_r12_t5_c14,
+	arm_rs_r13_t5_c14,
+	arm_rs_r14_t5_c14,
+	arm_rs_r15_t5_c14,
+	arm_rs_r0_t6_c14,
+	arm_rs_r1_t6_c14,
+	arm_rs_r2_t6_c14,
+	arm_rs_r3_t6_c14,
+	arm_rs_r4_t6_c14,
+	arm_rs_r5_t6_c14,
+	arm_rs_r6_t6_c14,
+	arm_rs_r7_t6_c14,
+	arm_rs_r8_t6_c14,
+	arm_rs_r9_t6_c14,
+	arm_rs_r10_t6_c14,
+	arm_rs_r11_t6_c14,
+	arm_rs_r12_t6_c14,
+	arm_rs_r13_t6_c14,
+	arm_rs_r14_t6_c14,
+	arm_rs_r15_t6_c14,
+	arm_rs_r0_t7_c14,
+	arm_rs_r1_t7_c14,
+	arm_rs_r2_t7_c14,
+	arm_rs_r3_t7_c14,
+	arm_rs_r4_t7_c14,
+	arm_rs_r5_t7_c14,
+	arm_rs_r6_t7_c14,
+	arm_rs_r7_t7_c14,
+	arm_rs_r8_t7_c14,
+	arm_rs_r9_t7_c14,
+	arm_rs_r10_t7_c14,
+	arm_rs_r11_t7_c14,
+	arm_rs_r12_t7_c14,
+	arm_rs_r13_t7_c14,
+	arm_rs_r14_t7_c14,
+	arm_rs_r15_t7_c14,
+	arm_rs_r0_t0_c15,
+	arm_rs_r1_t0_c15,
+	arm_rs_r2_t0_c15,
+	arm_rs_r3_t0_c15,
+	arm_rs_r4_t0_c15,
+	arm_rs_r5_t0_c15,
+	arm_rs_r6_t0_c15,
+	arm_rs_r7_t0_c15,
+	arm_rs_r8_t0_c15,
+	arm_rs_r9_t0_c15,
+	arm_rs_r10_t0_c15,
+	arm_rs_r11_t0_c15,
+	arm_rs_r12_t0_c15,
+	arm_rs_r13_t0_c15,
+	arm_rs_r14_t0_c15,
+	arm_rs_r15_t0_c15,
+	arm_rs_r0_t1_c15,
+	arm_rs_r1_t1_c15,
+	arm_rs_r2_t1_c15,
+	arm_rs_r3_t1_c15,
+	arm_rs_r4_t1_c15,
+	arm_rs_r5_t1_c15,
+	arm_rs_r6_t1_c15,
+	arm_rs_r7_t1_c15,
+	arm_rs_r8_t1_c15,
+	arm_rs_r9_t1_c15,
+	arm_rs_r10_t1_c15,
+	arm_rs_r11_t1_c15,
+	arm_rs_r12_t1_c15,
+	arm_rs_r13_t1_c15,
+	arm_rs_r14_t1_c15,
+	arm_rs_r15_t1_c15,
+	arm_rs_r0_t2_c15,
+	arm_rs_r1_t2_c15,
+	arm_rs_r2_t2_c15,
+	arm_rs_r3_t2_c15,
+	arm_rs_r4_t2_c15,
+	arm_rs_r5_t2_c15,
+	arm_rs_r6_t2_c15,
+	arm_rs_r7_t2_c15,
+	arm_rs_r8_t2_c15,
+	arm_rs_r9_t2_c15,
+	arm_rs_r10_t2_c15,
+	arm_rs_r11_t2_c15,
+	arm_rs_r12_t2_c15,
+	arm_rs_r13_t2_c15,
+	arm_rs_r14_t2_c15,
+	arm_rs_r15_t2_c15,
+	arm_rs_r0_t3_c15,
+	arm_rs_r1_t3_c15,
+	arm_rs_r2_t3_c15,
+	arm_rs_r3_t3_c15,
+	arm_rs_r4_t3_c15,
+	arm_rs_r5_t3_c15,
+	arm_rs_r6_t3_c15,
+	arm_rs_r7_t3_c15,
+	arm_rs_r8_t3_c15,
+	arm_rs_r9_t3_c15,
+	arm_rs_r10_t3_c15,
+	arm_rs_r11_t3_c15,
+	arm_rs_r12_t3_c15,
+	arm_rs_r13_t3_c15,
+	arm_rs_r14_t3_c15,
+	arm_rs_r15_t3_c15,
+	arm_rs_r0_t4_c15,
+	arm_rs_r1_t4_c15,
+	arm_rs_r2_t4_c15,
+	arm_rs_r3_t4_c15,
+	arm_rs_r4_t4_c15,
+	arm_rs_r5_t4_c15,
+	arm_rs_r6_t4_c15,
+	arm_rs_r7_t4_c15,
+	arm_rs_r8_t4_c15,
+	arm_rs_r9_t4_c15,
+	arm_rs_r10_t4_c15,
+	arm_rs_r11_t4_c15,
+	arm_rs_r12_t4_c15,
+	arm_rs_r13_t4_c15,
+	arm_rs_r14_t4_c15,
+	arm_rs_r15_t4_c15,
+	arm_rs_r0_t5_c15,
+	arm_rs_r1_t5_c15,
+	arm_rs_r2_t5_c15,
+	arm_rs_r3_t5_c15,
+	arm_rs_r4_t5_c15,
+	arm_rs_r5_t5_c15,
+	arm_rs_r6_t5_c15,
+	arm_rs_r7_t5_c15,
+	arm_rs_r8_t5_c15,
+	arm_rs_r9_t5_c15,
+	arm_rs_r10_t5_c15,
+	arm_rs_r11_t5_c15,
+	arm_rs_r12_t5_c15,
+	arm_rs_r13_t5_c15,
+	arm_rs_r14_t5_c15,
+	arm_rs_r15_t5_c15,
+	arm_rs_r0_t6_c15,
+	arm_rs_r1_t6_c15,
+	arm_rs_r2_t6_c15,
+	arm_rs_r3_t6_c15,
+	arm_rs_r4_t6_c15,
+	arm_rs_r5_t6_c15,
+	arm_rs_r6_t6_c15,
+	arm_rs_r7_t6_c15,
+	arm_rs_r8_t6_c15,
+	arm_rs_r9_t6_c15,
+	arm_rs_r10_t6_c15,
+	arm_rs_r11_t6_c15,
+	arm_rs_r12_t6_c15,
+	arm_rs_r13_t6_c15,
+	arm_rs_r14_t6_c15,
+	arm_rs_r15_t6_c15,
+	arm_rs_r0_t7_c15,
+	arm_rs_r1_t7_c15,
+	arm_rs_r2_t7_c15,
+	arm_rs_r3_t7_c15,
+	arm_rs_r4_t7_c15,
+	arm_rs_r5_t7_c15,
+	arm_rs_r6_t7_c15,
+	arm_rs_r7_t7_c15,
+	arm_rs_r8_t7_c15,
+	arm_rs_r9_t7_c15,
+	arm_rs_r10_t7_c15,
+	arm_rs_r11_t7_c15,
+	arm_rs_r12_t7_c15,
+	arm_rs_r13_t7_c15,
+	arm_rs_r14_t7_c15,
+	arm_rs_r15_t7_c15,
+	arm_rs_r0_t0_c16,
+	arm_rs_r1_t0_c16,
+	arm_rs_r2_t0_c16,
+	arm_rs_r3_t0_c16,
+	arm_rs_r4_t0_c16,
+	arm_rs_r5_t0_c16,
+	arm_rs_r6_t0_c16,
+	arm_rs_r7_t0_c16,
+	arm_rs_r8_t0_c16,
+	arm_rs_r9_t0_c16,
+	arm_rs_r10_t0_c16,
+	arm_rs_r11_t0_c16,
+	arm_rs_r12_t0_c16,
+	arm_rs_r13_t0_c16,
+	arm_rs_r14_t0_c16,
+	arm_rs_r15_t0_c16,
+	arm_rs_r0_t1_c16,
+	arm_rs_r1_t1_c16,
+	arm_rs_r2_t1_c16,
+	arm_rs_r3_t1_c16,
+	arm_rs_r4_t1_c16,
+	arm_rs_r5_t1_c16,
+	arm_rs_r6_t1_c16,
+	arm_rs_r7_t1_c16,
+	arm_rs_r8_t1_c16,
+	arm_rs_r9_t1_c16,
+	arm_rs_r10_t1_c16,
+	arm_rs_r11_t1_c16,
+	arm_rs_r12_t1_c16,
+	arm_rs_r13_t1_c16,
+	arm_rs_r14_t1_c16,
+	arm_rs_r15_t1_c16,
+	arm_rs_r0_t2_c16,
+	arm_rs_r1_t2_c16,
+	arm_rs_r2_t2_c16,
+	arm_rs_r3_t2_c16,
+	arm_rs_r4_t2_c16,
+	arm_rs_r5_t2_c16,
+	arm_rs_r6_t2_c16,
+	arm_rs_r7_t2_c16,
+	arm_rs_r8_t2_c16,
+	arm_rs_r9_t2_c16,
+	arm_rs_r10_t2_c16,
+	arm_rs_r11_t2_c16,
+	arm_rs_r12_t2_c16,
+	arm_rs_r13_t2_c16,
+	arm_rs_r14_t2_c16,
+	arm_rs_r15_t2_c16,
+	arm_rs_r0_t3_c16,
+	arm_rs_r1_t3_c16,
+	arm_rs_r2_t3_c16,
+	arm_rs_r3_t3_c16,
+	arm_rs_r4_t3_c16,
+	arm_rs_r5_t3_c16,
+	arm_rs_r6_t3_c16,
+	arm_rs_r7_t3_c16,
+	arm_rs_r8_t3_c16,
+	arm_rs_r9_t3_c16,
+	arm_rs_r10_t3_c16,
+	arm_rs_r11_t3_c16,
+	arm_rs_r12_t3_c16,
+	arm_rs_r13_t3_c16,
+	arm_rs_r14_t3_c16,
+	arm_rs_r15_t3_c16,
+	arm_rs_r0_t4_c16,
+	arm_rs_r1_t4_c16,
+	arm_rs_r2_t4_c16,
+	arm_rs_r3_t4_c16,
+	arm_rs_r4_t4_c16,
+	arm_rs_r5_t4_c16,
+	arm_rs_r6_t4_c16,
+	arm_rs_r7_t4_c16,
+	arm_rs_r8_t4_c16,
+	arm_rs_r9_t4_c16,
+	arm_rs_r10_t4_c16,
+	arm_rs_r11_t4_c16,
+	arm_rs_r12_t4_c16,
+	arm_rs_r13_t4_c16,
+	arm_rs_r14_t4_c16,
+	arm_rs_r15_t4_c16,
+	arm_rs_r0_t5_c16,
+	arm_rs_r1_t5_c16,
+	arm_rs_r2_t5_c16,
+	arm_rs_r3_t5_c16,
+	arm_rs_r4_t5_c16,
+	arm_rs_r5_t5_c16,
+	arm_rs_r6_t5_c16,
+	arm_rs_r7_t5_c16,
+	arm_rs_r8_t5_c16,
+	arm_rs_r9_t5_c16,
+	arm_rs_r10_t5_c16,
+	arm_rs_r11_t5_c16,
+	arm_rs_r12_t5_c16,
+	arm_rs_r13_t5_c16,
+	arm_rs_r14_t5_c16,
+	arm_rs_r15_t5_c16,
+	arm_rs_r0_t6_c16,
+	arm_rs_r1_t6_c16,
+	arm_rs_r2_t6_c16,
+	arm_rs_r3_t6_c16,
+	arm_rs_r4_t6_c16,
+	arm_rs_r5_t6_c16,
+	arm_rs_r6_t6_c16,
+	arm_rs_r7_t6_c16,
+	arm_rs_r8_t6_c16,
+	arm_rs_r9_t6_c16,
+	arm_rs_r10_t6_c16,
+	arm_rs_r11_t6_c16,
+	arm_rs_r12_t6_c16,
+	arm_rs_r13_t6_c16,
+	arm_rs_r14_t6_c16,
+	arm_rs_r15_t6_c16,
+	arm_rs_r0_t7_c16,
+	arm_rs_r1_t7_c16,
+	arm_rs_r2_t7_c16,
+	arm_rs_r3_t7_c16,
+	arm_rs_r4_t7_c16,
+	arm_rs_r5_t7_c16,
+	arm_rs_r6_t7_c16,
+	arm_rs_r7_t7_c16,
+	arm_rs_r8_t7_c16,
+	arm_rs_r9_t7_c16,
+	arm_rs_r10_t7_c16,
+	arm_rs_r11_t7_c16,
+	arm_rs_r12_t7_c16,
+	arm_rs_r13_t7_c16,
+	arm_rs_r14_t7_c16,
+	arm_rs_r15_t7_c16,
+	arm_rs_r0_t0_c17,
+	arm_rs_r1_t0_c17,
+	arm_rs_r2_t0_c17,
+	arm_rs_r3_t0_c17,
+	arm_rs_r4_t0_c17,
+	arm_rs_r5_t0_c17,
+	arm_rs_r6_t0_c17,
+	arm_rs_r7_t0_c17,
+	arm_rs_r8_t0_c17,
+	arm_rs_r9_t0_c17,
+	arm_rs_r10_t0_c17,
+	arm_rs_r11_t0_c17,
+	arm_rs_r12_t0_c17,
+	arm_rs_r13_t0_c17,
+	arm_rs_r14_t0_c17,
+	arm_rs_r15_t0_c17,
+	arm_rs_r0_t1_c17,
+	arm_rs_r1_t1_c17,
+	arm_rs_r2_t1_c17,
+	arm_rs_r3_t1_c17,
+	arm_rs_r4_t1_c17,
+	arm_rs_r5_t1_c17,
+	arm_rs_r6_t1_c17,
+	arm_rs_r7_t1_c17,
+	arm_rs_r8_t1_c17,
+	arm_rs_r9_t1_c17,
+	arm_rs_r10_t1_c17,
+	arm_rs_r11_t1_c17,
+	arm_rs_r12_t1_c17,
+	arm_rs_r13_t1_c17,
+	arm_rs_r14_t1_c17,
+	arm_rs_r15_t1_c17,
+	arm_rs_r0_t2_c17,
+	arm_rs_r1_t2_c17,
+	arm_rs_r2_t2_c17,
+	arm_rs_r3_t2_c17,
+	arm_rs_r4_t2_c17,
+	arm_rs_r5_t2_c17,
+	arm_rs_r6_t2_c17,
+	arm_rs_r7_t2_c17,
+	arm_rs_r8_t2_c17,
+	arm_rs_r9_t2_c17,
+	arm_rs_r10_t2_c17,
+	arm_rs_r11_t2_c17,
+	arm_rs_r12_t2_c17,
+	arm_rs_r13_t2_c17,
+	arm_rs_r14_t2_c17,
+	arm_rs_r15_t2_c17,
+	arm_rs_r0_t3_c17,
+	arm_rs_r1_t3_c17,
+	arm_rs_r2_t3_c17,
+	arm_rs_r3_t3_c17,
+	arm_rs_r4_t3_c17,
+	arm_rs_r5_t3_c17,
+	arm_rs_r6_t3_c17,
+	arm_rs_r7_t3_c17,
+	arm_rs_r8_t3_c17,
+	arm_rs_r9_t3_c17,
+	arm_rs_r10_t3_c17,
+	arm_rs_r11_t3_c17,
+	arm_rs_r12_t3_c17,
+	arm_rs_r13_t3_c17,
+	arm_rs_r14_t3_c17,
+	arm_rs_r15_t3_c17,
+	arm_rs_r0_t4_c17,
+	arm_rs_r1_t4_c17,
+	arm_rs_r2_t4_c17,
+	arm_rs_r3_t4_c17,
+	arm_rs_r4_t4_c17,
+	arm_rs_r5_t4_c17,
+	arm_rs_r6_t4_c17,
+	arm_rs_r7_t4_c17,
+	arm_rs_r8_t4_c17,
+	arm_rs_r9_t4_c17,
+	arm_rs_r10_t4_c17,
+	arm_rs_r11_t4_c17,
+	arm_rs_r12_t4_c17,
+	arm_rs_r13_t4_c17,
+	arm_rs_r14_t4_c17,
+	arm_rs_r15_t4_c17,
+	arm_rs_r0_t5_c17,
+	arm_rs_r1_t5_c17,
+	arm_rs_r2_t5_c17,
+	arm_rs_r3_t5_c17,
+	arm_rs_r4_t5_c17,
+	arm_rs_r5_t5_c17,
+	arm_rs_r6_t5_c17,
+	arm_rs_r7_t5_c17,
+	arm_rs_r8_t5_c17,
+	arm_rs_r9_t5_c17,
+	arm_rs_r10_t5_c17,
+	arm_rs_r11_t5_c17,
+	arm_rs_r12_t5_c17,
+	arm_rs_r13_t5_c17,
+	arm_rs_r14_t5_c17,
+	arm_rs_r15_t5_c17,
+	arm_rs_r0_t6_c17,
+	arm_rs_r1_t6_c17,
+	arm_rs_r2_t6_c17,
+	arm_rs_r3_t6_c17,
+	arm_rs_r4_t6_c17,
+	arm_rs_r5_t6_c17,
+	arm_rs_r6_t6_c17,
+	arm_rs_r7_t6_c17,
+	arm_rs_r8_t6_c17,
+	arm_rs_r9_t6_c17,
+	arm_rs_r10_t6_c17,
+	arm_rs_r11_t6_c17,
+	arm_rs_r12_t6_c17,
+	arm_rs_r13_t6_c17,
+	arm_rs_r14_t6_c17,
+	arm_rs_r15_t6_c17,
+	arm_rs_r0_t7_c17,
+	arm_rs_r1_t7_c17,
+	arm_rs_r2_t7_c17,
+	arm_rs_r3_t7_c17,
+	arm_rs_r4_t7_c17,
+	arm_rs_r5_t7_c17,
+	arm_rs_r6_t7_c17,
+	arm_rs_r7_t7_c17,
+	arm_rs_r8_t7_c17,
+	arm_rs_r9_t7_c17,
+	arm_rs_r10_t7_c17,
+	arm_rs_r11_t7_c17,
+	arm_rs_r12_t7_c17,
+	arm_rs_r13_t7_c17,
+	arm_rs_r14_t7_c17,
+	arm_rs_r15_t7_c17,
+	arm_rs_r0_t0_c18,
+	arm_rs_r1_t0_c18,
+	arm_rs_r2_t0_c18,
+	arm_rs_r3_t0_c18,
+	arm_rs_r4_t0_c18,
+	arm_rs_r5_t0_c18,
+	arm_rs_r6_t0_c18,
+	arm_rs_r7_t0_c18,
+	arm_rs_r8_t0_c18,
+	arm_rs_r9_t0_c18,
+	arm_rs_r10_t0_c18,
+	arm_rs_r11_t0_c18,
+	arm_rs_r12_t0_c18,
+	arm_rs_r13_t0_c18,
+	arm_rs_r14_t0_c18,
+	arm_rs_r15_t0_c18,
+	arm_rs_r0_t1_c18,
+	arm_rs_r1_t1_c18,
+	arm_rs_r2_t1_c18,
+	arm_rs_r3_t1_c18,
+	arm_rs_r4_t1_c18,
+	arm_rs_r5_t1_c18,
+	arm_rs_r6_t1_c18,
+	arm_rs_r7_t1_c18,
+	arm_rs_r8_t1_c18,
+	arm_rs_r9_t1_c18,
+	arm_rs_r10_t1_c18,
+	arm_rs_r11_t1_c18,
+	arm_rs_r12_t1_c18,
+	arm_rs_r13_t1_c18,
+	arm_rs_r14_t1_c18,
+	arm_rs_r15_t1_c18,
+	arm_rs_r0_t2_c18,
+	arm_rs_r1_t2_c18,
+	arm_rs_r2_t2_c18,
+	arm_rs_r3_t2_c18,
+	arm_rs_r4_t2_c18,
+	arm_rs_r5_t2_c18,
+	arm_rs_r6_t2_c18,
+	arm_rs_r7_t2_c18,
+	arm_rs_r8_t2_c18,
+	arm_rs_r9_t2_c18,
+	arm_rs_r10_t2_c18,
+	arm_rs_r11_t2_c18,
+	arm_rs_r12_t2_c18,
+	arm_rs_r13_t2_c18,
+	arm_rs_r14_t2_c18,
+	arm_rs_r15_t2_c18,
+	arm_rs_r0_t3_c18,
+	arm_rs_r1_t3_c18,
+	arm_rs_r2_t3_c18,
+	arm_rs_r3_t3_c18,
+	arm_rs_r4_t3_c18,
+	arm_rs_r5_t3_c18,
+	arm_rs_r6_t3_c18,
+	arm_rs_r7_t3_c18,
+	arm_rs_r8_t3_c18,
+	arm_rs_r9_t3_c18,
+	arm_rs_r10_t3_c18,
+	arm_rs_r11_t3_c18,
+	arm_rs_r12_t3_c18,
+	arm_rs_r13_t3_c18,
+	arm_rs_r14_t3_c18,
+	arm_rs_r15_t3_c18,
+	arm_rs_r0_t4_c18,
+	arm_rs_r1_t4_c18,
+	arm_rs_r2_t4_c18,
+	arm_rs_r3_t4_c18,
+	arm_rs_r4_t4_c18,
+	arm_rs_r5_t4_c18,
+	arm_rs_r6_t4_c18,
+	arm_rs_r7_t4_c18,
+	arm_rs_r8_t4_c18,
+	arm_rs_r9_t4_c18,
+	arm_rs_r10_t4_c18,
+	arm_rs_r11_t4_c18,
+	arm_rs_r12_t4_c18,
+	arm_rs_r13_t4_c18,
+	arm_rs_r14_t4_c18,
+	arm_rs_r15_t4_c18,
+	arm_rs_r0_t5_c18,
+	arm_rs_r1_t5_c18,
+	arm_rs_r2_t5_c18,
+	arm_rs_r3_t5_c18,
+	arm_rs_r4_t5_c18,
+	arm_rs_r5_t5_c18,
+	arm_rs_r6_t5_c18,
+	arm_rs_r7_t5_c18,
+	arm_rs_r8_t5_c18,
+	arm_rs_r9_t5_c18,
+	arm_rs_r10_t5_c18,
+	arm_rs_r11_t5_c18,
+	arm_rs_r12_t5_c18,
+	arm_rs_r13_t5_c18,
+	arm_rs_r14_t5_c18,
+	arm_rs_r15_t5_c18,
+	arm_rs_r0_t6_c18,
+	arm_rs_r1_t6_c18,
+	arm_rs_r2_t6_c18,
+	arm_rs_r3_t6_c18,
+	arm_rs_r4_t6_c18,
+	arm_rs_r5_t6_c18,
+	arm_rs_r6_t6_c18,
+	arm_rs_r7_t6_c18,
+	arm_rs_r8_t6_c18,
+	arm_rs_r9_t6_c18,
+	arm_rs_r10_t6_c18,
+	arm_rs_r11_t6_c18,
+	arm_rs_r12_t6_c18,
+	arm_rs_r13_t6_c18,
+	arm_rs_r14_t6_c18,
+	arm_rs_r15_t6_c18,
+	arm_rs_r0_t7_c18,
+	arm_rs_r1_t7_c18,
+	arm_rs_r2_t7_c18,
+	arm_rs_r3_t7_c18,
+	arm_rs_r4_t7_c18,
+	arm_rs_r5_t7_c18,
+	arm_rs_r6_t7_c18,
+	arm_rs_r7_t7_c18,
+	arm_rs_r8_t7_c18,
+	arm_rs_r9_t7_c18,
+	arm_rs_r10_t7_c18,
+	arm_rs_r11_t7_c18,
+	arm_rs_r12_t7_c18,
+	arm_rs_r13_t7_c18,
+	arm_rs_r14_t7_c18,
+	arm_rs_r15_t7_c18,
+	arm_rs_r0_t0_c19,
+	arm_rs_r1_t0_c19,
+	arm_rs_r2_t0_c19,
+	arm_rs_r3_t0_c19,
+	arm_rs_r4_t0_c19,
+	arm_rs_r5_t0_c19,
+	arm_rs_r6_t0_c19,
+	arm_rs_r7_t0_c19,
+	arm_rs_r8_t0_c19,
+	arm_rs_r9_t0_c19,
+	arm_rs_r10_t0_c19,
+	arm_rs_r11_t0_c19,
+	arm_rs_r12_t0_c19,
+	arm_rs_r13_t0_c19,
+	arm_rs_r14_t0_c19,
+	arm_rs_r15_t0_c19,
+	arm_rs_r0_t1_c19,
+	arm_rs_r1_t1_c19,
+	arm_rs_r2_t1_c19,
+	arm_rs_r3_t1_c19,
+	arm_rs_r4_t1_c19,
+	arm_rs_r5_t1_c19,
+	arm_rs_r6_t1_c19,
+	arm_rs_r7_t1_c19,
+	arm_rs_r8_t1_c19,
+	arm_rs_r9_t1_c19,
+	arm_rs_r10_t1_c19,
+	arm_rs_r11_t1_c19,
+	arm_rs_r12_t1_c19,
+	arm_rs_r13_t1_c19,
+	arm_rs_r14_t1_c19,
+	arm_rs_r15_t1_c19,
+	arm_rs_r0_t2_c19,
+	arm_rs_r1_t2_c19,
+	arm_rs_r2_t2_c19,
+	arm_rs_r3_t2_c19,
+	arm_rs_r4_t2_c19,
+	arm_rs_r5_t2_c19,
+	arm_rs_r6_t2_c19,
+	arm_rs_r7_t2_c19,
+	arm_rs_r8_t2_c19,
+	arm_rs_r9_t2_c19,
+	arm_rs_r10_t2_c19,
+	arm_rs_r11_t2_c19,
+	arm_rs_r12_t2_c19,
+	arm_rs_r13_t2_c19,
+	arm_rs_r14_t2_c19,
+	arm_rs_r15_t2_c19,
+	arm_rs_r0_t3_c19,
+	arm_rs_r1_t3_c19,
+	arm_rs_r2_t3_c19,
+	arm_rs_r3_t3_c19,
+	arm_rs_r4_t3_c19,
+	arm_rs_r5_t3_c19,
+	arm_rs_r6_t3_c19,
+	arm_rs_r7_t3_c19,
+	arm_rs_r8_t3_c19,
+	arm_rs_r9_t3_c19,
+	arm_rs_r10_t3_c19,
+	arm_rs_r11_t3_c19,
+	arm_rs_r12_t3_c19,
+	arm_rs_r13_t3_c19,
+	arm_rs_r14_t3_c19,
+	arm_rs_r15_t3_c19,
+	arm_rs_r0_t4_c19,
+	arm_rs_r1_t4_c19,
+	arm_rs_r2_t4_c19,
+	arm_rs_r3_t4_c19,
+	arm_rs_r4_t4_c19,
+	arm_rs_r5_t4_c19,
+	arm_rs_r6_t4_c19,
+	arm_rs_r7_t4_c19,
+	arm_rs_r8_t4_c19,
+	arm_rs_r9_t4_c19,
+	arm_rs_r10_t4_c19,
+	arm_rs_r11_t4_c19,
+	arm_rs_r12_t4_c19,
+	arm_rs_r13_t4_c19,
+	arm_rs_r14_t4_c19,
+	arm_rs_r15_t4_c19,
+	arm_rs_r0_t5_c19,
+	arm_rs_r1_t5_c19,
+	arm_rs_r2_t5_c19,
+	arm_rs_r3_t5_c19,
+	arm_rs_r4_t5_c19,
+	arm_rs_r5_t5_c19,
+	arm_rs_r6_t5_c19,
+	arm_rs_r7_t5_c19,
+	arm_rs_r8_t5_c19,
+	arm_rs_r9_t5_c19,
+	arm_rs_r10_t5_c19,
+	arm_rs_r11_t5_c19,
+	arm_rs_r12_t5_c19,
+	arm_rs_r13_t5_c19,
+	arm_rs_r14_t5_c19,
+	arm_rs_r15_t5_c19,
+	arm_rs_r0_t6_c19,
+	arm_rs_r1_t6_c19,
+	arm_rs_r2_t6_c19,
+	arm_rs_r3_t6_c19,
+	arm_rs_r4_t6_c19,
+	arm_rs_r5_t6_c19,
+	arm_rs_r6_t6_c19,
+	arm_rs_r7_t6_c19,
+	arm_rs_r8_t6_c19,
+	arm_rs_r9_t6_c19,
+	arm_rs_r10_t6_c19,
+	arm_rs_r11_t6_c19,
+	arm_rs_r12_t6_c19,
+	arm_rs_r13_t6_c19,
+	arm_rs_r14_t6_c19,
+	arm_rs_r15_t6_c19,
+	arm_rs_r0_t7_c19,
+	arm_rs_r1_t7_c19,
+	arm_rs_r2_t7_c19,
+	arm_rs_r3_t7_c19,
+	arm_rs_r4_t7_c19,
+	arm_rs_r5_t7_c19,
+	arm_rs_r6_t7_c19,
+	arm_rs_r7_t7_c19,
+	arm_rs_r8_t7_c19,
+	arm_rs_r9_t7_c19,
+	arm_rs_r10_t7_c19,
+	arm_rs_r11_t7_c19,
+	arm_rs_r12_t7_c19,
+	arm_rs_r13_t7_c19,
+	arm_rs_r14_t7_c19,
+	arm_rs_r15_t7_c19,
+	arm_rs_r0_t0_c20,
+	arm_rs_r1_t0_c20,
+	arm_rs_r2_t0_c20,
+	arm_rs_r3_t0_c20,
+	arm_rs_r4_t0_c20,
+	arm_rs_r5_t0_c20,
+	arm_rs_r6_t0_c20,
+	arm_rs_r7_t0_c20,
+	arm_rs_r8_t0_c20,
+	arm_rs_r9_t0_c20,
+	arm_rs_r10_t0_c20,
+	arm_rs_r11_t0_c20,
+	arm_rs_r12_t0_c20,
+	arm_rs_r13_t0_c20,
+	arm_rs_r14_t0_c20,
+	arm_rs_r15_t0_c20,
+	arm_rs_r0_t1_c20,
+	arm_rs_r1_t1_c20,
+	arm_rs_r2_t1_c20,
+	arm_rs_r3_t1_c20,
+	arm_rs_r4_t1_c20,
+	arm_rs_r5_t1_c20,
+	arm_rs_r6_t1_c20,
+	arm_rs_r7_t1_c20,
+	arm_rs_r8_t1_c20,
+	arm_rs_r9_t1_c20,
+	arm_rs_r10_t1_c20,
+	arm_rs_r11_t1_c20,
+	arm_rs_r12_t1_c20,
+	arm_rs_r13_t1_c20,
+	arm_rs_r14_t1_c20,
+	arm_rs_r15_t1_c20,
+	arm_rs_r0_t2_c20,
+	arm_rs_r1_t2_c20,
+	arm_rs_r2_t2_c20,
+	arm_rs_r3_t2_c20,
+	arm_rs_r4_t2_c20,
+	arm_rs_r5_t2_c20,
+	arm_rs_r6_t2_c20,
+	arm_rs_r7_t2_c20,
+	arm_rs_r8_t2_c20,
+	arm_rs_r9_t2_c20,
+	arm_rs_r10_t2_c20,
+	arm_rs_r11_t2_c20,
+	arm_rs_r12_t2_c20,
+	arm_rs_r13_t2_c20,
+	arm_rs_r14_t2_c20,
+	arm_rs_r15_t2_c20,
+	arm_rs_r0_t3_c20,
+	arm_rs_r1_t3_c20,
+	arm_rs_r2_t3_c20,
+	arm_rs_r3_t3_c20,
+	arm_rs_r4_t3_c20,
+	arm_rs_r5_t3_c20,
+	arm_rs_r6_t3_c20,
+	arm_rs_r7_t3_c20,
+	arm_rs_r8_t3_c20,
+	arm_rs_r9_t3_c20,
+	arm_rs_r10_t3_c20,
+	arm_rs_r11_t3_c20,
+	arm_rs_r12_t3_c20,
+	arm_rs_r13_t3_c20,
+	arm_rs_r14_t3_c20,
+	arm_rs_r15_t3_c20,
+	arm_rs_r0_t4_c20,
+	arm_rs_r1_t4_c20,
+	arm_rs_r2_t4_c20,
+	arm_rs_r3_t4_c20,
+	arm_rs_r4_t4_c20,
+	arm_rs_r5_t4_c20,
+	arm_rs_r6_t4_c20,
+	arm_rs_r7_t4_c20,
+	arm_rs_r8_t4_c20,
+	arm_rs_r9_t4_c20,
+	arm_rs_r10_t4_c20,
+	arm_rs_r11_t4_c20,
+	arm_rs_r12_t4_c20,
+	arm_rs_r13_t4_c20,
+	arm_rs_r14_t4_c20,
+	arm_rs_r15_t4_c20,
+	arm_rs_r0_t5_c20,
+	arm_rs_r1_t5_c20,
+	arm_rs_r2_t5_c20,
+	arm_rs_r3_t5_c20,
+	arm_rs_r4_t5_c20,
+	arm_rs_r5_t5_c20,
+	arm_rs_r6_t5_c20,
+	arm_rs_r7_t5_c20,
+	arm_rs_r8_t5_c20,
+	arm_rs_r9_t5_c20,
+	arm_rs_r10_t5_c20,
+	arm_rs_r11_t5_c20,
+	arm_rs_r12_t5_c20,
+	arm_rs_r13_t5_c20,
+	arm_rs_r14_t5_c20,
+	arm_rs_r15_t5_c20,
+	arm_rs_r0_t6_c20,
+	arm_rs_r1_t6_c20,
+	arm_rs_r2_t6_c20,
+	arm_rs_r3_t6_c20,
+	arm_rs_r4_t6_c20,
+	arm_rs_r5_t6_c20,
+	arm_rs_r6_t6_c20,
+	arm_rs_r7_t6_c20,
+	arm_rs_r8_t6_c20,
+	arm_rs_r9_t6_c20,
+	arm_rs_r10_t6_c20,
+	arm_rs_r11_t6_c20,
+	arm_rs_r12_t6_c20,
+	arm_rs_r13_t6_c20,
+	arm_rs_r14_t6_c20,
+	arm_rs_r15_t6_c20,
+	arm_rs_r0_t7_c20,
+	arm_rs_r1_t7_c20,
+	arm_rs_r2_t7_c20,
+	arm_rs_r3_t7_c20,
+	arm_rs_r4_t7_c20,
+	arm_rs_r5_t7_c20,
+	arm_rs_r6_t7_c20,
+	arm_rs_r7_t7_c20,
+	arm_rs_r8_t7_c20,
+	arm_rs_r9_t7_c20,
+	arm_rs_r10_t7_c20,
+	arm_rs_r11_t7_c20,
+	arm_rs_r12_t7_c20,
+	arm_rs_r13_t7_c20,
+	arm_rs_r14_t7_c20,
+	arm_rs_r15_t7_c20,
+	arm_rs_r0_t0_c21,
+	arm_rs_r1_t0_c21,
+	arm_rs_r2_t0_c21,
+	arm_rs_r3_t0_c21,
+	arm_rs_r4_t0_c21,
+	arm_rs_r5_t0_c21,
+	arm_rs_r6_t0_c21,
+	arm_rs_r7_t0_c21,
+	arm_rs_r8_t0_c21,
+	arm_rs_r9_t0_c21,
+	arm_rs_r10_t0_c21,
+	arm_rs_r11_t0_c21,
+	arm_rs_r12_t0_c21,
+	arm_rs_r13_t0_c21,
+	arm_rs_r14_t0_c21,
+	arm_rs_r15_t0_c21,
+	arm_rs_r0_t1_c21,
+	arm_rs_r1_t1_c21,
+	arm_rs_r2_t1_c21,
+	arm_rs_r3_t1_c21,
+	arm_rs_r4_t1_c21,
+	arm_rs_r5_t1_c21,
+	arm_rs_r6_t1_c21,
+	arm_rs_r7_t1_c21,
+	arm_rs_r8_t1_c21,
+	arm_rs_r9_t1_c21,
+	arm_rs_r10_t1_c21,
+	arm_rs_r11_t1_c21,
+	arm_rs_r12_t1_c21,
+	arm_rs_r13_t1_c21,
+	arm_rs_r14_t1_c21,
+	arm_rs_r15_t1_c21,
+	arm_rs_r0_t2_c21,
+	arm_rs_r1_t2_c21,
+	arm_rs_r2_t2_c21,
+	arm_rs_r3_t2_c21,
+	arm_rs_r4_t2_c21,
+	arm_rs_r5_t2_c21,
+	arm_rs_r6_t2_c21,
+	arm_rs_r7_t2_c21,
+	arm_rs_r8_t2_c21,
+	arm_rs_r9_t2_c21,
+	arm_rs_r10_t2_c21,
+	arm_rs_r11_t2_c21,
+	arm_rs_r12_t2_c21,
+	arm_rs_r13_t2_c21,
+	arm_rs_r14_t2_c21,
+	arm_rs_r15_t2_c21,
+	arm_rs_r0_t3_c21,
+	arm_rs_r1_t3_c21,
+	arm_rs_r2_t3_c21,
+	arm_rs_r3_t3_c21,
+	arm_rs_r4_t3_c21,
+	arm_rs_r5_t3_c21,
+	arm_rs_r6_t3_c21,
+	arm_rs_r7_t3_c21,
+	arm_rs_r8_t3_c21,
+	arm_rs_r9_t3_c21,
+	arm_rs_r10_t3_c21,
+	arm_rs_r11_t3_c21,
+	arm_rs_r12_t3_c21,
+	arm_rs_r13_t3_c21,
+	arm_rs_r14_t3_c21,
+	arm_rs_r15_t3_c21,
+	arm_rs_r0_t4_c21,
+	arm_rs_r1_t4_c21,
+	arm_rs_r2_t4_c21,
+	arm_rs_r3_t4_c21,
+	arm_rs_r4_t4_c21,
+	arm_rs_r5_t4_c21,
+	arm_rs_r6_t4_c21,
+	arm_rs_r7_t4_c21,
+	arm_rs_r8_t4_c21,
+	arm_rs_r9_t4_c21,
+	arm_rs_r10_t4_c21,
+	arm_rs_r11_t4_c21,
+	arm_rs_r12_t4_c21,
+	arm_rs_r13_t4_c21,
+	arm_rs_r14_t4_c21,
+	arm_rs_r15_t4_c21,
+	arm_rs_r0_t5_c21,
+	arm_rs_r1_t5_c21,
+	arm_rs_r2_t5_c21,
+	arm_rs_r3_t5_c21,
+	arm_rs_r4_t5_c21,
+	arm_rs_r5_t5_c21,
+	arm_rs_r6_t5_c21,
+	arm_rs_r7_t5_c21,
+	arm_rs_r8_t5_c21,
+	arm_rs_r9_t5_c21,
+	arm_rs_r10_t5_c21,
+	arm_rs_r11_t5_c21,
+	arm_rs_r12_t5_c21,
+	arm_rs_r13_t5_c21,
+	arm_rs_r14_t5_c21,
+	arm_rs_r15_t5_c21,
+	arm_rs_r0_t6_c21,
+	arm_rs_r1_t6_c21,
+	arm_rs_r2_t6_c21,
+	arm_rs_r3_t6_c21,
+	arm_rs_r4_t6_c21,
+	arm_rs_r5_t6_c21,
+	arm_rs_r6_t6_c21,
+	arm_rs_r7_t6_c21,
+	arm_rs_r8_t6_c21,
+	arm_rs_r9_t6_c21,
+	arm_rs_r10_t6_c21,
+	arm_rs_r11_t6_c21,
+	arm_rs_r12_t6_c21,
+	arm_rs_r13_t6_c21,
+	arm_rs_r14_t6_c21,
+	arm_rs_r15_t6_c21,
+	arm_rs_r0_t7_c21,
+	arm_rs_r1_t7_c21,
+	arm_rs_r2_t7_c21,
+	arm_rs_r3_t7_c21,
+	arm_rs_r4_t7_c21,
+	arm_rs_r5_t7_c21,
+	arm_rs_r6_t7_c21,
+	arm_rs_r7_t7_c21,
+	arm_rs_r8_t7_c21,
+	arm_rs_r9_t7_c21,
+	arm_rs_r10_t7_c21,
+	arm_rs_r11_t7_c21,
+	arm_rs_r12_t7_c21,
+	arm_rs_r13_t7_c21,
+	arm_rs_r14_t7_c21,
+	arm_rs_r15_t7_c21,
+	arm_rs_r0_t0_c22,
+	arm_rs_r1_t0_c22,
+	arm_rs_r2_t0_c22,
+	arm_rs_r3_t0_c22,
+	arm_rs_r4_t0_c22,
+	arm_rs_r5_t0_c22,
+	arm_rs_r6_t0_c22,
+	arm_rs_r7_t0_c22,
+	arm_rs_r8_t0_c22,
+	arm_rs_r9_t0_c22,
+	arm_rs_r10_t0_c22,
+	arm_rs_r11_t0_c22,
+	arm_rs_r12_t0_c22,
+	arm_rs_r13_t0_c22,
+	arm_rs_r14_t0_c22,
+	arm_rs_r15_t0_c22,
+	arm_rs_r0_t1_c22,
+	arm_rs_r1_t1_c22,
+	arm_rs_r2_t1_c22,
+	arm_rs_r3_t1_c22,
+	arm_rs_r4_t1_c22,
+	arm_rs_r5_t1_c22,
+	arm_rs_r6_t1_c22,
+	arm_rs_r7_t1_c22,
+	arm_rs_r8_t1_c22,
+	arm_rs_r9_t1_c22,
+	arm_rs_r10_t1_c22,
+	arm_rs_r11_t1_c22,
+	arm_rs_r12_t1_c22,
+	arm_rs_r13_t1_c22,
+	arm_rs_r14_t1_c22,
+	arm_rs_r15_t1_c22,
+	arm_rs_r0_t2_c22,
+	arm_rs_r1_t2_c22,
+	arm_rs_r2_t2_c22,
+	arm_rs_r3_t2_c22,
+	arm_rs_r4_t2_c22,
+	arm_rs_r5_t2_c22,
+	arm_rs_r6_t2_c22,
+	arm_rs_r7_t2_c22,
+	arm_rs_r8_t2_c22,
+	arm_rs_r9_t2_c22,
+	arm_rs_r10_t2_c22,
+	arm_rs_r11_t2_c22,
+	arm_rs_r12_t2_c22,
+	arm_rs_r13_t2_c22,
+	arm_rs_r14_t2_c22,
+	arm_rs_r15_t2_c22,
+	arm_rs_r0_t3_c22,
+	arm_rs_r1_t3_c22,
+	arm_rs_r2_t3_c22,
+	arm_rs_r3_t3_c22,
+	arm_rs_r4_t3_c22,
+	arm_rs_r5_t3_c22,
+	arm_rs_r6_t3_c22,
+	arm_rs_r7_t3_c22,
+	arm_rs_r8_t3_c22,
+	arm_rs_r9_t3_c22,
+	arm_rs_r10_t3_c22,
+	arm_rs_r11_t3_c22,
+	arm_rs_r12_t3_c22,
+	arm_rs_r13_t3_c22,
+	arm_rs_r14_t3_c22,
+	arm_rs_r15_t3_c22,
+	arm_rs_r0_t4_c22,
+	arm_rs_r1_t4_c22,
+	arm_rs_r2_t4_c22,
+	arm_rs_r3_t4_c22,
+	arm_rs_r4_t4_c22,
+	arm_rs_r5_t4_c22,
+	arm_rs_r6_t4_c22,
+	arm_rs_r7_t4_c22,
+	arm_rs_r8_t4_c22,
+	arm_rs_r9_t4_c22,
+	arm_rs_r10_t4_c22,
+	arm_rs_r11_t4_c22,
+	arm_rs_r12_t4_c22,
+	arm_rs_r13_t4_c22,
+	arm_rs_r14_t4_c22,
+	arm_rs_r15_t4_c22,
+	arm_rs_r0_t5_c22,
+	arm_rs_r1_t5_c22,
+	arm_rs_r2_t5_c22,
+	arm_rs_r3_t5_c22,
+	arm_rs_r4_t5_c22,
+	arm_rs_r5_t5_c22,
+	arm_rs_r6_t5_c22,
+	arm_rs_r7_t5_c22,
+	arm_rs_r8_t5_c22,
+	arm_rs_r9_t5_c22,
+	arm_rs_r10_t5_c22,
+	arm_rs_r11_t5_c22,
+	arm_rs_r12_t5_c22,
+	arm_rs_r13_t5_c22,
+	arm_rs_r14_t5_c22,
+	arm_rs_r15_t5_c22,
+	arm_rs_r0_t6_c22,
+	arm_rs_r1_t6_c22,
+	arm_rs_r2_t6_c22,
+	arm_rs_r3_t6_c22,
+	arm_rs_r4_t6_c22,
+	arm_rs_r5_t6_c22,
+	arm_rs_r6_t6_c22,
+	arm_rs_r7_t6_c22,
+	arm_rs_r8_t6_c22,
+	arm_rs_r9_t6_c22,
+	arm_rs_r10_t6_c22,
+	arm_rs_r11_t6_c22,
+	arm_rs_r12_t6_c22,
+	arm_rs_r13_t6_c22,
+	arm_rs_r14_t6_c22,
+	arm_rs_r15_t6_c22,
+	arm_rs_r0_t7_c22,
+	arm_rs_r1_t7_c22,
+	arm_rs_r2_t7_c22,
+	arm_rs_r3_t7_c22,
+	arm_rs_r4_t7_c22,
+	arm_rs_r5_t7_c22,
+	arm_rs_r6_t7_c22,
+	arm_rs_r7_t7_c22,
+	arm_rs_r8_t7_c22,
+	arm_rs_r9_t7_c22,
+	arm_rs_r10_t7_c22,
+	arm_rs_r11_t7_c22,
+	arm_rs_r12_t7_c22,
+	arm_rs_r13_t7_c22,
+	arm_rs_r14_t7_c22,
+	arm_rs_r15_t7_c22,
+	arm_rs_r0_t0_c23,
+	arm_rs_r1_t0_c23,
+	arm_rs_r2_t0_c23,
+	arm_rs_r3_t0_c23,
+	arm_rs_r4_t0_c23,
+	arm_rs_r5_t0_c23,
+	arm_rs_r6_t0_c23,
+	arm_rs_r7_t0_c23,
+	arm_rs_r8_t0_c23,
+	arm_rs_r9_t0_c23,
+	arm_rs_r10_t0_c23,
+	arm_rs_r11_t0_c23,
+	arm_rs_r12_t0_c23,
+	arm_rs_r13_t0_c23,
+	arm_rs_r14_t0_c23,
+	arm_rs_r15_t0_c23,
+	arm_rs_r0_t1_c23,
+	arm_rs_r1_t1_c23,
+	arm_rs_r2_t1_c23,
+	arm_rs_r3_t1_c23,
+	arm_rs_r4_t1_c23,
+	arm_rs_r5_t1_c23,
+	arm_rs_r6_t1_c23,
+	arm_rs_r7_t1_c23,
+	arm_rs_r8_t1_c23,
+	arm_rs_r9_t1_c23,
+	arm_rs_r10_t1_c23,
+	arm_rs_r11_t1_c23,
+	arm_rs_r12_t1_c23,
+	arm_rs_r13_t1_c23,
+	arm_rs_r14_t1_c23,
+	arm_rs_r15_t1_c23,
+	arm_rs_r0_t2_c23,
+	arm_rs_r1_t2_c23,
+	arm_rs_r2_t2_c23,
+	arm_rs_r3_t2_c23,
+	arm_rs_r4_t2_c23,
+	arm_rs_r5_t2_c23,
+	arm_rs_r6_t2_c23,
+	arm_rs_r7_t2_c23,
+	arm_rs_r8_t2_c23,
+	arm_rs_r9_t2_c23,
+	arm_rs_r10_t2_c23,
+	arm_rs_r11_t2_c23,
+	arm_rs_r12_t2_c23,
+	arm_rs_r13_t2_c23,
+	arm_rs_r14_t2_c23,
+	arm_rs_r15_t2_c23,
+	arm_rs_r0_t3_c23,
+	arm_rs_r1_t3_c23,
+	arm_rs_r2_t3_c23,
+	arm_rs_r3_t3_c23,
+	arm_rs_r4_t3_c23,
+	arm_rs_r5_t3_c23,
+	arm_rs_r6_t3_c23,
+	arm_rs_r7_t3_c23,
+	arm_rs_r8_t3_c23,
+	arm_rs_r9_t3_c23,
+	arm_rs_r10_t3_c23,
+	arm_rs_r11_t3_c23,
+	arm_rs_r12_t3_c23,
+	arm_rs_r13_t3_c23,
+	arm_rs_r14_t3_c23,
+	arm_rs_r15_t3_c23,
+	arm_rs_r0_t4_c23,
+	arm_rs_r1_t4_c23,
+	arm_rs_r2_t4_c23,
+	arm_rs_r3_t4_c23,
+	arm_rs_r4_t4_c23,
+	arm_rs_r5_t4_c23,
+	arm_rs_r6_t4_c23,
+	arm_rs_r7_t4_c23,
+	arm_rs_r8_t4_c23,
+	arm_rs_r9_t4_c23,
+	arm_rs_r10_t4_c23,
+	arm_rs_r11_t4_c23,
+	arm_rs_r12_t4_c23,
+	arm_rs_r13_t4_c23,
+	arm_rs_r14_t4_c23,
+	arm_rs_r15_t4_c23,
+	arm_rs_r0_t5_c23,
+	arm_rs_r1_t5_c23,
+	arm_rs_r2_t5_c23,
+	arm_rs_r3_t5_c23,
+	arm_rs_r4_t5_c23,
+	arm_rs_r5_t5_c23,
+	arm_rs_r6_t5_c23,
+	arm_rs_r7_t5_c23,
+	arm_rs_r8_t5_c23,
+	arm_rs_r9_t5_c23,
+	arm_rs_r10_t5_c23,
+	arm_rs_r11_t5_c23,
+	arm_rs_r12_t5_c23,
+	arm_rs_r13_t5_c23,
+	arm_rs_r14_t5_c23,
+	arm_rs_r15_t5_c23,
+	arm_rs_r0_t6_c23,
+	arm_rs_r1_t6_c23,
+	arm_rs_r2_t6_c23,
+	arm_rs_r3_t6_c23,
+	arm_rs_r4_t6_c23,
+	arm_rs_r5_t6_c23,
+	arm_rs_r6_t6_c23,
+	arm_rs_r7_t6_c23,
+	arm_rs_r8_t6_c23,
+	arm_rs_r9_t6_c23,
+	arm_rs_r10_t6_c23,
+	arm_rs_r11_t6_c23,
+	arm_rs_r12_t6_c23,
+	arm_rs_r13_t6_c23,
+	arm_rs_r14_t6_c23,
+	arm_rs_r15_t6_c23,
+	arm_rs_r0_t7_c23,
+	arm_rs_r1_t7_c23,
+	arm_rs_r2_t7_c23,
+	arm_rs_r3_t7_c23,
+	arm_rs_r4_t7_c23,
+	arm_rs_r5_t7_c23,
+	arm_rs_r6_t7_c23,
+	arm_rs_r7_t7_c23,
+	arm_rs_r8_t7_c23,
+	arm_rs_r9_t7_c23,
+	arm_rs_r10_t7_c23,
+	arm_rs_r11_t7_c23,
+	arm_rs_r12_t7_c23,
+	arm_rs_r13_t7_c23,
+	arm_rs_r14_t7_c23,
+	arm_rs_r15_t7_c23,
+	arm_rs_r0_t0_c24,
+	arm_rs_r1_t0_c24,
+	arm_rs_r2_t0_c24,
+	arm_rs_r3_t0_c24,
+	arm_rs_r4_t0_c24,
+	arm_rs_r5_t0_c24,
+	arm_rs_r6_t0_c24,
+	arm_rs_r7_t0_c24,
+	arm_rs_r8_t0_c24,
+	arm_rs_r9_t0_c24,
+	arm_rs_r10_t0_c24,
+	arm_rs_r11_t0_c24,
+	arm_rs_r12_t0_c24,
+	arm_rs_r13_t0_c24,
+	arm_rs_r14_t0_c24,
+	arm_rs_r15_t0_c24,
+	arm_rs_r0_t1_c24,
+	arm_rs_r1_t1_c24,
+	arm_rs_r2_t1_c24,
+	arm_rs_r3_t1_c24,
+	arm_rs_r4_t1_c24,
+	arm_rs_r5_t1_c24,
+	arm_rs_r6_t1_c24,
+	arm_rs_r7_t1_c24,
+	arm_rs_r8_t1_c24,
+	arm_rs_r9_t1_c24,
+	arm_rs_r10_t1_c24,
+	arm_rs_r11_t1_c24,
+	arm_rs_r12_t1_c24,
+	arm_rs_r13_t1_c24,
+	arm_rs_r14_t1_c24,
+	arm_rs_r15_t1_c24,
+	arm_rs_r0_t2_c24,
+	arm_rs_r1_t2_c24,
+	arm_rs_r2_t2_c24,
+	arm_rs_r3_t2_c24,
+	arm_rs_r4_t2_c24,
+	arm_rs_r5_t2_c24,
+	arm_rs_r6_t2_c24,
+	arm_rs_r7_t2_c24,
+	arm_rs_r8_t2_c24,
+	arm_rs_r9_t2_c24,
+	arm_rs_r10_t2_c24,
+	arm_rs_r11_t2_c24,
+	arm_rs_r12_t2_c24,
+	arm_rs_r13_t2_c24,
+	arm_rs_r14_t2_c24,
+	arm_rs_r15_t2_c24,
+	arm_rs_r0_t3_c24,
+	arm_rs_r1_t3_c24,
+	arm_rs_r2_t3_c24,
+	arm_rs_r3_t3_c24,
+	arm_rs_r4_t3_c24,
+	arm_rs_r5_t3_c24,
+	arm_rs_r6_t3_c24,
+	arm_rs_r7_t3_c24,
+	arm_rs_r8_t3_c24,
+	arm_rs_r9_t3_c24,
+	arm_rs_r10_t3_c24,
+	arm_rs_r11_t3_c24,
+	arm_rs_r12_t3_c24,
+	arm_rs_r13_t3_c24,
+	arm_rs_r14_t3_c24,
+	arm_rs_r15_t3_c24,
+	arm_rs_r0_t4_c24,
+	arm_rs_r1_t4_c24,
+	arm_rs_r2_t4_c24,
+	arm_rs_r3_t4_c24,
+	arm_rs_r4_t4_c24,
+	arm_rs_r5_t4_c24,
+	arm_rs_r6_t4_c24,
+	arm_rs_r7_t4_c24,
+	arm_rs_r8_t4_c24,
+	arm_rs_r9_t4_c24,
+	arm_rs_r10_t4_c24,
+	arm_rs_r11_t4_c24,
+	arm_rs_r12_t4_c24,
+	arm_rs_r13_t4_c24,
+	arm_rs_r14_t4_c24,
+	arm_rs_r15_t4_c24,
+	arm_rs_r0_t5_c24,
+	arm_rs_r1_t5_c24,
+	arm_rs_r2_t5_c24,
+	arm_rs_r3_t5_c24,
+	arm_rs_r4_t5_c24,
+	arm_rs_r5_t5_c24,
+	arm_rs_r6_t5_c24,
+	arm_rs_r7_t5_c24,
+	arm_rs_r8_t5_c24,
+	arm_rs_r9_t5_c24,
+	arm_rs_r10_t5_c24,
+	arm_rs_r11_t5_c24,
+	arm_rs_r12_t5_c24,
+	arm_rs_r13_t5_c24,
+	arm_rs_r14_t5_c24,
+	arm_rs_r15_t5_c24,
+	arm_rs_r0_t6_c24,
+	arm_rs_r1_t6_c24,
+	arm_rs_r2_t6_c24,
+	arm_rs_r3_t6_c24,
+	arm_rs_r4_t6_c24,
+	arm_rs_r5_t6_c24,
+	arm_rs_r6_t6_c24,
+	arm_rs_r7_t6_c24,
+	arm_rs_r8_t6_c24,
+	arm_rs_r9_t6_c24,
+	arm_rs_r10_t6_c24,
+	arm_rs_r11_t6_c24,
+	arm_rs_r12_t6_c24,
+	arm_rs_r13_t6_c24,
+	arm_rs_r14_t6_c24,
+	arm_rs_r15_t6_c24,
+	arm_rs_r0_t7_c24,
+	arm_rs_r1_t7_c24,
+	arm_rs_r2_t7_c24,
+	arm_rs_r3_t7_c24,
+	arm_rs_r4_t7_c24,
+	arm_rs_r5_t7_c24,
+	arm_rs_r6_t7_c24,
+	arm_rs_r7_t7_c24,
+	arm_rs_r8_t7_c24,
+	arm_rs_r9_t7_c24,
+	arm_rs_r10_t7_c24,
+	arm_rs_r11_t7_c24,
+	arm_rs_r12_t7_c24,
+	arm_rs_r13_t7_c24,
+	arm_rs_r14_t7_c24,
+	arm_rs_r15_t7_c24,
+	arm_rs_r0_t0_c25,
+	arm_rs_r1_t0_c25,
+	arm_rs_r2_t0_c25,
+	arm_rs_r3_t0_c25,
+	arm_rs_r4_t0_c25,
+	arm_rs_r5_t0_c25,
+	arm_rs_r6_t0_c25,
+	arm_rs_r7_t0_c25,
+	arm_rs_r8_t0_c25,
+	arm_rs_r9_t0_c25,
+	arm_rs_r10_t0_c25,
+	arm_rs_r11_t0_c25,
+	arm_rs_r12_t0_c25,
+	arm_rs_r13_t0_c25,
+	arm_rs_r14_t0_c25,
+	arm_rs_r15_t0_c25,
+	arm_rs_r0_t1_c25,
+	arm_rs_r1_t1_c25,
+	arm_rs_r2_t1_c25,
+	arm_rs_r3_t1_c25,
+	arm_rs_r4_t1_c25,
+	arm_rs_r5_t1_c25,
+	arm_rs_r6_t1_c25,
+	arm_rs_r7_t1_c25,
+	arm_rs_r8_t1_c25,
+	arm_rs_r9_t1_c25,
+	arm_rs_r10_t1_c25,
+	arm_rs_r11_t1_c25,
+	arm_rs_r12_t1_c25,
+	arm_rs_r13_t1_c25,
+	arm_rs_r14_t1_c25,
+	arm_rs_r15_t1_c25,
+	arm_rs_r0_t2_c25,
+	arm_rs_r1_t2_c25,
+	arm_rs_r2_t2_c25,
+	arm_rs_r3_t2_c25,
+	arm_rs_r4_t2_c25,
+	arm_rs_r5_t2_c25,
+	arm_rs_r6_t2_c25,
+	arm_rs_r7_t2_c25,
+	arm_rs_r8_t2_c25,
+	arm_rs_r9_t2_c25,
+	arm_rs_r10_t2_c25,
+	arm_rs_r11_t2_c25,
+	arm_rs_r12_t2_c25,
+	arm_rs_r13_t2_c25,
+	arm_rs_r14_t2_c25,
+	arm_rs_r15_t2_c25,
+	arm_rs_r0_t3_c25,
+	arm_rs_r1_t3_c25,
+	arm_rs_r2_t3_c25,
+	arm_rs_r3_t3_c25,
+	arm_rs_r4_t3_c25,
+	arm_rs_r5_t3_c25,
+	arm_rs_r6_t3_c25,
+	arm_rs_r7_t3_c25,
+	arm_rs_r8_t3_c25,
+	arm_rs_r9_t3_c25,
+	arm_rs_r10_t3_c25,
+	arm_rs_r11_t3_c25,
+	arm_rs_r12_t3_c25,
+	arm_rs_r13_t3_c25,
+	arm_rs_r14_t3_c25,
+	arm_rs_r15_t3_c25,
+	arm_rs_r0_t4_c25,
+	arm_rs_r1_t4_c25,
+	arm_rs_r2_t4_c25,
+	arm_rs_r3_t4_c25,
+	arm_rs_r4_t4_c25,
+	arm_rs_r5_t4_c25,
+	arm_rs_r6_t4_c25,
+	arm_rs_r7_t4_c25,
+	arm_rs_r8_t4_c25,
+	arm_rs_r9_t4_c25,
+	arm_rs_r10_t4_c25,
+	arm_rs_r11_t4_c25,
+	arm_rs_r12_t4_c25,
+	arm_rs_r13_t4_c25,
+	arm_rs_r14_t4_c25,
+	arm_rs_r15_t4_c25,
+	arm_rs_r0_t5_c25,
+	arm_rs_r1_t5_c25,
+	arm_rs_r2_t5_c25,
+	arm_rs_r3_t5_c25,
+	arm_rs_r4_t5_c25,
+	arm_rs_r5_t5_c25,
+	arm_rs_r6_t5_c25,
+	arm_rs_r7_t5_c25,
+	arm_rs_r8_t5_c25,
+	arm_rs_r9_t5_c25,
+	arm_rs_r10_t5_c25,
+	arm_rs_r11_t5_c25,
+	arm_rs_r12_t5_c25,
+	arm_rs_r13_t5_c25,
+	arm_rs_r14_t5_c25,
+	arm_rs_r15_t5_c25,
+	arm_rs_r0_t6_c25,
+	arm_rs_r1_t6_c25,
+	arm_rs_r2_t6_c25,
+	arm_rs_r3_t6_c25,
+	arm_rs_r4_t6_c25,
+	arm_rs_r5_t6_c25,
+	arm_rs_r6_t6_c25,
+	arm_rs_r7_t6_c25,
+	arm_rs_r8_t6_c25,
+	arm_rs_r9_t6_c25,
+	arm_rs_r10_t6_c25,
+	arm_rs_r11_t6_c25,
+	arm_rs_r12_t6_c25,
+	arm_rs_r13_t6_c25,
+	arm_rs_r14_t6_c25,
+	arm_rs_r15_t6_c25,
+	arm_rs_r0_t7_c25,
+	arm_rs_r1_t7_c25,
+	arm_rs_r2_t7_c25,
+	arm_rs_r3_t7_c25,
+	arm_rs_r4_t7_c25,
+	arm_rs_r5_t7_c25,
+	arm_rs_r6_t7_c25,
+	arm_rs_r7_t7_c25,
+	arm_rs_r8_t7_c25,
+	arm_rs_r9_t7_c25,
+	arm_rs_r10_t7_c25,
+	arm_rs_r11_t7_c25,
+	arm_rs_r12_t7_c25,
+	arm_rs_r13_t7_c25,
+	arm_rs_r14_t7_c25,
+	arm_rs_r15_t7_c25,
+	arm_rs_r0_t0_c26,
+	arm_rs_r1_t0_c26,
+	arm_rs_r2_t0_c26,
+	arm_rs_r3_t0_c26,
+	arm_rs_r4_t0_c26,
+	arm_rs_r5_t0_c26,
+	arm_rs_r6_t0_c26,
+	arm_rs_r7_t0_c26,
+	arm_rs_r8_t0_c26,
+	arm_rs_r9_t0_c26,
+	arm_rs_r10_t0_c26,
+	arm_rs_r11_t0_c26,
+	arm_rs_r12_t0_c26,
+	arm_rs_r13_t0_c26,
+	arm_rs_r14_t0_c26,
+	arm_rs_r15_t0_c26,
+	arm_rs_r0_t1_c26,
+	arm_rs_r1_t1_c26,
+	arm_rs_r2_t1_c26,
+	arm_rs_r3_t1_c26,
+	arm_rs_r4_t1_c26,
+	arm_rs_r5_t1_c26,
+	arm_rs_r6_t1_c26,
+	arm_rs_r7_t1_c26,
+	arm_rs_r8_t1_c26,
+	arm_rs_r9_t1_c26,
+	arm_rs_r10_t1_c26,
+	arm_rs_r11_t1_c26,
+	arm_rs_r12_t1_c26,
+	arm_rs_r13_t1_c26,
+	arm_rs_r14_t1_c26,
+	arm_rs_r15_t1_c26,
+	arm_rs_r0_t2_c26,
+	arm_rs_r1_t2_c26,
+	arm_rs_r2_t2_c26,
+	arm_rs_r3_t2_c26,
+	arm_rs_r4_t2_c26,
+	arm_rs_r5_t2_c26,
+	arm_rs_r6_t2_c26,
+	arm_rs_r7_t2_c26,
+	arm_rs_r8_t2_c26,
+	arm_rs_r9_t2_c26,
+	arm_rs_r10_t2_c26,
+	arm_rs_r11_t2_c26,
+	arm_rs_r12_t2_c26,
+	arm_rs_r13_t2_c26,
+	arm_rs_r14_t2_c26,
+	arm_rs_r15_t2_c26,
+	arm_rs_r0_t3_c26,
+	arm_rs_r1_t3_c26,
+	arm_rs_r2_t3_c26,
+	arm_rs_r3_t3_c26,
+	arm_rs_r4_t3_c26,
+	arm_rs_r5_t3_c26,
+	arm_rs_r6_t3_c26,
+	arm_rs_r7_t3_c26,
+	arm_rs_r8_t3_c26,
+	arm_rs_r9_t3_c26,
+	arm_rs_r10_t3_c26,
+	arm_rs_r11_t3_c26,
+	arm_rs_r12_t3_c26,
+	arm_rs_r13_t3_c26,
+	arm_rs_r14_t3_c26,
+	arm_rs_r15_t3_c26,
+	arm_rs_r0_t4_c26,
+	arm_rs_r1_t4_c26,
+	arm_rs_r2_t4_c26,
+	arm_rs_r3_t4_c26,
+	arm_rs_r4_t4_c26,
+	arm_rs_r5_t4_c26,
+	arm_rs_r6_t4_c26,
+	arm_rs_r7_t4_c26,
+	arm_rs_r8_t4_c26,
+	arm_rs_r9_t4_c26,
+	arm_rs_r10_t4_c26,
+	arm_rs_r11_t4_c26,
+	arm_rs_r12_t4_c26,
+	arm_rs_r13_t4_c26,
+	arm_rs_r14_t4_c26,
+	arm_rs_r15_t4_c26,
+	arm_rs_r0_t5_c26,
+	arm_rs_r1_t5_c26,
+	arm_rs_r2_t5_c26,
+	arm_rs_r3_t5_c26,
+	arm_rs_r4_t5_c26,
+	arm_rs_r5_t5_c26,
+	arm_rs_r6_t5_c26,
+	arm_rs_r7_t5_c26,
+	arm_rs_r8_t5_c26,
+	arm_rs_r9_t5_c26,
+	arm_rs_r10_t5_c26,
+	arm_rs_r11_t5_c26,
+	arm_rs_r12_t5_c26,
+	arm_rs_r13_t5_c26,
+	arm_rs_r14_t5_c26,
+	arm_rs_r15_t5_c26,
+	arm_rs_r0_t6_c26,
+	arm_rs_r1_t6_c26,
+	arm_rs_r2_t6_c26,
+	arm_rs_r3_t6_c26,
+	arm_rs_r4_t6_c26,
+	arm_rs_r5_t6_c26,
+	arm_rs_r6_t6_c26,
+	arm_rs_r7_t6_c26,
+	arm_rs_r8_t6_c26,
+	arm_rs_r9_t6_c26,
+	arm_rs_r10_t6_c26,
+	arm_rs_r11_t6_c26,
+	arm_rs_r12_t6_c26,
+	arm_rs_r13_t6_c26,
+	arm_rs_r14_t6_c26,
+	arm_rs_r15_t6_c26,
+	arm_rs_r0_t7_c26,
+	arm_rs_r1_t7_c26,
+	arm_rs_r2_t7_c26,
+	arm_rs_r3_t7_c26,
+	arm_rs_r4_t7_c26,
+	arm_rs_r5_t7_c26,
+	arm_rs_r6_t7_c26,
+	arm_rs_r7_t7_c26,
+	arm_rs_r8_t7_c26,
+	arm_rs_r9_t7_c26,
+	arm_rs_r10_t7_c26,
+	arm_rs_r11_t7_c26,
+	arm_rs_r12_t7_c26,
+	arm_rs_r13_t7_c26,
+	arm_rs_r14_t7_c26,
+	arm_rs_r15_t7_c26,
+	arm_rs_r0_t0_c27,
+	arm_rs_r1_t0_c27,
+	arm_rs_r2_t0_c27,
+	arm_rs_r3_t0_c27,
+	arm_rs_r4_t0_c27,
+	arm_rs_r5_t0_c27,
+	arm_rs_r6_t0_c27,
+	arm_rs_r7_t0_c27,
+	arm_rs_r8_t0_c27,
+	arm_rs_r9_t0_c27,
+	arm_rs_r10_t0_c27,
+	arm_rs_r11_t0_c27,
+	arm_rs_r12_t0_c27,
+	arm_rs_r13_t0_c27,
+	arm_rs_r14_t0_c27,
+	arm_rs_r15_t0_c27,
+	arm_rs_r0_t1_c27,
+	arm_rs_r1_t1_c27,
+	arm_rs_r2_t1_c27,
+	arm_rs_r3_t1_c27,
+	arm_rs_r4_t1_c27,
+	arm_rs_r5_t1_c27,
+	arm_rs_r6_t1_c27,
+	arm_rs_r7_t1_c27,
+	arm_rs_r8_t1_c27,
+	arm_rs_r9_t1_c27,
+	arm_rs_r10_t1_c27,
+	arm_rs_r11_t1_c27,
+	arm_rs_r12_t1_c27,
+	arm_rs_r13_t1_c27,
+	arm_rs_r14_t1_c27,
+	arm_rs_r15_t1_c27,
+	arm_rs_r0_t2_c27,
+	arm_rs_r1_t2_c27,
+	arm_rs_r2_t2_c27,
+	arm_rs_r3_t2_c27,
+	arm_rs_r4_t2_c27,
+	arm_rs_r5_t2_c27,
+	arm_rs_r6_t2_c27,
+	arm_rs_r7_t2_c27,
+	arm_rs_r8_t2_c27,
+	arm_rs_r9_t2_c27,
+	arm_rs_r10_t2_c27,
+	arm_rs_r11_t2_c27,
+	arm_rs_r12_t2_c27,
+	arm_rs_r13_t2_c27,
+	arm_rs_r14_t2_c27,
+	arm_rs_r15_t2_c27,
+	arm_rs_r0_t3_c27,
+	arm_rs_r1_t3_c27,
+	arm_rs_r2_t3_c27,
+	arm_rs_r3_t3_c27,
+	arm_rs_r4_t3_c27,
+	arm_rs_r5_t3_c27,
+	arm_rs_r6_t3_c27,
+	arm_rs_r7_t3_c27,
+	arm_rs_r8_t3_c27,
+	arm_rs_r9_t3_c27,
+	arm_rs_r10_t3_c27,
+	arm_rs_r11_t3_c27,
+	arm_rs_r12_t3_c27,
+	arm_rs_r13_t3_c27,
+	arm_rs_r14_t3_c27,
+	arm_rs_r15_t3_c27,
+	arm_rs_r0_t4_c27,
+	arm_rs_r1_t4_c27,
+	arm_rs_r2_t4_c27,
+	arm_rs_r3_t4_c27,
+	arm_rs_r4_t4_c27,
+	arm_rs_r5_t4_c27,
+	arm_rs_r6_t4_c27,
+	arm_rs_r7_t4_c27,
+	arm_rs_r8_t4_c27,
+	arm_rs_r9_t4_c27,
+	arm_rs_r10_t4_c27,
+	arm_rs_r11_t4_c27,
+	arm_rs_r12_t4_c27,
+	arm_rs_r13_t4_c27,
+	arm_rs_r14_t4_c27,
+	arm_rs_r15_t4_c27,
+	arm_rs_r0_t5_c27,
+	arm_rs_r1_t5_c27,
+	arm_rs_r2_t5_c27,
+	arm_rs_r3_t5_c27,
+	arm_rs_r4_t5_c27,
+	arm_rs_r5_t5_c27,
+	arm_rs_r6_t5_c27,
+	arm_rs_r7_t5_c27,
+	arm_rs_r8_t5_c27,
+	arm_rs_r9_t5_c27,
+	arm_rs_r10_t5_c27,
+	arm_rs_r11_t5_c27,
+	arm_rs_r12_t5_c27,
+	arm_rs_r13_t5_c27,
+	arm_rs_r14_t5_c27,
+	arm_rs_r15_t5_c27,
+	arm_rs_r0_t6_c27,
+	arm_rs_r1_t6_c27,
+	arm_rs_r2_t6_c27,
+	arm_rs_r3_t6_c27,
+	arm_rs_r4_t6_c27,
+	arm_rs_r5_t6_c27,
+	arm_rs_r6_t6_c27,
+	arm_rs_r7_t6_c27,
+	arm_rs_r8_t6_c27,
+	arm_rs_r9_t6_c27,
+	arm_rs_r10_t6_c27,
+	arm_rs_r11_t6_c27,
+	arm_rs_r12_t6_c27,
+	arm_rs_r13_t6_c27,
+	arm_rs_r14_t6_c27,
+	arm_rs_r15_t6_c27,
+	arm_rs_r0_t7_c27,
+	arm_rs_r1_t7_c27,
+	arm_rs_r2_t7_c27,
+	arm_rs_r3_t7_c27,
+	arm_rs_r4_t7_c27,
+	arm_rs_r5_t7_c27,
+	arm_rs_r6_t7_c27,
+	arm_rs_r7_t7_c27,
+	arm_rs_r8_t7_c27,
+	arm_rs_r9_t7_c27,
+	arm_rs_r10_t7_c27,
+	arm_rs_r11_t7_c27,
+	arm_rs_r12_t7_c27,
+	arm_rs_r13_t7_c27,
+	arm_rs_r14_t7_c27,
+	arm_rs_r15_t7_c27,
+	arm_rs_r0_t0_c28,
+	arm_rs_r1_t0_c28,
+	arm_rs_r2_t0_c28,
+	arm_rs_r3_t0_c28,
+	arm_rs_r4_t0_c28,
+	arm_rs_r5_t0_c28,
+	arm_rs_r6_t0_c28,
+	arm_rs_r7_t0_c28,
+	arm_rs_r8_t0_c28,
+	arm_rs_r9_t0_c28,
+	arm_rs_r10_t0_c28,
+	arm_rs_r11_t0_c28,
+	arm_rs_r12_t0_c28,
+	arm_rs_r13_t0_c28,
+	arm_rs_r14_t0_c28,
+	arm_rs_r15_t0_c28,
+	arm_rs_r0_t1_c28,
+	arm_rs_r1_t1_c28,
+	arm_rs_r2_t1_c28,
+	arm_rs_r3_t1_c28,
+	arm_rs_r4_t1_c28,
+	arm_rs_r5_t1_c28,
+	arm_rs_r6_t1_c28,
+	arm_rs_r7_t1_c28,
+	arm_rs_r8_t1_c28,
+	arm_rs_r9_t1_c28,
+	arm_rs_r10_t1_c28,
+	arm_rs_r11_t1_c28,
+	arm_rs_r12_t1_c28,
+	arm_rs_r13_t1_c28,
+	arm_rs_r14_t1_c28,
+	arm_rs_r15_t1_c28,
+	arm_rs_r0_t2_c28,
+	arm_rs_r1_t2_c28,
+	arm_rs_r2_t2_c28,
+	arm_rs_r3_t2_c28,
+	arm_rs_r4_t2_c28,
+	arm_rs_r5_t2_c28,
+	arm_rs_r6_t2_c28,
+	arm_rs_r7_t2_c28,
+	arm_rs_r8_t2_c28,
+	arm_rs_r9_t2_c28,
+	arm_rs_r10_t2_c28,
+	arm_rs_r11_t2_c28,
+	arm_rs_r12_t2_c28,
+	arm_rs_r13_t2_c28,
+	arm_rs_r14_t2_c28,
+	arm_rs_r15_t2_c28,
+	arm_rs_r0_t3_c28,
+	arm_rs_r1_t3_c28,
+	arm_rs_r2_t3_c28,
+	arm_rs_r3_t3_c28,
+	arm_rs_r4_t3_c28,
+	arm_rs_r5_t3_c28,
+	arm_rs_r6_t3_c28,
+	arm_rs_r7_t3_c28,
+	arm_rs_r8_t3_c28,
+	arm_rs_r9_t3_c28,
+	arm_rs_r10_t3_c28,
+	arm_rs_r11_t3_c28,
+	arm_rs_r12_t3_c28,
+	arm_rs_r13_t3_c28,
+	arm_rs_r14_t3_c28,
+	arm_rs_r15_t3_c28,
+	arm_rs_r0_t4_c28,
+	arm_rs_r1_t4_c28,
+	arm_rs_r2_t4_c28,
+	arm_rs_r3_t4_c28,
+	arm_rs_r4_t4_c28,
+	arm_rs_r5_t4_c28,
+	arm_rs_r6_t4_c28,
+	arm_rs_r7_t4_c28,
+	arm_rs_r8_t4_c28,
+	arm_rs_r9_t4_c28,
+	arm_rs_r10_t4_c28,
+	arm_rs_r11_t4_c28,
+	arm_rs_r12_t4_c28,
+	arm_rs_r13_t4_c28,
+	arm_rs_r14_t4_c28,
+	arm_rs_r15_t4_c28,
+	arm_rs_r0_t5_c28,
+	arm_rs_r1_t5_c28,
+	arm_rs_r2_t5_c28,
+	arm_rs_r3_t5_c28,
+	arm_rs_r4_t5_c28,
+	arm_rs_r5_t5_c28,
+	arm_rs_r6_t5_c28,
+	arm_rs_r7_t5_c28,
+	arm_rs_r8_t5_c28,
+	arm_rs_r9_t5_c28,
+	arm_rs_r10_t5_c28,
+	arm_rs_r11_t5_c28,
+	arm_rs_r12_t5_c28,
+	arm_rs_r13_t5_c28,
+	arm_rs_r14_t5_c28,
+	arm_rs_r15_t5_c28,
+	arm_rs_r0_t6_c28,
+	arm_rs_r1_t6_c28,
+	arm_rs_r2_t6_c28,
+	arm_rs_r3_t6_c28,
+	arm_rs_r4_t6_c28,
+	arm_rs_r5_t6_c28,
+	arm_rs_r6_t6_c28,
+	arm_rs_r7_t6_c28,
+	arm_rs_r8_t6_c28,
+	arm_rs_r9_t6_c28,
+	arm_rs_r10_t6_c28,
+	arm_rs_r11_t6_c28,
+	arm_rs_r12_t6_c28,
+	arm_rs_r13_t6_c28,
+	arm_rs_r14_t6_c28,
+	arm_rs_r15_t6_c28,
+	arm_rs_r0_t7_c28,
+	arm_rs_r1_t7_c28,
+	arm_rs_r2_t7_c28,
+	arm_rs_r3_t7_c28,
+	arm_rs_r4_t7_c28,
+	arm_rs_r5_t7_c28,
+	arm_rs_r6_t7_c28,
+	arm_rs_r7_t7_c28,
+	arm_rs_r8_t7_c28,
+	arm_rs_r9_t7_c28,
+	arm_rs_r10_t7_c28,
+	arm_rs_r11_t7_c28,
+	arm_rs_r12_t7_c28,
+	arm_rs_r13_t7_c28,
+	arm_rs_r14_t7_c28,
+	arm_rs_r15_t7_c28,
+	arm_rs_r0_t0_c29,
+	arm_rs_r1_t0_c29,
+	arm_rs_r2_t0_c29,
+	arm_rs_r3_t0_c29,
+	arm_rs_r4_t0_c29,
+	arm_rs_r5_t0_c29,
+	arm_rs_r6_t0_c29,
+	arm_rs_r7_t0_c29,
+	arm_rs_r8_t0_c29,
+	arm_rs_r9_t0_c29,
+	arm_rs_r10_t0_c29,
+	arm_rs_r11_t0_c29,
+	arm_rs_r12_t0_c29,
+	arm_rs_r13_t0_c29,
+	arm_rs_r14_t0_c29,
+	arm_rs_r15_t0_c29,
+	arm_rs_r0_t1_c29,
+	arm_rs_r1_t1_c29,
+	arm_rs_r2_t1_c29,
+	arm_rs_r3_t1_c29,
+	arm_rs_r4_t1_c29,
+	arm_rs_r5_t1_c29,
+	arm_rs_r6_t1_c29,
+	arm_rs_r7_t1_c29,
+	arm_rs_r8_t1_c29,
+	arm_rs_r9_t1_c29,
+	arm_rs_r10_t1_c29,
+	arm_rs_r11_t1_c29,
+	arm_rs_r12_t1_c29,
+	arm_rs_r13_t1_c29,
+	arm_rs_r14_t1_c29,
+	arm_rs_r15_t1_c29,
+	arm_rs_r0_t2_c29,
+	arm_rs_r1_t2_c29,
+	arm_rs_r2_t2_c29,
+	arm_rs_r3_t2_c29,
+	arm_rs_r4_t2_c29,
+	arm_rs_r5_t2_c29,
+	arm_rs_r6_t2_c29,
+	arm_rs_r7_t2_c29,
+	arm_rs_r8_t2_c29,
+	arm_rs_r9_t2_c29,
+	arm_rs_r10_t2_c29,
+	arm_rs_r11_t2_c29,
+	arm_rs_r12_t2_c29,
+	arm_rs_r13_t2_c29,
+	arm_rs_r14_t2_c29,
+	arm_rs_r15_t2_c29,
+	arm_rs_r0_t3_c29,
+	arm_rs_r1_t3_c29,
+	arm_rs_r2_t3_c29,
+	arm_rs_r3_t3_c29,
+	arm_rs_r4_t3_c29,
+	arm_rs_r5_t3_c29,
+	arm_rs_r6_t3_c29,
+	arm_rs_r7_t3_c29,
+	arm_rs_r8_t3_c29,
+	arm_rs_r9_t3_c29,
+	arm_rs_r10_t3_c29,
+	arm_rs_r11_t3_c29,
+	arm_rs_r12_t3_c29,
+	arm_rs_r13_t3_c29,
+	arm_rs_r14_t3_c29,
+	arm_rs_r15_t3_c29,
+	arm_rs_r0_t4_c29,
+	arm_rs_r1_t4_c29,
+	arm_rs_r2_t4_c29,
+	arm_rs_r3_t4_c29,
+	arm_rs_r4_t4_c29,
+	arm_rs_r5_t4_c29,
+	arm_rs_r6_t4_c29,
+	arm_rs_r7_t4_c29,
+	arm_rs_r8_t4_c29,
+	arm_rs_r9_t4_c29,
+	arm_rs_r10_t4_c29,
+	arm_rs_r11_t4_c29,
+	arm_rs_r12_t4_c29,
+	arm_rs_r13_t4_c29,
+	arm_rs_r14_t4_c29,
+	arm_rs_r15_t4_c29,
+	arm_rs_r0_t5_c29,
+	arm_rs_r1_t5_c29,
+	arm_rs_r2_t5_c29,
+	arm_rs_r3_t5_c29,
+	arm_rs_r4_t5_c29,
+	arm_rs_r5_t5_c29,
+	arm_rs_r6_t5_c29,
+	arm_rs_r7_t5_c29,
+	arm_rs_r8_t5_c29,
+	arm_rs_r9_t5_c29,
+	arm_rs_r10_t5_c29,
+	arm_rs_r11_t5_c29,
+	arm_rs_r12_t5_c29,
+	arm_rs_r13_t5_c29,
+	arm_rs_r14_t5_c29,
+	arm_rs_r15_t5_c29,
+	arm_rs_r0_t6_c29,
+	arm_rs_r1_t6_c29,
+	arm_rs_r2_t6_c29,
+	arm_rs_r3_t6_c29,
+	arm_rs_r4_t6_c29,
+	arm_rs_r5_t6_c29,
+	arm_rs_r6_t6_c29,
+	arm_rs_r7_t6_c29,
+	arm_rs_r8_t6_c29,
+	arm_rs_r9_t6_c29,
+	arm_rs_r10_t6_c29,
+	arm_rs_r11_t6_c29,
+	arm_rs_r12_t6_c29,
+	arm_rs_r13_t6_c29,
+	arm_rs_r14_t6_c29,
+	arm_rs_r15_t6_c29,
+	arm_rs_r0_t7_c29,
+	arm_rs_r1_t7_c29,
+	arm_rs_r2_t7_c29,
+	arm_rs_r3_t7_c29,
+	arm_rs_r4_t7_c29,
+	arm_rs_r5_t7_c29,
+	arm_rs_r6_t7_c29,
+	arm_rs_r7_t7_c29,
+	arm_rs_r8_t7_c29,
+	arm_rs_r9_t7_c29,
+	arm_rs_r10_t7_c29,
+	arm_rs_r11_t7_c29,
+	arm_rs_r12_t7_c29,
+	arm_rs_r13_t7_c29,
+	arm_rs_r14_t7_c29,
+	arm_rs_r15_t7_c29,
+	arm_rs_r0_t0_c30,
+	arm_rs_r1_t0_c30,
+	arm_rs_r2_t0_c30,
+	arm_rs_r3_t0_c30,
+	arm_rs_r4_t0_c30,
+	arm_rs_r5_t0_c30,
+	arm_rs_r6_t0_c30,
+	arm_rs_r7_t0_c30,
+	arm_rs_r8_t0_c30,
+	arm_rs_r9_t0_c30,
+	arm_rs_r10_t0_c30,
+	arm_rs_r11_t0_c30,
+	arm_rs_r12_t0_c30,
+	arm_rs_r13_t0_c30,
+	arm_rs_r14_t0_c30,
+	arm_rs_r15_t0_c30,
+	arm_rs_r0_t1_c30,
+	arm_rs_r1_t1_c30,
+	arm_rs_r2_t1_c30,
+	arm_rs_r3_t1_c30,
+	arm_rs_r4_t1_c30,
+	arm_rs_r5_t1_c30,
+	arm_rs_r6_t1_c30,
+	arm_rs_r7_t1_c30,
+	arm_rs_r8_t1_c30,
+	arm_rs_r9_t1_c30,
+	arm_rs_r10_t1_c30,
+	arm_rs_r11_t1_c30,
+	arm_rs_r12_t1_c30,
+	arm_rs_r13_t1_c30,
+	arm_rs_r14_t1_c30,
+	arm_rs_r15_t1_c30,
+	arm_rs_r0_t2_c30,
+	arm_rs_r1_t2_c30,
+	arm_rs_r2_t2_c30,
+	arm_rs_r3_t2_c30,
+	arm_rs_r4_t2_c30,
+	arm_rs_r5_t2_c30,
+	arm_rs_r6_t2_c30,
+	arm_rs_r7_t2_c30,
+	arm_rs_r8_t2_c30,
+	arm_rs_r9_t2_c30,
+	arm_rs_r10_t2_c30,
+	arm_rs_r11_t2_c30,
+	arm_rs_r12_t2_c30,
+	arm_rs_r13_t2_c30,
+	arm_rs_r14_t2_c30,
+	arm_rs_r15_t2_c30,
+	arm_rs_r0_t3_c30,
+	arm_rs_r1_t3_c30,
+	arm_rs_r2_t3_c30,
+	arm_rs_r3_t3_c30,
+	arm_rs_r4_t3_c30,
+	arm_rs_r5_t3_c30,
+	arm_rs_r6_t3_c30,
+	arm_rs_r7_t3_c30,
+	arm_rs_r8_t3_c30,
+	arm_rs_r9_t3_c30,
+	arm_rs_r10_t3_c30,
+	arm_rs_r11_t3_c30,
+	arm_rs_r12_t3_c30,
+	arm_rs_r13_t3_c30,
+	arm_rs_r14_t3_c30,
+	arm_rs_r15_t3_c30,
+	arm_rs_r0_t4_c30,
+	arm_rs_r1_t4_c30,
+	arm_rs_r2_t4_c30,
+	arm_rs_r3_t4_c30,
+	arm_rs_r4_t4_c30,
+	arm_rs_r5_t4_c30,
+	arm_rs_r6_t4_c30,
+	arm_rs_r7_t4_c30,
+	arm_rs_r8_t4_c30,
+	arm_rs_r9_t4_c30,
+	arm_rs_r10_t4_c30,
+	arm_rs_r11_t4_c30,
+	arm_rs_r12_t4_c30,
+	arm_rs_r13_t4_c30,
+	arm_rs_r14_t4_c30,
+	arm_rs_r15_t4_c30,
+	arm_rs_r0_t5_c30,
+	arm_rs_r1_t5_c30,
+	arm_rs_r2_t5_c30,
+	arm_rs_r3_t5_c30,
+	arm_rs_r4_t5_c30,
+	arm_rs_r5_t5_c30,
+	arm_rs_r6_t5_c30,
+	arm_rs_r7_t5_c30,
+	arm_rs_r8_t5_c30,
+	arm_rs_r9_t5_c30,
+	arm_rs_r10_t5_c30,
+	arm_rs_r11_t5_c30,
+	arm_rs_r12_t5_c30,
+	arm_rs_r13_t5_c30,
+	arm_rs_r14_t5_c30,
+	arm_rs_r15_t5_c30,
+	arm_rs_r0_t6_c30,
+	arm_rs_r1_t6_c30,
+	arm_rs_r2_t6_c30,
+	arm_rs_r3_t6_c30,
+	arm_rs_r4_t6_c30,
+	arm_rs_r5_t6_c30,
+	arm_rs_r6_t6_c30,
+	arm_rs_r7_t6_c30,
+	arm_rs_r8_t6_c30,
+	arm_rs_r9_t6_c30,
+	arm_rs_r10_t6_c30,
+	arm_rs_r11_t6_c30,
+	arm_rs_r12_t6_c30,
+	arm_rs_r13_t6_c30,
+	arm_rs_r14_t6_c30,
+	arm_rs_r15_t6_c30,
+	arm_rs_r0_t7_c30,
+	arm_rs_r1_t7_c30,
+	arm_rs_r2_t7_c30,
+	arm_rs_r3_t7_c30,
+	arm_rs_r4_t7_c30,
+	arm_rs_r5_t7_c30,
+	arm_rs_r6_t7_c30,
+	arm_rs_r7_t7_c30,
+	arm_rs_r8_t7_c30,
+	arm_rs_r9_t7_c30,
+	arm_rs_r10_t7_c30,
+	arm_rs_r11_t7_c30,
+	arm_rs_r12_t7_c30,
+	arm_rs_r13_t7_c30,
+	arm_rs_r14_t7_c30,
+	arm_rs_r15_t7_c30,
+	arm_rs_r0_t0_c31,
+	arm_rs_r1_t0_c31,
+	arm_rs_r2_t0_c31,
+	arm_rs_r3_t0_c31,
+	arm_rs_r4_t0_c31,
+	arm_rs_r5_t0_c31,
+	arm_rs_r6_t0_c31,
+	arm_rs_r7_t0_c31,
+	arm_rs_r8_t0_c31,
+	arm_rs_r9_t0_c31,
+	arm_rs_r10_t0_c31,
+	arm_rs_r11_t0_c31,
+	arm_rs_r12_t0_c31,
+	arm_rs_r13_t0_c31,
+	arm_rs_r14_t0_c31,
+	arm_rs_r15_t0_c31,
+	arm_rs_r0_t1_c31,
+	arm_rs_r1_t1_c31,
+	arm_rs_r2_t1_c31,
+	arm_rs_r3_t1_c31,
+	arm_rs_r4_t1_c31,
+	arm_rs_r5_t1_c31,
+	arm_rs_r6_t1_c31,
+	arm_rs_r7_t1_c31,
+	arm_rs_r8_t1_c31,
+	arm_rs_r9_t1_c31,
+	arm_rs_r10_t1_c31,
+	arm_rs_r11_t1_c31,
+	arm_rs_r12_t1_c31,
+	arm_rs_r13_t1_c31,
+	arm_rs_r14_t1_c31,
+	arm_rs_r15_t1_c31,
+	arm_rs_r0_t2_c31,
+	arm_rs_r1_t2_c31,
+	arm_rs_r2_t2_c31,
+	arm_rs_r3_t2_c31,
+	arm_rs_r4_t2_c31,
+	arm_rs_r5_t2_c31,
+	arm_rs_r6_t2_c31,
+	arm_rs_r7_t2_c31,
+	arm_rs_r8_t2_c31,
+	arm_rs_r9_t2_c31,
+	arm_rs_r10_t2_c31,
+	arm_rs_r11_t2_c31,
+	arm_rs_r12_t2_c31,
+	arm_rs_r13_t2_c31,
+	arm_rs_r14_t2_c31,
+	arm_rs_r15_t2_c31,
+	arm_rs_r0_t3_c31,
+	arm_rs_r1_t3_c31,
+	arm_rs_r2_t3_c31,
+	arm_rs_r3_t3_c31,
+	arm_rs_r4_t3_c31,
+	arm_rs_r5_t3_c31,
+	arm_rs_r6_t3_c31,
+	arm_rs_r7_t3_c31,
+	arm_rs_r8_t3_c31,
+	arm_rs_r9_t3_c31,
+	arm_rs_r10_t3_c31,
+	arm_rs_r11_t3_c31,
+	arm_rs_r12_t3_c31,
+	arm_rs_r13_t3_c31,
+	arm_rs_r14_t3_c31,
+	arm_rs_r15_t3_c31,
+	arm_rs_r0_t4_c31,
+	arm_rs_r1_t4_c31,
+	arm_rs_r2_t4_c31,
+	arm_rs_r3_t4_c31,
+	arm_rs_r4_t4_c31,
+	arm_rs_r5_t4_c31,
+	arm_rs_r6_t4_c31,
+	arm_rs_r7_t4_c31,
+	arm_rs_r8_t4_c31,
+	arm_rs_r9_t4_c31,
+	arm_rs_r10_t4_c31,
+	arm_rs_r11_t4_c31,
+	arm_rs_r12_t4_c31,
+	arm_rs_r13_t4_c31,
+	arm_rs_r14_t4_c31,
+	arm_rs_r15_t4_c31,
+	arm_rs_r0_t5_c31,
+	arm_rs_r1_t5_c31,
+	arm_rs_r2_t5_c31,
+	arm_rs_r3_t5_c31,
+	arm_rs_r4_t5_c31,
+	arm_rs_r5_t5_c31,
+	arm_rs_r6_t5_c31,
+	arm_rs_r7_t5_c31,
+	arm_rs_r8_t5_c31,
+	arm_rs_r9_t5_c31,
+	arm_rs_r10_t5_c31,
+	arm_rs_r11_t5_c31,
+	arm_rs_r12_t5_c31,
+	arm_rs_r13_t5_c31,
+	arm_rs_r14_t5_c31,
+	arm_rs_r15_t5_c31,
+	arm_rs_r0_t6_c31,
+	arm_rs_r1_t6_c31,
+	arm_rs_r2_t6_c31,
+	arm_rs_r3_t6_c31,
+	arm_rs_r4_t6_c31,
+	arm_rs_r5_t6_c31,
+	arm_rs_r6_t6_c31,
+	arm_rs_r7_t6_c31,
+	arm_rs_r8_t6_c31,
+	arm_rs_r9_t6_c31,
+	arm_rs_r10_t6_c31,
+	arm_rs_r11_t6_c31,
+	arm_rs_r12_t6_c31,
+	arm_rs_r13_t6_c31,
+	arm_rs_r14_t6_c31,
+	arm_rs_r15_t6_c31,
+	arm_rs_r0_t7_c31,
+	arm_rs_r1_t7_c31,
+	arm_rs_r2_t7_c31,
+	arm_rs_r3_t7_c31,
+	arm_rs_r4_t7_c31,
+	arm_rs_r5_t7_c31,
+	arm_rs_r6_t7_c31,
+	arm_rs_r7_t7_c31,
+	arm_rs_r8_t7_c31,
+	arm_rs_r9_t7_c31,
+	arm_rs_r10_t7_c31,
+	arm_rs_r11_t7_c31,
+	arm_rs_r12_t7_c31,
+	arm_rs_r13_t7_c31,
+	arm_rs_r14_t7_c31,
+	arm_rs_r15_t7_c31
+};
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r0.c gxemul-0.7.0/src/cpus/tmp_arm_r0.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r0.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r0.c	2022-10-18 16:37:22.086747400 +0000
@@ -0,0 +1,3210 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0];
+}
+uint32_t arm_r_r1_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1];
+}
+uint32_t arm_r_r2_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2];
+}
+uint32_t arm_r_r3_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3];
+}
+uint32_t arm_r_r4_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4];
+}
+uint32_t arm_r_r5_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5];
+}
+uint32_t arm_r_r6_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6];
+}
+uint32_t arm_r_r7_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7];
+}
+uint32_t arm_r_r8_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8];
+}
+uint32_t arm_r_r9_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9];
+}
+uint32_t arm_r_r10_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10];
+}
+uint32_t arm_r_r11_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11];
+}
+uint32_t arm_r_r12_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12];
+}
+uint32_t arm_r_r13_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13];
+}
+uint32_t arm_r_r14_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14];
+}
+uint32_t arm_r_r15_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp;
+}
+uint32_t arm_r_r0_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r1_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r2_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r3_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r4_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r5_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r6_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r7_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r8_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r9_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r10_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r11_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r12_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r13_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r14_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return 0;
+}
+uint32_t arm_r_r15_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return 0;
+}
+uint32_t arm_r_r0_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r1_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r2_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r3_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r4_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r5_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r6_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r7_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r8_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r9_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r10_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r11_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r12_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r13_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r14_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r15_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp & 0x80000000? 0xffffffff : 0;
+}
+uint32_t arm_r_r0_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r1_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r2_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r3_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r4_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r5_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r6_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r7_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r8_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r9_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r10_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r11_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r12_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r13_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r14_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r15_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;return x >> 1; }
+}
+uint32_t arm_r_r0_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 1;
+}
+uint32_t arm_r_r1_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 1;
+}
+uint32_t arm_r_r2_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 1;
+}
+uint32_t arm_r_r3_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 1;
+}
+uint32_t arm_r_r4_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 1;
+}
+uint32_t arm_r_r5_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 1;
+}
+uint32_t arm_r_r6_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 1;
+}
+uint32_t arm_r_r7_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 1;
+}
+uint32_t arm_r_r8_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 1;
+}
+uint32_t arm_r_r9_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 1;
+}
+uint32_t arm_r_r10_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 1;
+}
+uint32_t arm_r_r11_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 1;
+}
+uint32_t arm_r_r12_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 1;
+}
+uint32_t arm_r_r13_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 1;
+}
+uint32_t arm_r_r14_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 1;
+}
+uint32_t arm_r_r15_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 1;
+}
+uint32_t arm_r_r0_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[0] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 1;
+}
+uint32_t arm_r_r1_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 1;
+}
+uint32_t arm_r_r2_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 1;
+}
+uint32_t arm_r_r3_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 1;
+}
+uint32_t arm_r_r4_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 1;
+}
+uint32_t arm_r_r5_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 1;
+}
+uint32_t arm_r_r6_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 1;
+}
+uint32_t arm_r_r7_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 1;
+}
+uint32_t arm_r_r8_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 1;
+}
+uint32_t arm_r_r9_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 1;
+}
+uint32_t arm_r_r10_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 1;
+}
+uint32_t arm_r_r11_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 1;
+}
+uint32_t arm_r_r12_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 1;
+}
+uint32_t arm_r_r13_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 1;
+}
+uint32_t arm_r_r14_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 1;
+}
+uint32_t arm_r_r15_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 1;
+}
+uint32_t arm_r_r0_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[0]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 1;
+}
+uint32_t arm_r_r1_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 1;
+}
+uint32_t arm_r_r2_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 1;
+}
+uint32_t arm_r_r3_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 1;
+}
+uint32_t arm_r_r4_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 1;
+}
+uint32_t arm_r_r5_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 1;
+}
+uint32_t arm_r_r6_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 1;
+}
+uint32_t arm_r_r7_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 1;
+}
+uint32_t arm_r_r8_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 1;
+}
+uint32_t arm_r_r9_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 1;
+}
+uint32_t arm_r_r10_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 1;
+}
+uint32_t arm_r_r11_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 1;
+}
+uint32_t arm_r_r12_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 1;
+}
+uint32_t arm_r_r13_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 1;
+}
+uint32_t arm_r_r14_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 1;
+}
+uint32_t arm_r_r15_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 1;
+}
+uint32_t arm_r_r0_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[0]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r1_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r2_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r3_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r4_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r5_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r6_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r7_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r8_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r9_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r10_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r11_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r12_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r13_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r14_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r15_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 1; }
+}
+uint32_t arm_r_r0_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[0]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = 0;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x = (x<0)? 0xffffffff : 0;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r1_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r2_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r3_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r4_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r5_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r6_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r7_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r8_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r9_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r10_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r11_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r12_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r13_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r14_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r15_t6_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; if (cpu->cd.arm.flags & ARM_F_C) x |= 0x100000000ULL;cpu->cd.arm.flags &= ~ARM_F_C;if(x&1) cpu->cd.arm.flags |= ARM_F_C;return x >> 1; }
+}
+uint32_t arm_rs_r0_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c0(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 1;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[0] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 1;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t6_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c1(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[0]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r1.c gxemul-0.7.0/src/cpus/tmp_arm_r1.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r1.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r1.c	2022-10-18 16:37:22.086747400 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 2;
+}
+uint32_t arm_r_r1_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 2;
+}
+uint32_t arm_r_r2_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 2;
+}
+uint32_t arm_r_r3_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 2;
+}
+uint32_t arm_r_r4_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 2;
+}
+uint32_t arm_r_r5_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 2;
+}
+uint32_t arm_r_r6_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 2;
+}
+uint32_t arm_r_r7_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 2;
+}
+uint32_t arm_r_r8_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 2;
+}
+uint32_t arm_r_r9_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 2;
+}
+uint32_t arm_r_r10_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 2;
+}
+uint32_t arm_r_r11_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 2;
+}
+uint32_t arm_r_r12_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 2;
+}
+uint32_t arm_r_r13_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 2;
+}
+uint32_t arm_r_r14_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 2;
+}
+uint32_t arm_r_r15_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 2;
+}
+uint32_t arm_r_r0_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 2;
+}
+uint32_t arm_r_r1_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 2;
+}
+uint32_t arm_r_r2_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 2;
+}
+uint32_t arm_r_r3_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 2;
+}
+uint32_t arm_r_r4_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 2;
+}
+uint32_t arm_r_r5_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 2;
+}
+uint32_t arm_r_r6_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 2;
+}
+uint32_t arm_r_r7_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 2;
+}
+uint32_t arm_r_r8_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 2;
+}
+uint32_t arm_r_r9_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 2;
+}
+uint32_t arm_r_r10_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 2;
+}
+uint32_t arm_r_r11_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 2;
+}
+uint32_t arm_r_r12_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 2;
+}
+uint32_t arm_r_r13_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 2;
+}
+uint32_t arm_r_r14_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 2;
+}
+uint32_t arm_r_r15_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 2;
+}
+uint32_t arm_r_r0_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 2;
+}
+uint32_t arm_r_r1_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 2;
+}
+uint32_t arm_r_r2_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 2;
+}
+uint32_t arm_r_r3_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 2;
+}
+uint32_t arm_r_r4_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 2;
+}
+uint32_t arm_r_r5_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 2;
+}
+uint32_t arm_r_r6_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 2;
+}
+uint32_t arm_r_r7_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 2;
+}
+uint32_t arm_r_r8_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 2;
+}
+uint32_t arm_r_r9_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 2;
+}
+uint32_t arm_r_r10_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 2;
+}
+uint32_t arm_r_r11_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 2;
+}
+uint32_t arm_r_r12_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 2;
+}
+uint32_t arm_r_r13_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 2;
+}
+uint32_t arm_r_r14_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 2;
+}
+uint32_t arm_r_r15_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 2;
+}
+uint32_t arm_r_r0_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r1_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r2_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r3_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r4_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r5_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r6_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r7_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r8_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r9_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r10_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r11_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r12_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r13_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r14_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r15_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 2; }
+}
+uint32_t arm_r_r0_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 3;
+}
+uint32_t arm_r_r1_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 3;
+}
+uint32_t arm_r_r2_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 3;
+}
+uint32_t arm_r_r3_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 3;
+}
+uint32_t arm_r_r4_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 3;
+}
+uint32_t arm_r_r5_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 3;
+}
+uint32_t arm_r_r6_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 3;
+}
+uint32_t arm_r_r7_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 3;
+}
+uint32_t arm_r_r8_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 3;
+}
+uint32_t arm_r_r9_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 3;
+}
+uint32_t arm_r_r10_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 3;
+}
+uint32_t arm_r_r11_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 3;
+}
+uint32_t arm_r_r12_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 3;
+}
+uint32_t arm_r_r13_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 3;
+}
+uint32_t arm_r_r14_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 3;
+}
+uint32_t arm_r_r15_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 3;
+}
+uint32_t arm_r_r0_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[1] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 3;
+}
+uint32_t arm_r_r1_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 3;
+}
+uint32_t arm_r_r2_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 3;
+}
+uint32_t arm_r_r3_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 3;
+}
+uint32_t arm_r_r4_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 3;
+}
+uint32_t arm_r_r5_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 3;
+}
+uint32_t arm_r_r6_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 3;
+}
+uint32_t arm_r_r7_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 3;
+}
+uint32_t arm_r_r8_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 3;
+}
+uint32_t arm_r_r9_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 3;
+}
+uint32_t arm_r_r10_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 3;
+}
+uint32_t arm_r_r11_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 3;
+}
+uint32_t arm_r_r12_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 3;
+}
+uint32_t arm_r_r13_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 3;
+}
+uint32_t arm_r_r14_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 3;
+}
+uint32_t arm_r_r15_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 3;
+}
+uint32_t arm_r_r0_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[1]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 3;
+}
+uint32_t arm_r_r1_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 3;
+}
+uint32_t arm_r_r2_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 3;
+}
+uint32_t arm_r_r3_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 3;
+}
+uint32_t arm_r_r4_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 3;
+}
+uint32_t arm_r_r5_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 3;
+}
+uint32_t arm_r_r6_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 3;
+}
+uint32_t arm_r_r7_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 3;
+}
+uint32_t arm_r_r8_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 3;
+}
+uint32_t arm_r_r9_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 3;
+}
+uint32_t arm_r_r10_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 3;
+}
+uint32_t arm_r_r11_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 3;
+}
+uint32_t arm_r_r12_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 3;
+}
+uint32_t arm_r_r13_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 3;
+}
+uint32_t arm_r_r14_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 3;
+}
+uint32_t arm_r_r15_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 3;
+}
+uint32_t arm_r_r0_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[1]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r1_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r2_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r3_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r4_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r5_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r6_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r7_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r8_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r9_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r10_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r11_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r12_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r13_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r14_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r15_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 3; }
+}
+uint32_t arm_r_r0_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[1]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 2;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 2;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r1_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r2_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r3_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r4_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r5_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r6_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r7_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r8_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r9_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r10_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r11_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r12_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r13_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r14_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r15_t6_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 2; }
+}
+uint32_t arm_rs_r0_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c2(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 3;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[1] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 3;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r1_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r2_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r3_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r4_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r5_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r6_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r7_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r8_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r9_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r10_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r11_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r12_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r13_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r14_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r15_t6_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 3; }
+}
+uint32_t arm_rs_r0_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c3(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[1]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r2.c gxemul-0.7.0/src/cpus/tmp_arm_r2.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r2.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r2.c	2022-10-18 16:37:22.087748600 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 4;
+}
+uint32_t arm_r_r1_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 4;
+}
+uint32_t arm_r_r2_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 4;
+}
+uint32_t arm_r_r3_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 4;
+}
+uint32_t arm_r_r4_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 4;
+}
+uint32_t arm_r_r5_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 4;
+}
+uint32_t arm_r_r6_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 4;
+}
+uint32_t arm_r_r7_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 4;
+}
+uint32_t arm_r_r8_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 4;
+}
+uint32_t arm_r_r9_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 4;
+}
+uint32_t arm_r_r10_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 4;
+}
+uint32_t arm_r_r11_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 4;
+}
+uint32_t arm_r_r12_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 4;
+}
+uint32_t arm_r_r13_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 4;
+}
+uint32_t arm_r_r14_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 4;
+}
+uint32_t arm_r_r15_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 4;
+}
+uint32_t arm_r_r0_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 4;
+}
+uint32_t arm_r_r1_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 4;
+}
+uint32_t arm_r_r2_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 4;
+}
+uint32_t arm_r_r3_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 4;
+}
+uint32_t arm_r_r4_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 4;
+}
+uint32_t arm_r_r5_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 4;
+}
+uint32_t arm_r_r6_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 4;
+}
+uint32_t arm_r_r7_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 4;
+}
+uint32_t arm_r_r8_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 4;
+}
+uint32_t arm_r_r9_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 4;
+}
+uint32_t arm_r_r10_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 4;
+}
+uint32_t arm_r_r11_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 4;
+}
+uint32_t arm_r_r12_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 4;
+}
+uint32_t arm_r_r13_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 4;
+}
+uint32_t arm_r_r14_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 4;
+}
+uint32_t arm_r_r15_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 4;
+}
+uint32_t arm_r_r0_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 4;
+}
+uint32_t arm_r_r1_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 4;
+}
+uint32_t arm_r_r2_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 4;
+}
+uint32_t arm_r_r3_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 4;
+}
+uint32_t arm_r_r4_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 4;
+}
+uint32_t arm_r_r5_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 4;
+}
+uint32_t arm_r_r6_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 4;
+}
+uint32_t arm_r_r7_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 4;
+}
+uint32_t arm_r_r8_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 4;
+}
+uint32_t arm_r_r9_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 4;
+}
+uint32_t arm_r_r10_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 4;
+}
+uint32_t arm_r_r11_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 4;
+}
+uint32_t arm_r_r12_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 4;
+}
+uint32_t arm_r_r13_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 4;
+}
+uint32_t arm_r_r14_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 4;
+}
+uint32_t arm_r_r15_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 4;
+}
+uint32_t arm_r_r0_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r1_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r2_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r3_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r4_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r5_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r6_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r7_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r8_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r9_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r10_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r11_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r12_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r13_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r14_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r15_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 4; }
+}
+uint32_t arm_r_r0_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 5;
+}
+uint32_t arm_r_r1_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 5;
+}
+uint32_t arm_r_r2_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 5;
+}
+uint32_t arm_r_r3_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 5;
+}
+uint32_t arm_r_r4_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 5;
+}
+uint32_t arm_r_r5_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 5;
+}
+uint32_t arm_r_r6_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 5;
+}
+uint32_t arm_r_r7_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 5;
+}
+uint32_t arm_r_r8_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 5;
+}
+uint32_t arm_r_r9_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 5;
+}
+uint32_t arm_r_r10_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 5;
+}
+uint32_t arm_r_r11_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 5;
+}
+uint32_t arm_r_r12_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 5;
+}
+uint32_t arm_r_r13_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 5;
+}
+uint32_t arm_r_r14_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 5;
+}
+uint32_t arm_r_r15_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 5;
+}
+uint32_t arm_r_r0_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[2] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 5;
+}
+uint32_t arm_r_r1_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 5;
+}
+uint32_t arm_r_r2_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 5;
+}
+uint32_t arm_r_r3_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 5;
+}
+uint32_t arm_r_r4_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 5;
+}
+uint32_t arm_r_r5_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 5;
+}
+uint32_t arm_r_r6_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 5;
+}
+uint32_t arm_r_r7_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 5;
+}
+uint32_t arm_r_r8_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 5;
+}
+uint32_t arm_r_r9_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 5;
+}
+uint32_t arm_r_r10_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 5;
+}
+uint32_t arm_r_r11_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 5;
+}
+uint32_t arm_r_r12_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 5;
+}
+uint32_t arm_r_r13_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 5;
+}
+uint32_t arm_r_r14_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 5;
+}
+uint32_t arm_r_r15_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 5;
+}
+uint32_t arm_r_r0_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[2]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 5;
+}
+uint32_t arm_r_r1_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 5;
+}
+uint32_t arm_r_r2_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 5;
+}
+uint32_t arm_r_r3_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 5;
+}
+uint32_t arm_r_r4_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 5;
+}
+uint32_t arm_r_r5_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 5;
+}
+uint32_t arm_r_r6_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 5;
+}
+uint32_t arm_r_r7_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 5;
+}
+uint32_t arm_r_r8_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 5;
+}
+uint32_t arm_r_r9_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 5;
+}
+uint32_t arm_r_r10_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 5;
+}
+uint32_t arm_r_r11_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 5;
+}
+uint32_t arm_r_r12_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 5;
+}
+uint32_t arm_r_r13_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 5;
+}
+uint32_t arm_r_r14_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 5;
+}
+uint32_t arm_r_r15_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 5;
+}
+uint32_t arm_r_r0_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[2]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r1_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r2_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r3_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r4_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r5_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r6_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r7_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r8_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r9_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r10_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r11_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r12_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r13_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r14_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r15_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 5; }
+}
+uint32_t arm_r_r0_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[2]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 4;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 4;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r1_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r2_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r3_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r4_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r5_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r6_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r7_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r8_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r9_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r10_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r11_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r12_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r13_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r14_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r15_t6_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 4; }
+}
+uint32_t arm_rs_r0_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c4(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 5;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[2] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 5;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r1_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r2_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r3_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r4_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r5_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r6_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r7_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r8_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r9_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r10_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r11_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r12_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r13_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r14_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r15_t6_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 5; }
+}
+uint32_t arm_rs_r0_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c5(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[2]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r3.c gxemul-0.7.0/src/cpus/tmp_arm_r3.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r3.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r3.c	2022-10-18 16:37:22.088749100 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 6;
+}
+uint32_t arm_r_r1_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 6;
+}
+uint32_t arm_r_r2_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 6;
+}
+uint32_t arm_r_r3_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 6;
+}
+uint32_t arm_r_r4_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 6;
+}
+uint32_t arm_r_r5_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 6;
+}
+uint32_t arm_r_r6_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 6;
+}
+uint32_t arm_r_r7_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 6;
+}
+uint32_t arm_r_r8_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 6;
+}
+uint32_t arm_r_r9_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 6;
+}
+uint32_t arm_r_r10_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 6;
+}
+uint32_t arm_r_r11_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 6;
+}
+uint32_t arm_r_r12_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 6;
+}
+uint32_t arm_r_r13_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 6;
+}
+uint32_t arm_r_r14_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 6;
+}
+uint32_t arm_r_r15_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 6;
+}
+uint32_t arm_r_r0_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 6;
+}
+uint32_t arm_r_r1_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 6;
+}
+uint32_t arm_r_r2_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 6;
+}
+uint32_t arm_r_r3_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 6;
+}
+uint32_t arm_r_r4_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 6;
+}
+uint32_t arm_r_r5_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 6;
+}
+uint32_t arm_r_r6_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 6;
+}
+uint32_t arm_r_r7_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 6;
+}
+uint32_t arm_r_r8_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 6;
+}
+uint32_t arm_r_r9_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 6;
+}
+uint32_t arm_r_r10_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 6;
+}
+uint32_t arm_r_r11_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 6;
+}
+uint32_t arm_r_r12_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 6;
+}
+uint32_t arm_r_r13_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 6;
+}
+uint32_t arm_r_r14_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 6;
+}
+uint32_t arm_r_r15_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 6;
+}
+uint32_t arm_r_r0_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 6;
+}
+uint32_t arm_r_r1_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 6;
+}
+uint32_t arm_r_r2_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 6;
+}
+uint32_t arm_r_r3_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 6;
+}
+uint32_t arm_r_r4_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 6;
+}
+uint32_t arm_r_r5_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 6;
+}
+uint32_t arm_r_r6_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 6;
+}
+uint32_t arm_r_r7_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 6;
+}
+uint32_t arm_r_r8_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 6;
+}
+uint32_t arm_r_r9_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 6;
+}
+uint32_t arm_r_r10_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 6;
+}
+uint32_t arm_r_r11_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 6;
+}
+uint32_t arm_r_r12_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 6;
+}
+uint32_t arm_r_r13_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 6;
+}
+uint32_t arm_r_r14_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 6;
+}
+uint32_t arm_r_r15_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 6;
+}
+uint32_t arm_r_r0_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r1_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r2_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r3_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r4_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r5_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r6_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r7_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r8_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r9_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r10_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r11_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r12_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r13_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r14_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r15_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 6; }
+}
+uint32_t arm_r_r0_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 7;
+}
+uint32_t arm_r_r1_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 7;
+}
+uint32_t arm_r_r2_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 7;
+}
+uint32_t arm_r_r3_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 7;
+}
+uint32_t arm_r_r4_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 7;
+}
+uint32_t arm_r_r5_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 7;
+}
+uint32_t arm_r_r6_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 7;
+}
+uint32_t arm_r_r7_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 7;
+}
+uint32_t arm_r_r8_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 7;
+}
+uint32_t arm_r_r9_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 7;
+}
+uint32_t arm_r_r10_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 7;
+}
+uint32_t arm_r_r11_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 7;
+}
+uint32_t arm_r_r12_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 7;
+}
+uint32_t arm_r_r13_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 7;
+}
+uint32_t arm_r_r14_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 7;
+}
+uint32_t arm_r_r15_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 7;
+}
+uint32_t arm_r_r0_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[3] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 7;
+}
+uint32_t arm_r_r1_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 7;
+}
+uint32_t arm_r_r2_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 7;
+}
+uint32_t arm_r_r3_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 7;
+}
+uint32_t arm_r_r4_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 7;
+}
+uint32_t arm_r_r5_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 7;
+}
+uint32_t arm_r_r6_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 7;
+}
+uint32_t arm_r_r7_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 7;
+}
+uint32_t arm_r_r8_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 7;
+}
+uint32_t arm_r_r9_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 7;
+}
+uint32_t arm_r_r10_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 7;
+}
+uint32_t arm_r_r11_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 7;
+}
+uint32_t arm_r_r12_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 7;
+}
+uint32_t arm_r_r13_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 7;
+}
+uint32_t arm_r_r14_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 7;
+}
+uint32_t arm_r_r15_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 7;
+}
+uint32_t arm_r_r0_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[3]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 7;
+}
+uint32_t arm_r_r1_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 7;
+}
+uint32_t arm_r_r2_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 7;
+}
+uint32_t arm_r_r3_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 7;
+}
+uint32_t arm_r_r4_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 7;
+}
+uint32_t arm_r_r5_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 7;
+}
+uint32_t arm_r_r6_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 7;
+}
+uint32_t arm_r_r7_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 7;
+}
+uint32_t arm_r_r8_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 7;
+}
+uint32_t arm_r_r9_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 7;
+}
+uint32_t arm_r_r10_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 7;
+}
+uint32_t arm_r_r11_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 7;
+}
+uint32_t arm_r_r12_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 7;
+}
+uint32_t arm_r_r13_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 7;
+}
+uint32_t arm_r_r14_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 7;
+}
+uint32_t arm_r_r15_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 7;
+}
+uint32_t arm_r_r0_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[3]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r1_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r2_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r3_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r4_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r5_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r6_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r7_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r8_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r9_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r10_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r11_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r12_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r13_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r14_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r15_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 7; }
+}
+uint32_t arm_r_r0_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[3]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 6;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 6;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r1_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r2_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r3_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r4_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r5_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r6_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r7_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r8_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r9_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r10_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r11_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r12_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r13_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r14_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r15_t6_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 6; }
+}
+uint32_t arm_rs_r0_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c6(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 7;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[3] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 7;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r1_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r2_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r3_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r4_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r5_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r6_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r7_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r8_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r9_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r10_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r11_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r12_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r13_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r14_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r15_t6_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 7; }
+}
+uint32_t arm_rs_r0_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c7(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[3]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r4.c gxemul-0.7.0/src/cpus/tmp_arm_r4.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r4.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r4.c	2022-10-18 16:37:22.088749100 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 8;
+}
+uint32_t arm_r_r1_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 8;
+}
+uint32_t arm_r_r2_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 8;
+}
+uint32_t arm_r_r3_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 8;
+}
+uint32_t arm_r_r4_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 8;
+}
+uint32_t arm_r_r5_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 8;
+}
+uint32_t arm_r_r6_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 8;
+}
+uint32_t arm_r_r7_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 8;
+}
+uint32_t arm_r_r8_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 8;
+}
+uint32_t arm_r_r9_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 8;
+}
+uint32_t arm_r_r10_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 8;
+}
+uint32_t arm_r_r11_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 8;
+}
+uint32_t arm_r_r12_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 8;
+}
+uint32_t arm_r_r13_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 8;
+}
+uint32_t arm_r_r14_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 8;
+}
+uint32_t arm_r_r15_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 8;
+}
+uint32_t arm_r_r0_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 8;
+}
+uint32_t arm_r_r1_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 8;
+}
+uint32_t arm_r_r2_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 8;
+}
+uint32_t arm_r_r3_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 8;
+}
+uint32_t arm_r_r4_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 8;
+}
+uint32_t arm_r_r5_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 8;
+}
+uint32_t arm_r_r6_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 8;
+}
+uint32_t arm_r_r7_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 8;
+}
+uint32_t arm_r_r8_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 8;
+}
+uint32_t arm_r_r9_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 8;
+}
+uint32_t arm_r_r10_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 8;
+}
+uint32_t arm_r_r11_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 8;
+}
+uint32_t arm_r_r12_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 8;
+}
+uint32_t arm_r_r13_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 8;
+}
+uint32_t arm_r_r14_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 8;
+}
+uint32_t arm_r_r15_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 8;
+}
+uint32_t arm_r_r0_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 8;
+}
+uint32_t arm_r_r1_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 8;
+}
+uint32_t arm_r_r2_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 8;
+}
+uint32_t arm_r_r3_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 8;
+}
+uint32_t arm_r_r4_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 8;
+}
+uint32_t arm_r_r5_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 8;
+}
+uint32_t arm_r_r6_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 8;
+}
+uint32_t arm_r_r7_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 8;
+}
+uint32_t arm_r_r8_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 8;
+}
+uint32_t arm_r_r9_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 8;
+}
+uint32_t arm_r_r10_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 8;
+}
+uint32_t arm_r_r11_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 8;
+}
+uint32_t arm_r_r12_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 8;
+}
+uint32_t arm_r_r13_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 8;
+}
+uint32_t arm_r_r14_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 8;
+}
+uint32_t arm_r_r15_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 8;
+}
+uint32_t arm_r_r0_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r1_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r2_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r3_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r4_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r5_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r6_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r7_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r8_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r9_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r10_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r11_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r12_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r13_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r14_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r15_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 8; }
+}
+uint32_t arm_r_r0_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 9;
+}
+uint32_t arm_r_r1_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 9;
+}
+uint32_t arm_r_r2_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 9;
+}
+uint32_t arm_r_r3_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 9;
+}
+uint32_t arm_r_r4_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 9;
+}
+uint32_t arm_r_r5_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 9;
+}
+uint32_t arm_r_r6_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 9;
+}
+uint32_t arm_r_r7_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 9;
+}
+uint32_t arm_r_r8_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 9;
+}
+uint32_t arm_r_r9_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 9;
+}
+uint32_t arm_r_r10_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 9;
+}
+uint32_t arm_r_r11_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 9;
+}
+uint32_t arm_r_r12_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 9;
+}
+uint32_t arm_r_r13_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 9;
+}
+uint32_t arm_r_r14_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 9;
+}
+uint32_t arm_r_r15_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 9;
+}
+uint32_t arm_r_r0_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[4] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 9;
+}
+uint32_t arm_r_r1_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 9;
+}
+uint32_t arm_r_r2_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 9;
+}
+uint32_t arm_r_r3_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 9;
+}
+uint32_t arm_r_r4_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 9;
+}
+uint32_t arm_r_r5_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 9;
+}
+uint32_t arm_r_r6_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 9;
+}
+uint32_t arm_r_r7_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 9;
+}
+uint32_t arm_r_r8_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 9;
+}
+uint32_t arm_r_r9_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 9;
+}
+uint32_t arm_r_r10_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 9;
+}
+uint32_t arm_r_r11_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 9;
+}
+uint32_t arm_r_r12_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 9;
+}
+uint32_t arm_r_r13_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 9;
+}
+uint32_t arm_r_r14_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 9;
+}
+uint32_t arm_r_r15_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 9;
+}
+uint32_t arm_r_r0_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[4]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 9;
+}
+uint32_t arm_r_r1_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 9;
+}
+uint32_t arm_r_r2_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 9;
+}
+uint32_t arm_r_r3_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 9;
+}
+uint32_t arm_r_r4_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 9;
+}
+uint32_t arm_r_r5_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 9;
+}
+uint32_t arm_r_r6_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 9;
+}
+uint32_t arm_r_r7_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 9;
+}
+uint32_t arm_r_r8_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 9;
+}
+uint32_t arm_r_r9_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 9;
+}
+uint32_t arm_r_r10_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 9;
+}
+uint32_t arm_r_r11_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 9;
+}
+uint32_t arm_r_r12_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 9;
+}
+uint32_t arm_r_r13_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 9;
+}
+uint32_t arm_r_r14_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 9;
+}
+uint32_t arm_r_r15_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 9;
+}
+uint32_t arm_r_r0_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[4]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r1_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r2_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r3_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r4_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r5_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r6_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r7_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r8_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r9_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r10_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r11_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r12_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r13_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r14_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r15_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 9; }
+}
+uint32_t arm_r_r0_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[4]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 8;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 8;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r1_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r2_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r3_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r4_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r5_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r6_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r7_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r8_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r9_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r10_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r11_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r12_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r13_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r14_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r15_t6_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 8; }
+}
+uint32_t arm_rs_r0_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c8(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 9;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[4] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 9;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r1_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r2_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r3_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r4_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r5_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r6_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r7_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r8_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r9_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r10_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r11_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r12_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r13_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r14_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r15_t6_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 9; }
+}
+uint32_t arm_rs_r0_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c9(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[4]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r5.c gxemul-0.7.0/src/cpus/tmp_arm_r5.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r5.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r5.c	2022-10-18 16:37:22.089750000 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 10;
+}
+uint32_t arm_r_r1_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 10;
+}
+uint32_t arm_r_r2_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 10;
+}
+uint32_t arm_r_r3_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 10;
+}
+uint32_t arm_r_r4_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 10;
+}
+uint32_t arm_r_r5_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 10;
+}
+uint32_t arm_r_r6_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 10;
+}
+uint32_t arm_r_r7_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 10;
+}
+uint32_t arm_r_r8_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 10;
+}
+uint32_t arm_r_r9_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 10;
+}
+uint32_t arm_r_r10_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 10;
+}
+uint32_t arm_r_r11_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 10;
+}
+uint32_t arm_r_r12_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 10;
+}
+uint32_t arm_r_r13_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 10;
+}
+uint32_t arm_r_r14_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 10;
+}
+uint32_t arm_r_r15_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 10;
+}
+uint32_t arm_r_r0_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 10;
+}
+uint32_t arm_r_r1_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 10;
+}
+uint32_t arm_r_r2_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 10;
+}
+uint32_t arm_r_r3_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 10;
+}
+uint32_t arm_r_r4_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 10;
+}
+uint32_t arm_r_r5_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 10;
+}
+uint32_t arm_r_r6_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 10;
+}
+uint32_t arm_r_r7_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 10;
+}
+uint32_t arm_r_r8_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 10;
+}
+uint32_t arm_r_r9_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 10;
+}
+uint32_t arm_r_r10_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 10;
+}
+uint32_t arm_r_r11_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 10;
+}
+uint32_t arm_r_r12_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 10;
+}
+uint32_t arm_r_r13_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 10;
+}
+uint32_t arm_r_r14_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 10;
+}
+uint32_t arm_r_r15_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 10;
+}
+uint32_t arm_r_r0_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 10;
+}
+uint32_t arm_r_r1_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 10;
+}
+uint32_t arm_r_r2_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 10;
+}
+uint32_t arm_r_r3_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 10;
+}
+uint32_t arm_r_r4_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 10;
+}
+uint32_t arm_r_r5_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 10;
+}
+uint32_t arm_r_r6_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 10;
+}
+uint32_t arm_r_r7_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 10;
+}
+uint32_t arm_r_r8_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 10;
+}
+uint32_t arm_r_r9_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 10;
+}
+uint32_t arm_r_r10_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 10;
+}
+uint32_t arm_r_r11_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 10;
+}
+uint32_t arm_r_r12_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 10;
+}
+uint32_t arm_r_r13_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 10;
+}
+uint32_t arm_r_r14_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 10;
+}
+uint32_t arm_r_r15_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 10;
+}
+uint32_t arm_r_r0_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r1_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r2_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r3_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r4_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r5_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r6_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r7_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r8_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r9_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r10_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r11_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r12_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r13_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r14_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r15_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 10; }
+}
+uint32_t arm_r_r0_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 11;
+}
+uint32_t arm_r_r1_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 11;
+}
+uint32_t arm_r_r2_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 11;
+}
+uint32_t arm_r_r3_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 11;
+}
+uint32_t arm_r_r4_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 11;
+}
+uint32_t arm_r_r5_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 11;
+}
+uint32_t arm_r_r6_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 11;
+}
+uint32_t arm_r_r7_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 11;
+}
+uint32_t arm_r_r8_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 11;
+}
+uint32_t arm_r_r9_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 11;
+}
+uint32_t arm_r_r10_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 11;
+}
+uint32_t arm_r_r11_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 11;
+}
+uint32_t arm_r_r12_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 11;
+}
+uint32_t arm_r_r13_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 11;
+}
+uint32_t arm_r_r14_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 11;
+}
+uint32_t arm_r_r15_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 11;
+}
+uint32_t arm_r_r0_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[5] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 11;
+}
+uint32_t arm_r_r1_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 11;
+}
+uint32_t arm_r_r2_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 11;
+}
+uint32_t arm_r_r3_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 11;
+}
+uint32_t arm_r_r4_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 11;
+}
+uint32_t arm_r_r5_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 11;
+}
+uint32_t arm_r_r6_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 11;
+}
+uint32_t arm_r_r7_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 11;
+}
+uint32_t arm_r_r8_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 11;
+}
+uint32_t arm_r_r9_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 11;
+}
+uint32_t arm_r_r10_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 11;
+}
+uint32_t arm_r_r11_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 11;
+}
+uint32_t arm_r_r12_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 11;
+}
+uint32_t arm_r_r13_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 11;
+}
+uint32_t arm_r_r14_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 11;
+}
+uint32_t arm_r_r15_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 11;
+}
+uint32_t arm_r_r0_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[5]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 11;
+}
+uint32_t arm_r_r1_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 11;
+}
+uint32_t arm_r_r2_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 11;
+}
+uint32_t arm_r_r3_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 11;
+}
+uint32_t arm_r_r4_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 11;
+}
+uint32_t arm_r_r5_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 11;
+}
+uint32_t arm_r_r6_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 11;
+}
+uint32_t arm_r_r7_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 11;
+}
+uint32_t arm_r_r8_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 11;
+}
+uint32_t arm_r_r9_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 11;
+}
+uint32_t arm_r_r10_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 11;
+}
+uint32_t arm_r_r11_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 11;
+}
+uint32_t arm_r_r12_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 11;
+}
+uint32_t arm_r_r13_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 11;
+}
+uint32_t arm_r_r14_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 11;
+}
+uint32_t arm_r_r15_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 11;
+}
+uint32_t arm_r_r0_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[5]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r1_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r2_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r3_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r4_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r5_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r6_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r7_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r8_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r9_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r10_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r11_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r12_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r13_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r14_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r15_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 11; }
+}
+uint32_t arm_r_r0_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[5]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 10;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 10;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r1_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r2_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r3_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r4_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r5_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r6_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r7_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r8_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r9_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r10_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r11_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r12_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r13_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r14_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r15_t6_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 10; }
+}
+uint32_t arm_rs_r0_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c10(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 11;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[5] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 11;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r1_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r2_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r3_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r4_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r5_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r6_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r7_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r8_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r9_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r10_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r11_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r12_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r13_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r14_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r15_t6_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 11; }
+}
+uint32_t arm_rs_r0_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c11(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[5]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r6.c gxemul-0.7.0/src/cpus/tmp_arm_r6.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r6.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r6.c	2022-10-18 16:37:22.090751100 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 12;
+}
+uint32_t arm_r_r1_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 12;
+}
+uint32_t arm_r_r2_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 12;
+}
+uint32_t arm_r_r3_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 12;
+}
+uint32_t arm_r_r4_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 12;
+}
+uint32_t arm_r_r5_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 12;
+}
+uint32_t arm_r_r6_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 12;
+}
+uint32_t arm_r_r7_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 12;
+}
+uint32_t arm_r_r8_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 12;
+}
+uint32_t arm_r_r9_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 12;
+}
+uint32_t arm_r_r10_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 12;
+}
+uint32_t arm_r_r11_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 12;
+}
+uint32_t arm_r_r12_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 12;
+}
+uint32_t arm_r_r13_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 12;
+}
+uint32_t arm_r_r14_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 12;
+}
+uint32_t arm_r_r15_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 12;
+}
+uint32_t arm_r_r0_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 12;
+}
+uint32_t arm_r_r1_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 12;
+}
+uint32_t arm_r_r2_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 12;
+}
+uint32_t arm_r_r3_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 12;
+}
+uint32_t arm_r_r4_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 12;
+}
+uint32_t arm_r_r5_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 12;
+}
+uint32_t arm_r_r6_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 12;
+}
+uint32_t arm_r_r7_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 12;
+}
+uint32_t arm_r_r8_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 12;
+}
+uint32_t arm_r_r9_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 12;
+}
+uint32_t arm_r_r10_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 12;
+}
+uint32_t arm_r_r11_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 12;
+}
+uint32_t arm_r_r12_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 12;
+}
+uint32_t arm_r_r13_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 12;
+}
+uint32_t arm_r_r14_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 12;
+}
+uint32_t arm_r_r15_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 12;
+}
+uint32_t arm_r_r0_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 12;
+}
+uint32_t arm_r_r1_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 12;
+}
+uint32_t arm_r_r2_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 12;
+}
+uint32_t arm_r_r3_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 12;
+}
+uint32_t arm_r_r4_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 12;
+}
+uint32_t arm_r_r5_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 12;
+}
+uint32_t arm_r_r6_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 12;
+}
+uint32_t arm_r_r7_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 12;
+}
+uint32_t arm_r_r8_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 12;
+}
+uint32_t arm_r_r9_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 12;
+}
+uint32_t arm_r_r10_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 12;
+}
+uint32_t arm_r_r11_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 12;
+}
+uint32_t arm_r_r12_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 12;
+}
+uint32_t arm_r_r13_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 12;
+}
+uint32_t arm_r_r14_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 12;
+}
+uint32_t arm_r_r15_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 12;
+}
+uint32_t arm_r_r0_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r1_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r2_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r3_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r4_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r5_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r6_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r7_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r8_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r9_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r10_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r11_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r12_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r13_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r14_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r15_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 12; }
+}
+uint32_t arm_r_r0_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 13;
+}
+uint32_t arm_r_r1_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 13;
+}
+uint32_t arm_r_r2_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 13;
+}
+uint32_t arm_r_r3_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 13;
+}
+uint32_t arm_r_r4_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 13;
+}
+uint32_t arm_r_r5_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 13;
+}
+uint32_t arm_r_r6_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 13;
+}
+uint32_t arm_r_r7_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 13;
+}
+uint32_t arm_r_r8_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 13;
+}
+uint32_t arm_r_r9_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 13;
+}
+uint32_t arm_r_r10_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 13;
+}
+uint32_t arm_r_r11_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 13;
+}
+uint32_t arm_r_r12_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 13;
+}
+uint32_t arm_r_r13_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 13;
+}
+uint32_t arm_r_r14_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 13;
+}
+uint32_t arm_r_r15_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 13;
+}
+uint32_t arm_r_r0_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[6] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 13;
+}
+uint32_t arm_r_r1_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 13;
+}
+uint32_t arm_r_r2_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 13;
+}
+uint32_t arm_r_r3_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 13;
+}
+uint32_t arm_r_r4_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 13;
+}
+uint32_t arm_r_r5_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 13;
+}
+uint32_t arm_r_r6_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 13;
+}
+uint32_t arm_r_r7_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 13;
+}
+uint32_t arm_r_r8_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 13;
+}
+uint32_t arm_r_r9_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 13;
+}
+uint32_t arm_r_r10_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 13;
+}
+uint32_t arm_r_r11_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 13;
+}
+uint32_t arm_r_r12_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 13;
+}
+uint32_t arm_r_r13_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 13;
+}
+uint32_t arm_r_r14_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 13;
+}
+uint32_t arm_r_r15_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 13;
+}
+uint32_t arm_r_r0_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[6]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 13;
+}
+uint32_t arm_r_r1_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 13;
+}
+uint32_t arm_r_r2_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 13;
+}
+uint32_t arm_r_r3_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 13;
+}
+uint32_t arm_r_r4_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 13;
+}
+uint32_t arm_r_r5_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 13;
+}
+uint32_t arm_r_r6_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 13;
+}
+uint32_t arm_r_r7_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 13;
+}
+uint32_t arm_r_r8_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 13;
+}
+uint32_t arm_r_r9_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 13;
+}
+uint32_t arm_r_r10_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 13;
+}
+uint32_t arm_r_r11_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 13;
+}
+uint32_t arm_r_r12_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 13;
+}
+uint32_t arm_r_r13_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 13;
+}
+uint32_t arm_r_r14_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 13;
+}
+uint32_t arm_r_r15_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 13;
+}
+uint32_t arm_r_r0_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[6]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r1_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r2_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r3_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r4_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r5_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r6_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r7_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r8_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r9_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r10_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r11_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r12_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r13_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r14_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r15_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 13; }
+}
+uint32_t arm_r_r0_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[6]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 12;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 12;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r1_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r2_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r3_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r4_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r5_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r6_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r7_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r8_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r9_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r10_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r11_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r12_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r13_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r14_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r15_t6_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 12; }
+}
+uint32_t arm_rs_r0_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c12(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 13;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[6] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 13;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r1_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r2_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r3_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r4_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r5_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r6_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r7_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r8_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r9_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r10_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r11_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r12_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r13_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r14_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r15_t6_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 13; }
+}
+uint32_t arm_rs_r0_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c13(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[6]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r7.c gxemul-0.7.0/src/cpus/tmp_arm_r7.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r7.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r7.c	2022-10-18 16:37:22.091752400 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 14;
+}
+uint32_t arm_r_r1_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 14;
+}
+uint32_t arm_r_r2_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 14;
+}
+uint32_t arm_r_r3_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 14;
+}
+uint32_t arm_r_r4_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 14;
+}
+uint32_t arm_r_r5_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 14;
+}
+uint32_t arm_r_r6_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 14;
+}
+uint32_t arm_r_r7_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 14;
+}
+uint32_t arm_r_r8_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 14;
+}
+uint32_t arm_r_r9_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 14;
+}
+uint32_t arm_r_r10_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 14;
+}
+uint32_t arm_r_r11_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 14;
+}
+uint32_t arm_r_r12_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 14;
+}
+uint32_t arm_r_r13_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 14;
+}
+uint32_t arm_r_r14_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 14;
+}
+uint32_t arm_r_r15_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 14;
+}
+uint32_t arm_r_r0_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 14;
+}
+uint32_t arm_r_r1_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 14;
+}
+uint32_t arm_r_r2_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 14;
+}
+uint32_t arm_r_r3_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 14;
+}
+uint32_t arm_r_r4_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 14;
+}
+uint32_t arm_r_r5_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 14;
+}
+uint32_t arm_r_r6_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 14;
+}
+uint32_t arm_r_r7_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 14;
+}
+uint32_t arm_r_r8_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 14;
+}
+uint32_t arm_r_r9_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 14;
+}
+uint32_t arm_r_r10_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 14;
+}
+uint32_t arm_r_r11_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 14;
+}
+uint32_t arm_r_r12_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 14;
+}
+uint32_t arm_r_r13_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 14;
+}
+uint32_t arm_r_r14_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 14;
+}
+uint32_t arm_r_r15_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 14;
+}
+uint32_t arm_r_r0_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 14;
+}
+uint32_t arm_r_r1_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 14;
+}
+uint32_t arm_r_r2_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 14;
+}
+uint32_t arm_r_r3_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 14;
+}
+uint32_t arm_r_r4_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 14;
+}
+uint32_t arm_r_r5_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 14;
+}
+uint32_t arm_r_r6_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 14;
+}
+uint32_t arm_r_r7_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 14;
+}
+uint32_t arm_r_r8_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 14;
+}
+uint32_t arm_r_r9_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 14;
+}
+uint32_t arm_r_r10_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 14;
+}
+uint32_t arm_r_r11_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 14;
+}
+uint32_t arm_r_r12_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 14;
+}
+uint32_t arm_r_r13_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 14;
+}
+uint32_t arm_r_r14_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 14;
+}
+uint32_t arm_r_r15_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 14;
+}
+uint32_t arm_r_r0_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r1_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r2_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r3_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r4_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r5_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r6_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r7_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r8_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r9_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r10_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r11_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r12_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r13_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r14_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r15_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 14; }
+}
+uint32_t arm_r_r0_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 15;
+}
+uint32_t arm_r_r1_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 15;
+}
+uint32_t arm_r_r2_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 15;
+}
+uint32_t arm_r_r3_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 15;
+}
+uint32_t arm_r_r4_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 15;
+}
+uint32_t arm_r_r5_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 15;
+}
+uint32_t arm_r_r6_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 15;
+}
+uint32_t arm_r_r7_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 15;
+}
+uint32_t arm_r_r8_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 15;
+}
+uint32_t arm_r_r9_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 15;
+}
+uint32_t arm_r_r10_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 15;
+}
+uint32_t arm_r_r11_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 15;
+}
+uint32_t arm_r_r12_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 15;
+}
+uint32_t arm_r_r13_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 15;
+}
+uint32_t arm_r_r14_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 15;
+}
+uint32_t arm_r_r15_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 15;
+}
+uint32_t arm_r_r0_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[7] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 15;
+}
+uint32_t arm_r_r1_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 15;
+}
+uint32_t arm_r_r2_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 15;
+}
+uint32_t arm_r_r3_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 15;
+}
+uint32_t arm_r_r4_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 15;
+}
+uint32_t arm_r_r5_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 15;
+}
+uint32_t arm_r_r6_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 15;
+}
+uint32_t arm_r_r7_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 15;
+}
+uint32_t arm_r_r8_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 15;
+}
+uint32_t arm_r_r9_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 15;
+}
+uint32_t arm_r_r10_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 15;
+}
+uint32_t arm_r_r11_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 15;
+}
+uint32_t arm_r_r12_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 15;
+}
+uint32_t arm_r_r13_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 15;
+}
+uint32_t arm_r_r14_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 15;
+}
+uint32_t arm_r_r15_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 15;
+}
+uint32_t arm_r_r0_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[7]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 15;
+}
+uint32_t arm_r_r1_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 15;
+}
+uint32_t arm_r_r2_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 15;
+}
+uint32_t arm_r_r3_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 15;
+}
+uint32_t arm_r_r4_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 15;
+}
+uint32_t arm_r_r5_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 15;
+}
+uint32_t arm_r_r6_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 15;
+}
+uint32_t arm_r_r7_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 15;
+}
+uint32_t arm_r_r8_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 15;
+}
+uint32_t arm_r_r9_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 15;
+}
+uint32_t arm_r_r10_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 15;
+}
+uint32_t arm_r_r11_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 15;
+}
+uint32_t arm_r_r12_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 15;
+}
+uint32_t arm_r_r13_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 15;
+}
+uint32_t arm_r_r14_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 15;
+}
+uint32_t arm_r_r15_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 15;
+}
+uint32_t arm_r_r0_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[7]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r1_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r2_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r3_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r4_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r5_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r6_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r7_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r8_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r9_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r10_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r11_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r12_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r13_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r14_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r15_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 15; }
+}
+uint32_t arm_r_r0_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[7]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 14;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 14;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r1_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r2_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r3_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r4_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r5_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r6_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r7_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r8_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r9_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r10_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r11_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r12_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r13_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r14_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r15_t6_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 14; }
+}
+uint32_t arm_rs_r0_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c14(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 15;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[7] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 15;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r1_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r2_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r3_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r4_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r5_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r6_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r7_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r8_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r9_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r10_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r11_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r12_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r13_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r14_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r15_t6_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 15; }
+}
+uint32_t arm_rs_r0_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c15(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[7]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r8.c gxemul-0.7.0/src/cpus/tmp_arm_r8.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r8.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r8.c	2022-10-18 16:37:22.091752400 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 16;
+}
+uint32_t arm_r_r1_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 16;
+}
+uint32_t arm_r_r2_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 16;
+}
+uint32_t arm_r_r3_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 16;
+}
+uint32_t arm_r_r4_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 16;
+}
+uint32_t arm_r_r5_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 16;
+}
+uint32_t arm_r_r6_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 16;
+}
+uint32_t arm_r_r7_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 16;
+}
+uint32_t arm_r_r8_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 16;
+}
+uint32_t arm_r_r9_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 16;
+}
+uint32_t arm_r_r10_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 16;
+}
+uint32_t arm_r_r11_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 16;
+}
+uint32_t arm_r_r12_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 16;
+}
+uint32_t arm_r_r13_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 16;
+}
+uint32_t arm_r_r14_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 16;
+}
+uint32_t arm_r_r15_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 16;
+}
+uint32_t arm_r_r0_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 16;
+}
+uint32_t arm_r_r1_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 16;
+}
+uint32_t arm_r_r2_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 16;
+}
+uint32_t arm_r_r3_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 16;
+}
+uint32_t arm_r_r4_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 16;
+}
+uint32_t arm_r_r5_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 16;
+}
+uint32_t arm_r_r6_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 16;
+}
+uint32_t arm_r_r7_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 16;
+}
+uint32_t arm_r_r8_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 16;
+}
+uint32_t arm_r_r9_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 16;
+}
+uint32_t arm_r_r10_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 16;
+}
+uint32_t arm_r_r11_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 16;
+}
+uint32_t arm_r_r12_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 16;
+}
+uint32_t arm_r_r13_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 16;
+}
+uint32_t arm_r_r14_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 16;
+}
+uint32_t arm_r_r15_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 16;
+}
+uint32_t arm_r_r0_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 16;
+}
+uint32_t arm_r_r1_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 16;
+}
+uint32_t arm_r_r2_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 16;
+}
+uint32_t arm_r_r3_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 16;
+}
+uint32_t arm_r_r4_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 16;
+}
+uint32_t arm_r_r5_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 16;
+}
+uint32_t arm_r_r6_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 16;
+}
+uint32_t arm_r_r7_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 16;
+}
+uint32_t arm_r_r8_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 16;
+}
+uint32_t arm_r_r9_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 16;
+}
+uint32_t arm_r_r10_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 16;
+}
+uint32_t arm_r_r11_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 16;
+}
+uint32_t arm_r_r12_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 16;
+}
+uint32_t arm_r_r13_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 16;
+}
+uint32_t arm_r_r14_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 16;
+}
+uint32_t arm_r_r15_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 16;
+}
+uint32_t arm_r_r0_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r1_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r2_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r3_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r4_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r5_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r6_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r7_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r8_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r9_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r10_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r11_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r12_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r13_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r14_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r15_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 16; }
+}
+uint32_t arm_r_r0_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 17;
+}
+uint32_t arm_r_r1_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 17;
+}
+uint32_t arm_r_r2_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 17;
+}
+uint32_t arm_r_r3_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 17;
+}
+uint32_t arm_r_r4_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 17;
+}
+uint32_t arm_r_r5_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 17;
+}
+uint32_t arm_r_r6_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 17;
+}
+uint32_t arm_r_r7_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 17;
+}
+uint32_t arm_r_r8_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 17;
+}
+uint32_t arm_r_r9_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 17;
+}
+uint32_t arm_r_r10_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 17;
+}
+uint32_t arm_r_r11_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 17;
+}
+uint32_t arm_r_r12_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 17;
+}
+uint32_t arm_r_r13_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 17;
+}
+uint32_t arm_r_r14_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 17;
+}
+uint32_t arm_r_r15_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 17;
+}
+uint32_t arm_r_r0_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[8] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 17;
+}
+uint32_t arm_r_r1_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 17;
+}
+uint32_t arm_r_r2_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 17;
+}
+uint32_t arm_r_r3_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 17;
+}
+uint32_t arm_r_r4_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 17;
+}
+uint32_t arm_r_r5_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 17;
+}
+uint32_t arm_r_r6_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 17;
+}
+uint32_t arm_r_r7_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 17;
+}
+uint32_t arm_r_r8_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 17;
+}
+uint32_t arm_r_r9_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 17;
+}
+uint32_t arm_r_r10_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 17;
+}
+uint32_t arm_r_r11_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 17;
+}
+uint32_t arm_r_r12_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 17;
+}
+uint32_t arm_r_r13_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 17;
+}
+uint32_t arm_r_r14_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 17;
+}
+uint32_t arm_r_r15_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 17;
+}
+uint32_t arm_r_r0_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[8]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 17;
+}
+uint32_t arm_r_r1_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 17;
+}
+uint32_t arm_r_r2_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 17;
+}
+uint32_t arm_r_r3_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 17;
+}
+uint32_t arm_r_r4_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 17;
+}
+uint32_t arm_r_r5_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 17;
+}
+uint32_t arm_r_r6_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 17;
+}
+uint32_t arm_r_r7_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 17;
+}
+uint32_t arm_r_r8_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 17;
+}
+uint32_t arm_r_r9_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 17;
+}
+uint32_t arm_r_r10_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 17;
+}
+uint32_t arm_r_r11_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 17;
+}
+uint32_t arm_r_r12_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 17;
+}
+uint32_t arm_r_r13_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 17;
+}
+uint32_t arm_r_r14_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 17;
+}
+uint32_t arm_r_r15_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 17;
+}
+uint32_t arm_r_r0_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[8]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r1_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r2_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r3_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r4_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r5_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r6_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r7_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r8_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r9_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r10_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r11_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r12_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r13_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r14_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r15_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 17; }
+}
+uint32_t arm_r_r0_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[8]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 16;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 16;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r1_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r2_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r3_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r4_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r5_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r6_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r7_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r8_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r9_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r10_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r11_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r12_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r13_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r14_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r15_t6_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 16; }
+}
+uint32_t arm_rs_r0_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c16(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 17;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[8] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 17;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r1_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r2_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r3_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r4_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r5_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r6_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r7_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r8_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r9_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r10_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r11_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r12_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r13_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r14_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r15_t6_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 17; }
+}
+uint32_t arm_rs_r0_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c17(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[8]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_r9.c gxemul-0.7.0/src/cpus/tmp_arm_r9.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_r9.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_r9.c	2022-10-18 16:37:22.092752900 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 18;
+}
+uint32_t arm_r_r1_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 18;
+}
+uint32_t arm_r_r2_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 18;
+}
+uint32_t arm_r_r3_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 18;
+}
+uint32_t arm_r_r4_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 18;
+}
+uint32_t arm_r_r5_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 18;
+}
+uint32_t arm_r_r6_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 18;
+}
+uint32_t arm_r_r7_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 18;
+}
+uint32_t arm_r_r8_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 18;
+}
+uint32_t arm_r_r9_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 18;
+}
+uint32_t arm_r_r10_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 18;
+}
+uint32_t arm_r_r11_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 18;
+}
+uint32_t arm_r_r12_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 18;
+}
+uint32_t arm_r_r13_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 18;
+}
+uint32_t arm_r_r14_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 18;
+}
+uint32_t arm_r_r15_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 18;
+}
+uint32_t arm_r_r0_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 18;
+}
+uint32_t arm_r_r1_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 18;
+}
+uint32_t arm_r_r2_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 18;
+}
+uint32_t arm_r_r3_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 18;
+}
+uint32_t arm_r_r4_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 18;
+}
+uint32_t arm_r_r5_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 18;
+}
+uint32_t arm_r_r6_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 18;
+}
+uint32_t arm_r_r7_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 18;
+}
+uint32_t arm_r_r8_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 18;
+}
+uint32_t arm_r_r9_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 18;
+}
+uint32_t arm_r_r10_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 18;
+}
+uint32_t arm_r_r11_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 18;
+}
+uint32_t arm_r_r12_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 18;
+}
+uint32_t arm_r_r13_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 18;
+}
+uint32_t arm_r_r14_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 18;
+}
+uint32_t arm_r_r15_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 18;
+}
+uint32_t arm_r_r0_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 18;
+}
+uint32_t arm_r_r1_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 18;
+}
+uint32_t arm_r_r2_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 18;
+}
+uint32_t arm_r_r3_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 18;
+}
+uint32_t arm_r_r4_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 18;
+}
+uint32_t arm_r_r5_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 18;
+}
+uint32_t arm_r_r6_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 18;
+}
+uint32_t arm_r_r7_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 18;
+}
+uint32_t arm_r_r8_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 18;
+}
+uint32_t arm_r_r9_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 18;
+}
+uint32_t arm_r_r10_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 18;
+}
+uint32_t arm_r_r11_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 18;
+}
+uint32_t arm_r_r12_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 18;
+}
+uint32_t arm_r_r13_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 18;
+}
+uint32_t arm_r_r14_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 18;
+}
+uint32_t arm_r_r15_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 18;
+}
+uint32_t arm_r_r0_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r1_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r2_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r3_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r4_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r5_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r6_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r7_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r8_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r9_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r10_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r11_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r12_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r13_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r14_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r15_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 18; }
+}
+uint32_t arm_r_r0_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 19;
+}
+uint32_t arm_r_r1_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 19;
+}
+uint32_t arm_r_r2_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 19;
+}
+uint32_t arm_r_r3_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 19;
+}
+uint32_t arm_r_r4_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 19;
+}
+uint32_t arm_r_r5_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 19;
+}
+uint32_t arm_r_r6_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 19;
+}
+uint32_t arm_r_r7_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 19;
+}
+uint32_t arm_r_r8_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 19;
+}
+uint32_t arm_r_r9_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 19;
+}
+uint32_t arm_r_r10_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 19;
+}
+uint32_t arm_r_r11_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 19;
+}
+uint32_t arm_r_r12_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 19;
+}
+uint32_t arm_r_r13_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 19;
+}
+uint32_t arm_r_r14_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 19;
+}
+uint32_t arm_r_r15_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 19;
+}
+uint32_t arm_r_r0_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[9] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 19;
+}
+uint32_t arm_r_r1_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 19;
+}
+uint32_t arm_r_r2_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 19;
+}
+uint32_t arm_r_r3_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 19;
+}
+uint32_t arm_r_r4_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 19;
+}
+uint32_t arm_r_r5_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 19;
+}
+uint32_t arm_r_r6_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 19;
+}
+uint32_t arm_r_r7_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 19;
+}
+uint32_t arm_r_r8_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 19;
+}
+uint32_t arm_r_r9_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 19;
+}
+uint32_t arm_r_r10_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 19;
+}
+uint32_t arm_r_r11_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 19;
+}
+uint32_t arm_r_r12_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 19;
+}
+uint32_t arm_r_r13_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 19;
+}
+uint32_t arm_r_r14_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 19;
+}
+uint32_t arm_r_r15_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 19;
+}
+uint32_t arm_r_r0_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[9]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 19;
+}
+uint32_t arm_r_r1_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 19;
+}
+uint32_t arm_r_r2_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 19;
+}
+uint32_t arm_r_r3_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 19;
+}
+uint32_t arm_r_r4_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 19;
+}
+uint32_t arm_r_r5_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 19;
+}
+uint32_t arm_r_r6_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 19;
+}
+uint32_t arm_r_r7_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 19;
+}
+uint32_t arm_r_r8_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 19;
+}
+uint32_t arm_r_r9_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 19;
+}
+uint32_t arm_r_r10_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 19;
+}
+uint32_t arm_r_r11_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 19;
+}
+uint32_t arm_r_r12_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 19;
+}
+uint32_t arm_r_r13_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 19;
+}
+uint32_t arm_r_r14_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 19;
+}
+uint32_t arm_r_r15_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 19;
+}
+uint32_t arm_r_r0_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[9]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r1_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r2_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r3_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r4_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r5_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r6_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r7_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r8_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r9_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r10_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r11_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r12_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r13_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r14_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r15_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 19; }
+}
+uint32_t arm_r_r0_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[9]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 18;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 18;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r1_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r2_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r3_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r4_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r5_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r6_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r7_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r8_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r9_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r10_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r11_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r12_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r13_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r14_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r15_t6_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 18; }
+}
+uint32_t arm_rs_r0_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c18(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 19;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[9] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 19;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r1_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r2_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r3_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r4_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r5_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r6_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r7_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r8_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r9_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r10_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r11_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r12_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r13_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r14_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r15_t6_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 19; }
+}
+uint32_t arm_rs_r0_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c19(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[9]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_ra.c gxemul-0.7.0/src/cpus/tmp_arm_ra.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_ra.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_ra.c	2022-10-18 16:37:22.093753900 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 20;
+}
+uint32_t arm_r_r1_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 20;
+}
+uint32_t arm_r_r2_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 20;
+}
+uint32_t arm_r_r3_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 20;
+}
+uint32_t arm_r_r4_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 20;
+}
+uint32_t arm_r_r5_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 20;
+}
+uint32_t arm_r_r6_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 20;
+}
+uint32_t arm_r_r7_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 20;
+}
+uint32_t arm_r_r8_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 20;
+}
+uint32_t arm_r_r9_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 20;
+}
+uint32_t arm_r_r10_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 20;
+}
+uint32_t arm_r_r11_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 20;
+}
+uint32_t arm_r_r12_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 20;
+}
+uint32_t arm_r_r13_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 20;
+}
+uint32_t arm_r_r14_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 20;
+}
+uint32_t arm_r_r15_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 20;
+}
+uint32_t arm_r_r0_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 20;
+}
+uint32_t arm_r_r1_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 20;
+}
+uint32_t arm_r_r2_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 20;
+}
+uint32_t arm_r_r3_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 20;
+}
+uint32_t arm_r_r4_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 20;
+}
+uint32_t arm_r_r5_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 20;
+}
+uint32_t arm_r_r6_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 20;
+}
+uint32_t arm_r_r7_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 20;
+}
+uint32_t arm_r_r8_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 20;
+}
+uint32_t arm_r_r9_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 20;
+}
+uint32_t arm_r_r10_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 20;
+}
+uint32_t arm_r_r11_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 20;
+}
+uint32_t arm_r_r12_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 20;
+}
+uint32_t arm_r_r13_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 20;
+}
+uint32_t arm_r_r14_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 20;
+}
+uint32_t arm_r_r15_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 20;
+}
+uint32_t arm_r_r0_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 20;
+}
+uint32_t arm_r_r1_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 20;
+}
+uint32_t arm_r_r2_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 20;
+}
+uint32_t arm_r_r3_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 20;
+}
+uint32_t arm_r_r4_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 20;
+}
+uint32_t arm_r_r5_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 20;
+}
+uint32_t arm_r_r6_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 20;
+}
+uint32_t arm_r_r7_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 20;
+}
+uint32_t arm_r_r8_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 20;
+}
+uint32_t arm_r_r9_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 20;
+}
+uint32_t arm_r_r10_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 20;
+}
+uint32_t arm_r_r11_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 20;
+}
+uint32_t arm_r_r12_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 20;
+}
+uint32_t arm_r_r13_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 20;
+}
+uint32_t arm_r_r14_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 20;
+}
+uint32_t arm_r_r15_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 20;
+}
+uint32_t arm_r_r0_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r1_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r2_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r3_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r4_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r5_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r6_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r7_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r8_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r9_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r10_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r11_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r12_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r13_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r14_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r15_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 20; }
+}
+uint32_t arm_r_r0_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 21;
+}
+uint32_t arm_r_r1_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 21;
+}
+uint32_t arm_r_r2_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 21;
+}
+uint32_t arm_r_r3_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 21;
+}
+uint32_t arm_r_r4_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 21;
+}
+uint32_t arm_r_r5_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 21;
+}
+uint32_t arm_r_r6_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 21;
+}
+uint32_t arm_r_r7_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 21;
+}
+uint32_t arm_r_r8_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 21;
+}
+uint32_t arm_r_r9_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 21;
+}
+uint32_t arm_r_r10_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 21;
+}
+uint32_t arm_r_r11_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 21;
+}
+uint32_t arm_r_r12_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 21;
+}
+uint32_t arm_r_r13_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 21;
+}
+uint32_t arm_r_r14_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 21;
+}
+uint32_t arm_r_r15_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 21;
+}
+uint32_t arm_r_r0_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[10] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 21;
+}
+uint32_t arm_r_r1_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 21;
+}
+uint32_t arm_r_r2_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 21;
+}
+uint32_t arm_r_r3_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 21;
+}
+uint32_t arm_r_r4_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 21;
+}
+uint32_t arm_r_r5_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 21;
+}
+uint32_t arm_r_r6_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 21;
+}
+uint32_t arm_r_r7_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 21;
+}
+uint32_t arm_r_r8_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 21;
+}
+uint32_t arm_r_r9_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 21;
+}
+uint32_t arm_r_r10_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 21;
+}
+uint32_t arm_r_r11_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 21;
+}
+uint32_t arm_r_r12_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 21;
+}
+uint32_t arm_r_r13_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 21;
+}
+uint32_t arm_r_r14_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 21;
+}
+uint32_t arm_r_r15_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 21;
+}
+uint32_t arm_r_r0_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[10]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 21;
+}
+uint32_t arm_r_r1_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 21;
+}
+uint32_t arm_r_r2_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 21;
+}
+uint32_t arm_r_r3_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 21;
+}
+uint32_t arm_r_r4_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 21;
+}
+uint32_t arm_r_r5_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 21;
+}
+uint32_t arm_r_r6_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 21;
+}
+uint32_t arm_r_r7_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 21;
+}
+uint32_t arm_r_r8_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 21;
+}
+uint32_t arm_r_r9_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 21;
+}
+uint32_t arm_r_r10_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 21;
+}
+uint32_t arm_r_r11_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 21;
+}
+uint32_t arm_r_r12_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 21;
+}
+uint32_t arm_r_r13_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 21;
+}
+uint32_t arm_r_r14_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 21;
+}
+uint32_t arm_r_r15_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 21;
+}
+uint32_t arm_r_r0_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[10]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r1_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r2_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r3_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r4_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r5_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r6_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r7_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r8_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r9_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r10_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r11_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r12_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r13_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r14_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r15_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 21; }
+}
+uint32_t arm_r_r0_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[10]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 20;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 20;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r1_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r2_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r3_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r4_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r5_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r6_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r7_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r8_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r9_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r10_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r11_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r12_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r13_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r14_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r15_t6_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 20; }
+}
+uint32_t arm_rs_r0_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c20(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 21;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[10] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 21;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r1_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r2_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r3_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r4_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r5_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r6_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r7_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r8_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r9_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r10_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r11_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r12_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r13_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r14_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r15_t6_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 21; }
+}
+uint32_t arm_rs_r0_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c21(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[10]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rb.c gxemul-0.7.0/src/cpus/tmp_arm_rb.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rb.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_rb.c	2022-10-18 16:37:22.093753900 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 22;
+}
+uint32_t arm_r_r1_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 22;
+}
+uint32_t arm_r_r2_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 22;
+}
+uint32_t arm_r_r3_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 22;
+}
+uint32_t arm_r_r4_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 22;
+}
+uint32_t arm_r_r5_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 22;
+}
+uint32_t arm_r_r6_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 22;
+}
+uint32_t arm_r_r7_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 22;
+}
+uint32_t arm_r_r8_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 22;
+}
+uint32_t arm_r_r9_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 22;
+}
+uint32_t arm_r_r10_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 22;
+}
+uint32_t arm_r_r11_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 22;
+}
+uint32_t arm_r_r12_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 22;
+}
+uint32_t arm_r_r13_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 22;
+}
+uint32_t arm_r_r14_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 22;
+}
+uint32_t arm_r_r15_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 22;
+}
+uint32_t arm_r_r0_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 22;
+}
+uint32_t arm_r_r1_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 22;
+}
+uint32_t arm_r_r2_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 22;
+}
+uint32_t arm_r_r3_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 22;
+}
+uint32_t arm_r_r4_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 22;
+}
+uint32_t arm_r_r5_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 22;
+}
+uint32_t arm_r_r6_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 22;
+}
+uint32_t arm_r_r7_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 22;
+}
+uint32_t arm_r_r8_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 22;
+}
+uint32_t arm_r_r9_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 22;
+}
+uint32_t arm_r_r10_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 22;
+}
+uint32_t arm_r_r11_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 22;
+}
+uint32_t arm_r_r12_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 22;
+}
+uint32_t arm_r_r13_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 22;
+}
+uint32_t arm_r_r14_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 22;
+}
+uint32_t arm_r_r15_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 22;
+}
+uint32_t arm_r_r0_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 22;
+}
+uint32_t arm_r_r1_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 22;
+}
+uint32_t arm_r_r2_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 22;
+}
+uint32_t arm_r_r3_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 22;
+}
+uint32_t arm_r_r4_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 22;
+}
+uint32_t arm_r_r5_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 22;
+}
+uint32_t arm_r_r6_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 22;
+}
+uint32_t arm_r_r7_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 22;
+}
+uint32_t arm_r_r8_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 22;
+}
+uint32_t arm_r_r9_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 22;
+}
+uint32_t arm_r_r10_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 22;
+}
+uint32_t arm_r_r11_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 22;
+}
+uint32_t arm_r_r12_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 22;
+}
+uint32_t arm_r_r13_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 22;
+}
+uint32_t arm_r_r14_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 22;
+}
+uint32_t arm_r_r15_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 22;
+}
+uint32_t arm_r_r0_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r1_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r2_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r3_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r4_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r5_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r6_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r7_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r8_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r9_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r10_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r11_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r12_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r13_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r14_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r15_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 22; }
+}
+uint32_t arm_r_r0_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 23;
+}
+uint32_t arm_r_r1_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 23;
+}
+uint32_t arm_r_r2_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 23;
+}
+uint32_t arm_r_r3_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 23;
+}
+uint32_t arm_r_r4_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 23;
+}
+uint32_t arm_r_r5_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 23;
+}
+uint32_t arm_r_r6_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 23;
+}
+uint32_t arm_r_r7_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 23;
+}
+uint32_t arm_r_r8_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 23;
+}
+uint32_t arm_r_r9_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 23;
+}
+uint32_t arm_r_r10_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 23;
+}
+uint32_t arm_r_r11_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 23;
+}
+uint32_t arm_r_r12_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 23;
+}
+uint32_t arm_r_r13_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 23;
+}
+uint32_t arm_r_r14_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 23;
+}
+uint32_t arm_r_r15_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 23;
+}
+uint32_t arm_r_r0_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[11] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 23;
+}
+uint32_t arm_r_r1_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 23;
+}
+uint32_t arm_r_r2_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 23;
+}
+uint32_t arm_r_r3_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 23;
+}
+uint32_t arm_r_r4_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 23;
+}
+uint32_t arm_r_r5_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 23;
+}
+uint32_t arm_r_r6_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 23;
+}
+uint32_t arm_r_r7_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 23;
+}
+uint32_t arm_r_r8_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 23;
+}
+uint32_t arm_r_r9_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 23;
+}
+uint32_t arm_r_r10_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 23;
+}
+uint32_t arm_r_r11_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 23;
+}
+uint32_t arm_r_r12_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 23;
+}
+uint32_t arm_r_r13_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 23;
+}
+uint32_t arm_r_r14_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 23;
+}
+uint32_t arm_r_r15_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 23;
+}
+uint32_t arm_r_r0_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[11]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 23;
+}
+uint32_t arm_r_r1_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 23;
+}
+uint32_t arm_r_r2_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 23;
+}
+uint32_t arm_r_r3_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 23;
+}
+uint32_t arm_r_r4_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 23;
+}
+uint32_t arm_r_r5_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 23;
+}
+uint32_t arm_r_r6_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 23;
+}
+uint32_t arm_r_r7_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 23;
+}
+uint32_t arm_r_r8_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 23;
+}
+uint32_t arm_r_r9_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 23;
+}
+uint32_t arm_r_r10_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 23;
+}
+uint32_t arm_r_r11_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 23;
+}
+uint32_t arm_r_r12_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 23;
+}
+uint32_t arm_r_r13_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 23;
+}
+uint32_t arm_r_r14_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 23;
+}
+uint32_t arm_r_r15_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 23;
+}
+uint32_t arm_r_r0_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[11]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r1_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r2_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r3_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r4_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r5_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r6_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r7_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r8_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r9_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r10_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r11_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r12_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r13_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r14_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r15_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 23; }
+}
+uint32_t arm_r_r0_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[11]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 22;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 22;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r1_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r2_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r3_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r4_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r5_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r6_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r7_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r8_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r9_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r10_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r11_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r12_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r13_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r14_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r15_t6_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 22; }
+}
+uint32_t arm_rs_r0_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c22(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x200)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 23;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[11] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 23;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r1_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r2_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r3_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r4_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r5_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r6_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r7_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r8_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r9_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r10_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r11_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r12_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r13_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r14_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r15_t6_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x400000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 23; }
+}
+uint32_t arm_rs_r0_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c23(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[11]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rc.c gxemul-0.7.0/src/cpus/tmp_arm_rc.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rc.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_rc.c	2022-10-18 16:37:22.094755000 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 24;
+}
+uint32_t arm_r_r1_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 24;
+}
+uint32_t arm_r_r2_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 24;
+}
+uint32_t arm_r_r3_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 24;
+}
+uint32_t arm_r_r4_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 24;
+}
+uint32_t arm_r_r5_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 24;
+}
+uint32_t arm_r_r6_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 24;
+}
+uint32_t arm_r_r7_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 24;
+}
+uint32_t arm_r_r8_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 24;
+}
+uint32_t arm_r_r9_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 24;
+}
+uint32_t arm_r_r10_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 24;
+}
+uint32_t arm_r_r11_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 24;
+}
+uint32_t arm_r_r12_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 24;
+}
+uint32_t arm_r_r13_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 24;
+}
+uint32_t arm_r_r14_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 24;
+}
+uint32_t arm_r_r15_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 24;
+}
+uint32_t arm_r_r0_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 24;
+}
+uint32_t arm_r_r1_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 24;
+}
+uint32_t arm_r_r2_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 24;
+}
+uint32_t arm_r_r3_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 24;
+}
+uint32_t arm_r_r4_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 24;
+}
+uint32_t arm_r_r5_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 24;
+}
+uint32_t arm_r_r6_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 24;
+}
+uint32_t arm_r_r7_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 24;
+}
+uint32_t arm_r_r8_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 24;
+}
+uint32_t arm_r_r9_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 24;
+}
+uint32_t arm_r_r10_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 24;
+}
+uint32_t arm_r_r11_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 24;
+}
+uint32_t arm_r_r12_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 24;
+}
+uint32_t arm_r_r13_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 24;
+}
+uint32_t arm_r_r14_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 24;
+}
+uint32_t arm_r_r15_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 24;
+}
+uint32_t arm_r_r0_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 24;
+}
+uint32_t arm_r_r1_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 24;
+}
+uint32_t arm_r_r2_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 24;
+}
+uint32_t arm_r_r3_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 24;
+}
+uint32_t arm_r_r4_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 24;
+}
+uint32_t arm_r_r5_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 24;
+}
+uint32_t arm_r_r6_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 24;
+}
+uint32_t arm_r_r7_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 24;
+}
+uint32_t arm_r_r8_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 24;
+}
+uint32_t arm_r_r9_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 24;
+}
+uint32_t arm_r_r10_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 24;
+}
+uint32_t arm_r_r11_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 24;
+}
+uint32_t arm_r_r12_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 24;
+}
+uint32_t arm_r_r13_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 24;
+}
+uint32_t arm_r_r14_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 24;
+}
+uint32_t arm_r_r15_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 24;
+}
+uint32_t arm_r_r0_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r1_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r2_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r3_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r4_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r5_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r6_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r7_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r8_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r9_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r10_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r11_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r12_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r13_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r14_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r15_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 24; }
+}
+uint32_t arm_r_r0_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 25;
+}
+uint32_t arm_r_r1_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 25;
+}
+uint32_t arm_r_r2_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 25;
+}
+uint32_t arm_r_r3_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 25;
+}
+uint32_t arm_r_r4_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 25;
+}
+uint32_t arm_r_r5_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 25;
+}
+uint32_t arm_r_r6_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 25;
+}
+uint32_t arm_r_r7_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 25;
+}
+uint32_t arm_r_r8_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 25;
+}
+uint32_t arm_r_r9_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 25;
+}
+uint32_t arm_r_r10_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 25;
+}
+uint32_t arm_r_r11_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 25;
+}
+uint32_t arm_r_r12_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 25;
+}
+uint32_t arm_r_r13_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 25;
+}
+uint32_t arm_r_r14_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 25;
+}
+uint32_t arm_r_r15_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 25;
+}
+uint32_t arm_r_r0_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[12] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 25;
+}
+uint32_t arm_r_r1_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 25;
+}
+uint32_t arm_r_r2_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 25;
+}
+uint32_t arm_r_r3_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 25;
+}
+uint32_t arm_r_r4_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 25;
+}
+uint32_t arm_r_r5_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 25;
+}
+uint32_t arm_r_r6_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 25;
+}
+uint32_t arm_r_r7_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 25;
+}
+uint32_t arm_r_r8_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 25;
+}
+uint32_t arm_r_r9_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 25;
+}
+uint32_t arm_r_r10_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 25;
+}
+uint32_t arm_r_r11_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 25;
+}
+uint32_t arm_r_r12_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 25;
+}
+uint32_t arm_r_r13_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 25;
+}
+uint32_t arm_r_r14_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 25;
+}
+uint32_t arm_r_r15_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 25;
+}
+uint32_t arm_r_r0_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[12]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 25;
+}
+uint32_t arm_r_r1_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 25;
+}
+uint32_t arm_r_r2_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 25;
+}
+uint32_t arm_r_r3_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 25;
+}
+uint32_t arm_r_r4_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 25;
+}
+uint32_t arm_r_r5_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 25;
+}
+uint32_t arm_r_r6_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 25;
+}
+uint32_t arm_r_r7_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 25;
+}
+uint32_t arm_r_r8_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 25;
+}
+uint32_t arm_r_r9_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 25;
+}
+uint32_t arm_r_r10_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 25;
+}
+uint32_t arm_r_r11_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 25;
+}
+uint32_t arm_r_r12_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 25;
+}
+uint32_t arm_r_r13_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 25;
+}
+uint32_t arm_r_r14_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 25;
+}
+uint32_t arm_r_r15_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 25;
+}
+uint32_t arm_r_r0_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[12]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r1_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r2_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r3_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r4_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r5_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r6_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r7_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r8_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r9_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r10_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r11_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r12_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r13_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r14_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r15_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 25; }
+}
+uint32_t arm_r_r0_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[12]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x100)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 24;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 24;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r1_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r2_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r3_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r4_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r5_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r6_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r7_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r8_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r9_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r10_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r11_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r12_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r13_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r14_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r15_t6_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x800000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 24; }
+}
+uint32_t arm_rs_r0_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c24(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x80)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 25;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[12] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 25;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r1_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r2_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r3_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r4_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r5_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r6_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r7_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r8_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r9_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r10_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r11_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r12_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r13_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r14_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r15_t6_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x1000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 25; }
+}
+uint32_t arm_rs_r0_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c25(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[12]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rd.c gxemul-0.7.0/src/cpus/tmp_arm_rd.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rd.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_rd.c	2022-10-18 16:37:22.095755700 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 26;
+}
+uint32_t arm_r_r1_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 26;
+}
+uint32_t arm_r_r2_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 26;
+}
+uint32_t arm_r_r3_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 26;
+}
+uint32_t arm_r_r4_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 26;
+}
+uint32_t arm_r_r5_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 26;
+}
+uint32_t arm_r_r6_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 26;
+}
+uint32_t arm_r_r7_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 26;
+}
+uint32_t arm_r_r8_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 26;
+}
+uint32_t arm_r_r9_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 26;
+}
+uint32_t arm_r_r10_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 26;
+}
+uint32_t arm_r_r11_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 26;
+}
+uint32_t arm_r_r12_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 26;
+}
+uint32_t arm_r_r13_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 26;
+}
+uint32_t arm_r_r14_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 26;
+}
+uint32_t arm_r_r15_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 26;
+}
+uint32_t arm_r_r0_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 26;
+}
+uint32_t arm_r_r1_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 26;
+}
+uint32_t arm_r_r2_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 26;
+}
+uint32_t arm_r_r3_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 26;
+}
+uint32_t arm_r_r4_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 26;
+}
+uint32_t arm_r_r5_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 26;
+}
+uint32_t arm_r_r6_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 26;
+}
+uint32_t arm_r_r7_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 26;
+}
+uint32_t arm_r_r8_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 26;
+}
+uint32_t arm_r_r9_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 26;
+}
+uint32_t arm_r_r10_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 26;
+}
+uint32_t arm_r_r11_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 26;
+}
+uint32_t arm_r_r12_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 26;
+}
+uint32_t arm_r_r13_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 26;
+}
+uint32_t arm_r_r14_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 26;
+}
+uint32_t arm_r_r15_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 26;
+}
+uint32_t arm_r_r0_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 26;
+}
+uint32_t arm_r_r1_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 26;
+}
+uint32_t arm_r_r2_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 26;
+}
+uint32_t arm_r_r3_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 26;
+}
+uint32_t arm_r_r4_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 26;
+}
+uint32_t arm_r_r5_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 26;
+}
+uint32_t arm_r_r6_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 26;
+}
+uint32_t arm_r_r7_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 26;
+}
+uint32_t arm_r_r8_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 26;
+}
+uint32_t arm_r_r9_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 26;
+}
+uint32_t arm_r_r10_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 26;
+}
+uint32_t arm_r_r11_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 26;
+}
+uint32_t arm_r_r12_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 26;
+}
+uint32_t arm_r_r13_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 26;
+}
+uint32_t arm_r_r14_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 26;
+}
+uint32_t arm_r_r15_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 26;
+}
+uint32_t arm_r_r0_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r1_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r2_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r3_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r4_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r5_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r6_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r7_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r8_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r9_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r10_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r11_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r12_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r13_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r14_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r15_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 26; }
+}
+uint32_t arm_r_r0_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 27;
+}
+uint32_t arm_r_r1_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 27;
+}
+uint32_t arm_r_r2_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 27;
+}
+uint32_t arm_r_r3_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 27;
+}
+uint32_t arm_r_r4_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 27;
+}
+uint32_t arm_r_r5_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 27;
+}
+uint32_t arm_r_r6_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 27;
+}
+uint32_t arm_r_r7_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 27;
+}
+uint32_t arm_r_r8_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 27;
+}
+uint32_t arm_r_r9_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 27;
+}
+uint32_t arm_r_r10_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 27;
+}
+uint32_t arm_r_r11_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 27;
+}
+uint32_t arm_r_r12_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 27;
+}
+uint32_t arm_r_r13_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 27;
+}
+uint32_t arm_r_r14_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 27;
+}
+uint32_t arm_r_r15_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 27;
+}
+uint32_t arm_r_r0_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[13] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 27;
+}
+uint32_t arm_r_r1_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 27;
+}
+uint32_t arm_r_r2_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 27;
+}
+uint32_t arm_r_r3_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 27;
+}
+uint32_t arm_r_r4_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 27;
+}
+uint32_t arm_r_r5_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 27;
+}
+uint32_t arm_r_r6_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 27;
+}
+uint32_t arm_r_r7_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 27;
+}
+uint32_t arm_r_r8_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 27;
+}
+uint32_t arm_r_r9_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 27;
+}
+uint32_t arm_r_r10_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 27;
+}
+uint32_t arm_r_r11_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 27;
+}
+uint32_t arm_r_r12_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 27;
+}
+uint32_t arm_r_r13_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 27;
+}
+uint32_t arm_r_r14_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 27;
+}
+uint32_t arm_r_r15_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 27;
+}
+uint32_t arm_r_r0_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[13]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 27;
+}
+uint32_t arm_r_r1_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 27;
+}
+uint32_t arm_r_r2_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 27;
+}
+uint32_t arm_r_r3_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 27;
+}
+uint32_t arm_r_r4_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 27;
+}
+uint32_t arm_r_r5_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 27;
+}
+uint32_t arm_r_r6_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 27;
+}
+uint32_t arm_r_r7_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 27;
+}
+uint32_t arm_r_r8_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 27;
+}
+uint32_t arm_r_r9_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 27;
+}
+uint32_t arm_r_r10_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 27;
+}
+uint32_t arm_r_r11_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 27;
+}
+uint32_t arm_r_r12_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 27;
+}
+uint32_t arm_r_r13_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 27;
+}
+uint32_t arm_r_r14_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 27;
+}
+uint32_t arm_r_r15_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 27;
+}
+uint32_t arm_r_r0_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[13]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r1_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r2_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r3_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r4_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r5_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r6_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r7_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r8_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r9_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r10_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r11_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r12_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r13_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r14_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r15_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 27; }
+}
+uint32_t arm_r_r0_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[13]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 26;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 26;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r1_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r2_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r3_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r4_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r5_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r6_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r7_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r8_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r9_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r10_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r11_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r12_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r13_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r14_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r15_t6_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 26; }
+}
+uint32_t arm_rs_r0_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c26(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 27;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[13] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 27;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r1_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r2_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r3_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r4_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r5_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r6_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r7_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r8_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r9_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r10_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r11_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r12_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r13_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r14_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r15_t6_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 27; }
+}
+uint32_t arm_rs_r0_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c27(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[13]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_re.c gxemul-0.7.0/src/cpus/tmp_arm_re.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_re.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_re.c	2022-10-18 16:37:22.095755700 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 28;
+}
+uint32_t arm_r_r1_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 28;
+}
+uint32_t arm_r_r2_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 28;
+}
+uint32_t arm_r_r3_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 28;
+}
+uint32_t arm_r_r4_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 28;
+}
+uint32_t arm_r_r5_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 28;
+}
+uint32_t arm_r_r6_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 28;
+}
+uint32_t arm_r_r7_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 28;
+}
+uint32_t arm_r_r8_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 28;
+}
+uint32_t arm_r_r9_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 28;
+}
+uint32_t arm_r_r10_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 28;
+}
+uint32_t arm_r_r11_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 28;
+}
+uint32_t arm_r_r12_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 28;
+}
+uint32_t arm_r_r13_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 28;
+}
+uint32_t arm_r_r14_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 28;
+}
+uint32_t arm_r_r15_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 28;
+}
+uint32_t arm_r_r0_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 28;
+}
+uint32_t arm_r_r1_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 28;
+}
+uint32_t arm_r_r2_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 28;
+}
+uint32_t arm_r_r3_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 28;
+}
+uint32_t arm_r_r4_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 28;
+}
+uint32_t arm_r_r5_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 28;
+}
+uint32_t arm_r_r6_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 28;
+}
+uint32_t arm_r_r7_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 28;
+}
+uint32_t arm_r_r8_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 28;
+}
+uint32_t arm_r_r9_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 28;
+}
+uint32_t arm_r_r10_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 28;
+}
+uint32_t arm_r_r11_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 28;
+}
+uint32_t arm_r_r12_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 28;
+}
+uint32_t arm_r_r13_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 28;
+}
+uint32_t arm_r_r14_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 28;
+}
+uint32_t arm_r_r15_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 28;
+}
+uint32_t arm_r_r0_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 28;
+}
+uint32_t arm_r_r1_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 28;
+}
+uint32_t arm_r_r2_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 28;
+}
+uint32_t arm_r_r3_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 28;
+}
+uint32_t arm_r_r4_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 28;
+}
+uint32_t arm_r_r5_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 28;
+}
+uint32_t arm_r_r6_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 28;
+}
+uint32_t arm_r_r7_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 28;
+}
+uint32_t arm_r_r8_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 28;
+}
+uint32_t arm_r_r9_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 28;
+}
+uint32_t arm_r_r10_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 28;
+}
+uint32_t arm_r_r11_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 28;
+}
+uint32_t arm_r_r12_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 28;
+}
+uint32_t arm_r_r13_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 28;
+}
+uint32_t arm_r_r14_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 28;
+}
+uint32_t arm_r_r15_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 28;
+}
+uint32_t arm_r_r0_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r1_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r2_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r3_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r4_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r5_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r6_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r7_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r8_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r9_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r10_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r11_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r12_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r13_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r14_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r15_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 28; }
+}
+uint32_t arm_r_r0_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 29;
+}
+uint32_t arm_r_r1_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 29;
+}
+uint32_t arm_r_r2_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 29;
+}
+uint32_t arm_r_r3_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 29;
+}
+uint32_t arm_r_r4_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 29;
+}
+uint32_t arm_r_r5_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 29;
+}
+uint32_t arm_r_r6_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 29;
+}
+uint32_t arm_r_r7_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 29;
+}
+uint32_t arm_r_r8_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 29;
+}
+uint32_t arm_r_r9_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 29;
+}
+uint32_t arm_r_r10_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 29;
+}
+uint32_t arm_r_r11_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 29;
+}
+uint32_t arm_r_r12_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 29;
+}
+uint32_t arm_r_r13_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 29;
+}
+uint32_t arm_r_r14_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 29;
+}
+uint32_t arm_r_r15_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 29;
+}
+uint32_t arm_r_r0_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[14] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 29;
+}
+uint32_t arm_r_r1_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 29;
+}
+uint32_t arm_r_r2_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 29;
+}
+uint32_t arm_r_r3_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 29;
+}
+uint32_t arm_r_r4_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 29;
+}
+uint32_t arm_r_r5_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 29;
+}
+uint32_t arm_r_r6_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 29;
+}
+uint32_t arm_r_r7_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 29;
+}
+uint32_t arm_r_r8_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 29;
+}
+uint32_t arm_r_r9_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 29;
+}
+uint32_t arm_r_r10_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 29;
+}
+uint32_t arm_r_r11_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 29;
+}
+uint32_t arm_r_r12_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 29;
+}
+uint32_t arm_r_r13_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 29;
+}
+uint32_t arm_r_r14_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 29;
+}
+uint32_t arm_r_r15_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 29;
+}
+uint32_t arm_r_r0_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[14]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 29;
+}
+uint32_t arm_r_r1_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 29;
+}
+uint32_t arm_r_r2_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 29;
+}
+uint32_t arm_r_r3_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 29;
+}
+uint32_t arm_r_r4_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 29;
+}
+uint32_t arm_r_r5_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 29;
+}
+uint32_t arm_r_r6_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 29;
+}
+uint32_t arm_r_r7_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 29;
+}
+uint32_t arm_r_r8_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 29;
+}
+uint32_t arm_r_r9_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 29;
+}
+uint32_t arm_r_r10_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 29;
+}
+uint32_t arm_r_r11_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 29;
+}
+uint32_t arm_r_r12_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 29;
+}
+uint32_t arm_r_r13_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 29;
+}
+uint32_t arm_r_r14_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 29;
+}
+uint32_t arm_r_r15_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 29;
+}
+uint32_t arm_r_r0_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[14]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r1_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r2_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r3_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r4_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r5_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r6_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r7_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r8_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r9_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r10_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r11_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r12_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r13_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r14_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r15_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 29; }
+}
+uint32_t arm_r_r0_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[14]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 28;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 28;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r1_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r2_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r3_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r4_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r5_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r6_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r7_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r8_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r9_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r10_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r11_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r12_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r13_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r14_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r15_t6_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 28; }
+}
+uint32_t arm_rs_r0_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c28(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x8)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 29;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[14] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 29;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r1_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r2_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r3_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r4_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r5_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r6_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r7_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r8_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r9_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r10_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r11_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r12_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r13_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r14_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r15_t6_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x10000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 29; }
+}
+uint32_t arm_rs_r0_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c29(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[14]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_rf.c gxemul-0.7.0/src/cpus/tmp_arm_rf.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_rf.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_rf.c	2022-10-18 16:37:22.096756400 +0000
@@ -0,0 +1,3338 @@
+/*
+ *  DO NOT EDIT! AUTOMATICALLY GENERATED!
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "cpu.h"
+#include "misc.h"
+
+
+uint32_t arm_r_r0_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 30;
+}
+uint32_t arm_r_r1_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 30;
+}
+uint32_t arm_r_r2_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 30;
+}
+uint32_t arm_r_r3_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 30;
+}
+uint32_t arm_r_r4_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 30;
+}
+uint32_t arm_r_r5_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 30;
+}
+uint32_t arm_r_r6_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 30;
+}
+uint32_t arm_r_r7_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 30;
+}
+uint32_t arm_r_r8_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 30;
+}
+uint32_t arm_r_r9_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 30;
+}
+uint32_t arm_r_r10_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 30;
+}
+uint32_t arm_r_r11_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 30;
+}
+uint32_t arm_r_r12_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 30;
+}
+uint32_t arm_r_r13_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 30;
+}
+uint32_t arm_r_r14_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 30;
+}
+uint32_t arm_r_r15_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 30;
+}
+uint32_t arm_r_r0_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 30;
+}
+uint32_t arm_r_r1_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 30;
+}
+uint32_t arm_r_r2_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 30;
+}
+uint32_t arm_r_r3_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 30;
+}
+uint32_t arm_r_r4_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 30;
+}
+uint32_t arm_r_r5_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 30;
+}
+uint32_t arm_r_r6_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 30;
+}
+uint32_t arm_r_r7_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 30;
+}
+uint32_t arm_r_r8_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 30;
+}
+uint32_t arm_r_r9_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 30;
+}
+uint32_t arm_r_r10_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 30;
+}
+uint32_t arm_r_r11_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 30;
+}
+uint32_t arm_r_r12_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 30;
+}
+uint32_t arm_r_r13_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 30;
+}
+uint32_t arm_r_r14_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 30;
+}
+uint32_t arm_r_r15_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 30;
+}
+uint32_t arm_r_r0_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 30;
+}
+uint32_t arm_r_r1_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 30;
+}
+uint32_t arm_r_r2_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 30;
+}
+uint32_t arm_r_r3_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 30;
+}
+uint32_t arm_r_r4_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 30;
+}
+uint32_t arm_r_r5_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 30;
+}
+uint32_t arm_r_r6_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 30;
+}
+uint32_t arm_r_r7_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 30;
+}
+uint32_t arm_r_r8_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 30;
+}
+uint32_t arm_r_r9_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 30;
+}
+uint32_t arm_r_r10_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 30;
+}
+uint32_t arm_r_r11_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 30;
+}
+uint32_t arm_r_r12_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 30;
+}
+uint32_t arm_r_r13_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 30;
+}
+uint32_t arm_r_r14_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 30;
+}
+uint32_t arm_r_r15_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 30;
+}
+uint32_t arm_r_r0_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r1_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r2_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r3_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r4_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r5_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r6_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r7_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r8_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r9_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r10_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r11_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r12_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r13_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r14_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r15_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 30; }
+}
+uint32_t arm_r_r0_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r0_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] << 31;
+}
+uint32_t arm_r_r1_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] << 31;
+}
+uint32_t arm_r_r2_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] << 31;
+}
+uint32_t arm_r_r3_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] << 31;
+}
+uint32_t arm_r_r4_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] << 31;
+}
+uint32_t arm_r_r5_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] << 31;
+}
+uint32_t arm_r_r6_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] << 31;
+}
+uint32_t arm_r_r7_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] << 31;
+}
+uint32_t arm_r_r8_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] << 31;
+}
+uint32_t arm_r_r9_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] << 31;
+}
+uint32_t arm_r_r10_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] << 31;
+}
+uint32_t arm_r_r11_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] << 31;
+}
+uint32_t arm_r_r12_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] << 31;
+}
+uint32_t arm_r_r13_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] << 31;
+}
+uint32_t arm_r_r14_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] << 31;
+}
+uint32_t arm_r_r15_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp << 31;
+}
+uint32_t arm_r_r0_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[0];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r1_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[1];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r2_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[2];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r3_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[3];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r4_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[4];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r5_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[5];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r6_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[6];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r7_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[7];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r8_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[8];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r9_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[9];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r10_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[10];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r11_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[11];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r12_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[12];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r13_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[13];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r14_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =cpu->cd.arm.r[14];
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r15_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y = cpu->cd.arm.r[15] & 255;
+  uint32_t x =tmp;
+if (y > 31) return 0; else x <<= y;
+return x; }
+}
+uint32_t arm_r_r0_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[0] >> 31;
+}
+uint32_t arm_r_r1_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[1] >> 31;
+}
+uint32_t arm_r_r2_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[2] >> 31;
+}
+uint32_t arm_r_r3_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[3] >> 31;
+}
+uint32_t arm_r_r4_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[4] >> 31;
+}
+uint32_t arm_r_r5_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[5] >> 31;
+}
+uint32_t arm_r_r6_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[6] >> 31;
+}
+uint32_t arm_r_r7_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[7] >> 31;
+}
+uint32_t arm_r_r8_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[8] >> 31;
+}
+uint32_t arm_r_r9_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[9] >> 31;
+}
+uint32_t arm_r_r10_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[10] >> 31;
+}
+uint32_t arm_r_r11_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[11] >> 31;
+}
+uint32_t arm_r_r12_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[12] >> 31;
+}
+uint32_t arm_r_r13_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[13] >> 31;
+}
+uint32_t arm_r_r14_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	return cpu->cd.arm.r[14] >> 31;
+}
+uint32_t arm_r_r15_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+	return tmp >> 31;
+}
+uint32_t arm_r_r0_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[0]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r1_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[1]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r2_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[2]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r3_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[3]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r4_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[4]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r5_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[5]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r6_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[6]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r7_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[7]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r8_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[8]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r9_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[9]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r10_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[10]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r11_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[11]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r12_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[12]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r13_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[13]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r14_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=cpu->cd.arm.r[14]; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r15_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t y=cpu->cd.arm.r[15]&255;
+uint32_t x=tmp; if (y>=32) return 0;
+return x >> y; } }
+uint32_t arm_r_r0_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[0] >> 31;
+}
+uint32_t arm_r_r1_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[1] >> 31;
+}
+uint32_t arm_r_r2_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[2] >> 31;
+}
+uint32_t arm_r_r3_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[3] >> 31;
+}
+uint32_t arm_r_r4_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[4] >> 31;
+}
+uint32_t arm_r_r5_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[5] >> 31;
+}
+uint32_t arm_r_r6_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[6] >> 31;
+}
+uint32_t arm_r_r7_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[7] >> 31;
+}
+uint32_t arm_r_r8_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[8] >> 31;
+}
+uint32_t arm_r_r9_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[9] >> 31;
+}
+uint32_t arm_r_r10_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[10] >> 31;
+}
+uint32_t arm_r_r11_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[11] >> 31;
+}
+uint32_t arm_r_r12_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[12] >> 31;
+}
+uint32_t arm_r_r13_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[13] >> 31;
+}
+uint32_t arm_r_r14_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+return (int32_t)cpu->cd.arm.r[14] >> 31;
+}
+uint32_t arm_r_r15_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+return (int32_t)tmp >> 31;
+}
+uint32_t arm_r_r0_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[0]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r1_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[1]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r2_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[2]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r3_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[3]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r4_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[4]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r5_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[5]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r6_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[6]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r7_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[7]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r8_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[8]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r9_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[9]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r10_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[10]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r11_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[11]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r12_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[12]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r13_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[13]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r14_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=cpu->cd.arm.r[14]; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r15_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t y=cpu->cd.arm.r[15]&255;
+int32_t x=tmp; if (y>=31) return (x<0)?0xffffffff:0;
+return (int32_t)x >> y; } }
+uint32_t arm_r_r0_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r1_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r2_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r3_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r4_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r5_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r6_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r7_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r8_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r9_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r10_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r11_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r12_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r13_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r14_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r15_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x=tmp; x |= (x << 32); return x >> 31; }
+}
+uint32_t arm_r_r0_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[0]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r1_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[1]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r2_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[2]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r3_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[3]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r4_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[4]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r5_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[5]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r6_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[6]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r7_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[7]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r8_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[8]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r9_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[9]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r10_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[10]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r11_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[11]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r12_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[12]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r13_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[13]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r14_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=cpu->cd.arm.r[14]; x |= (x << 32); return (x >> y); } }
+uint32_t arm_r_r15_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int y=cpu->cd.arm.r[15]&31;
+uint64_t x=tmp; x |= (x << 32); return (x >> y); } }
+uint32_t arm_rs_r0_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x4)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 30;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 30;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r1_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r2_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r3_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r4_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r5_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r6_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r7_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r8_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r9_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r10_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r11_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r12_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r13_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r14_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r15_t6_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x20000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 30; }
+}
+uint32_t arm_rs_r0_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c30(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r1_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r2_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r3_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r4_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r5_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r6_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r7_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r8_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r9_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r10_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r11_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r12_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r13_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r14_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r15_t0_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x2)
+	cpu->cd.arm.flags |= ARM_F_C;
+x <<= 31;
+ return x; }
+}
+uint32_t arm_rs_r0_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r1_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r2_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r3_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r4_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r5_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r6_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r7_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r8_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r9_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r10_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r11_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r12_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r13_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r14_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r15_t1_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+  uint32_t y = cpu->cd.arm.r[15] & 255;
+  if (y != 0) {
+    cpu->cd.arm.flags &= ~ARM_F_C;
+    if (y >= 32) return 0;
+    x <<= (y - 1);
+    if (x & 0x80000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+    x <<= 1;
+ }
+ return x; }
+}
+uint32_t arm_rs_r0_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r1_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r2_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r3_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r4_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r5_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r6_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r7_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r8_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r9_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r10_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r11_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r12_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r13_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r14_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r15_t2_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r0_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t3_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint32_t x = tmp,y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=32;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r0_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r1_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r2_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r3_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r4_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r5_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r6_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r7_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r8_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r9_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r10_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r11_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r12_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r13_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r14_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14];
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r15_t4_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+x >>= 31;
+ return x; }
+}
+uint32_t arm_rs_r0_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[0],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r1_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[1],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r2_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[2],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r3_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[3],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r4_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[4],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r5_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[5],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r6_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[6],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r7_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[7],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r8_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[8],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r9_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[9],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r10_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[10],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r11_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[11],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r12_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[12],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r13_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[13],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r14_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ int32_t x = cpu->cd.arm.r[14],y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r15_t5_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ int32_t x = tmp,y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if(y>31) y=31;
+y--; x >>= y;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return (int32_t)x >> 1; }
+}
+uint32_t arm_rs_r0_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r1_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r2_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r3_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r4_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r5_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r6_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r7_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r8_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r9_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r10_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r11_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r12_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r13_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r14_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r15_t6_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; x |= (x << 32);
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 0x40000000)
+	cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 31; }
+}
+uint32_t arm_rs_r0_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[0]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r1_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[1]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r2_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[2]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r3_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[3]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r4_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[4]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r5_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[5]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r6_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[6]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r7_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[7]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r8_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[8]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r9_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[9]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r10_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[10]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r11_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[11]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r12_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[12]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r13_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[13]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r14_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+{ uint64_t x = cpu->cd.arm.r[14]; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
+uint32_t arm_rs_r15_t7_c31(struct cpu *cpu, struct arm_instr_call *ic) {
+	uint32_t tmp, low_pc = ((size_t)ic - (size_t)
+	    cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);
+	tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
+	    ARM_INSTR_ALIGNMENT_SHIFT);
+	tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;
+{ uint64_t x = tmp; int y=cpu->cd.arm.r[15]&255;
+if(y==0) return x;
+y --; y &= 31; x >>= y;
+cpu->cd.arm.flags &= ~ARM_F_C;
+if (x & 1) cpu->cd.arm.flags |= ARM_F_C;
+ return x >> 1; }
+}
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_arm_tail.c gxemul-0.7.0/src/cpus/tmp_arm_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_arm_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_arm_tail.c	2022-10-18 16:37:22.097757300 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF arm_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES arm_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF arm_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC arm_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE arm_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE arm_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW arm_memory_rw
+#define MEM_ARM
+#include "memory_rw.c"
+#undef MEM_ARM
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC arm_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC arm_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS arm_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) arm_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_arm_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF arm_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS arm32_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void arm32_instr_ ## n(struct cpu *cpu, \
+	struct arm_instr_call *ic)
+#define instr(n) arm32_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY arm32_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC arm32_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE arm32_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE arm32_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC arm32_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC arm32_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS arm32_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) arm32_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_arm_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 arm32_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF arm32_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(arm,"ARM")
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_i960_head.c gxemul-0.7.0/src/cpus/tmp_i960_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_i960_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_i960_head.c	2022-10-18 16:37:22.097757300 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES I960_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH i960
+#define DYNTRANS_I960
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N I960_L2N
+#define DYNTRANS_L3N I960_L3N
+#if !defined(I960_L2N) || !defined(I960_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE i960_l2_64_table
+#define DYNTRANS_L3_64_TABLE i960_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC i960_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE I960_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT I960_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE i960_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY i960_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR I960_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY I960_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE i960_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE i960_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS i960_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC i960_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS i960_combine_instructions
+#define DISASSEMBLE i960_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_i960_instr.c */
+#define instr(n) i960_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) i96032_instr_ ## n
+
+#endif
+
+
+#define X(n) void i960_instr_ ## n(struct cpu *cpu, \
+ struct i960_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.i960.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct i960_instr_call nothing_call = { instr(nothing), {0,0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_i960_tail.c gxemul-0.7.0/src/cpus/tmp_i960_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_i960_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_i960_tail.c	2022-10-18 16:37:22.098758300 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF i960_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES i960_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF i960_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC i960_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE i960_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE i960_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW i960_memory_rw
+#define MEM_I960
+#include "memory_rw.c"
+#undef MEM_I960
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC i960_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC i960_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS i960_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) i960_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_i960_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF i960_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS i96032_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void i96032_instr_ ## n(struct cpu *cpu, \
+	struct i960_instr_call *ic)
+#define instr(n) i96032_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY i96032_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC i96032_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE i96032_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE i96032_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC i96032_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC i96032_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS i96032_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) i96032_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_i960_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS i960_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 i96032_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF i96032_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(i960,"I960")
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_bcnd.c gxemul-0.7.0/src/cpus/tmp_m88k_bcnd.c
--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_bcnd.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_m88k_bcnd.c	2022-10-18 16:37:22.099759300 +0000
@@ -0,0 +1,512 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+
+X(bcnd_gt0)
+{
+	if ((int32_t)reg(ic->arg[0]) > 0) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_eq0)
+{
+	if ((int32_t)reg(ic->arg[0]) == 0) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_ge0)
+{
+	if ((int32_t)reg(ic->arg[0]) >= 0) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_not_maxneg_nor_zero)
+{
+	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL && (int32_t)reg(ic->arg[0]) != 0) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_not_maxneg)
+{
+	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_maxneg)
+{
+	if ((uint32_t)reg(ic->arg[0]) == 0x80000000UL) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_lt0)
+{
+	if ((int32_t)reg(ic->arg[0]) < 0) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_ne0)
+{
+	if ((int32_t)reg(ic->arg[0]) != 0) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_le0)
+{
+	if ((int32_t)reg(ic->arg[0]) <= 0) {
+		cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
+		quick_pc_to_pointers(cpu);
+	}
+}
+
+
+X(bcnd_n_gt0)
+{
+	int cond = (int32_t)reg(ic->arg[0]) > 0;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_eq0)
+{
+	int cond = (int32_t)reg(ic->arg[0]) == 0;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_ge0)
+{
+	int cond = (int32_t)reg(ic->arg[0]) >= 0;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_not_maxneg_nor_zero)
+{
+	int cond = (uint32_t)reg(ic->arg[0]) != 0x80000000UL && (int32_t)reg(ic->arg[0]) != 0;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_not_maxneg)
+{
+	int cond = (uint32_t)reg(ic->arg[0]) != 0x80000000UL;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_maxneg)
+{
+	int cond = (uint32_t)reg(ic->arg[0]) == 0x80000000UL;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_lt0)
+{
+	int cond = (int32_t)reg(ic->arg[0]) < 0;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_ne0)
+{
+	int cond = (int32_t)reg(ic->arg[0]) != 0;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_n_le0)
+{
+	int cond = (int32_t)reg(ic->arg[0]) <= 0;
+	SYNCH_PC;
+	if (cond)
+		cpu->cd.m88k.delay_target = (cpu->pc
+			& ~((M88K_IC_ENTRIES_PER_PAGE-1) << M88K_INSTR_ALIGNMENT_SHIFT))
+			+ ic->arg[2];
+	else
+		cpu->cd.m88k.delay_target = cpu->pc + 8;
+	cpu->delay_slot = TO_BE_DELAYED;
+	ic[1].f(cpu, ic+1);
+	cpu->n_translated_instrs ++;
+	if (!(cpu->delay_slot & EXCEPTION_IN_DELAY_SLOT)) {
+		cpu->delay_slot = NOT_DELAYED;
+		if (cond) {
+			cpu->pc = cpu->cd.m88k.delay_target;
+			quick_pc_to_pointers(cpu);
+		} else
+			cpu->cd.m88k.next_ic ++;
+	} else
+		cpu->delay_slot = NOT_DELAYED;
+}
+
+
+X(bcnd_samepage_gt0)
+{
+	if ((int32_t)reg(ic->arg[0]) > 0) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_eq0)
+{
+	if ((int32_t)reg(ic->arg[0]) == 0) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_ge0)
+{
+	if ((int32_t)reg(ic->arg[0]) >= 0) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_not_maxneg_nor_zero)
+{
+	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL && (int32_t)reg(ic->arg[0]) != 0) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_not_maxneg)
+{
+	if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_maxneg)
+{
+	if ((uint32_t)reg(ic->arg[0]) == 0x80000000UL) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_lt0)
+{
+	if ((int32_t)reg(ic->arg[0]) < 0) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_ne0)
+{
+	if ((int32_t)reg(ic->arg[0]) != 0) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+X(bcnd_samepage_le0)
+{
+	if ((int32_t)reg(ic->arg[0]) <= 0) {
+		cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
+	}
+}
+
+
+
+void (*m88k_bcnd[32 * 2 * 2])(struct cpu *, struct m88k_instr_call *) = {
+NULL,
+m88k_instr_bcnd_gt0,
+m88k_instr_bcnd_eq0,
+m88k_instr_bcnd_ge0,
+NULL,
+m88k_instr_bcnd_not_maxneg_nor_zero,
+NULL,
+m88k_instr_bcnd_not_maxneg,
+m88k_instr_bcnd_maxneg,
+NULL,
+NULL,
+NULL,
+m88k_instr_bcnd_lt0,
+m88k_instr_bcnd_ne0,
+m88k_instr_bcnd_le0,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+m88k_instr_bcnd_n_gt0,
+m88k_instr_bcnd_n_eq0,
+m88k_instr_bcnd_n_ge0,
+NULL,
+m88k_instr_bcnd_n_not_maxneg_nor_zero,
+NULL,
+m88k_instr_bcnd_n_not_maxneg,
+m88k_instr_bcnd_n_maxneg,
+NULL,
+NULL,
+NULL,
+m88k_instr_bcnd_n_lt0,
+m88k_instr_bcnd_n_ne0,
+m88k_instr_bcnd_n_le0,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+m88k_instr_bcnd_samepage_gt0,
+m88k_instr_bcnd_samepage_eq0,
+m88k_instr_bcnd_samepage_ge0,
+NULL,
+m88k_instr_bcnd_samepage_not_maxneg_nor_zero,
+NULL,
+m88k_instr_bcnd_samepage_not_maxneg,
+m88k_instr_bcnd_samepage_maxneg,
+NULL,
+NULL,
+NULL,
+m88k_instr_bcnd_samepage_lt0,
+m88k_instr_bcnd_samepage_ne0,
+m88k_instr_bcnd_samepage_le0,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL,
+NULL };
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_head.c gxemul-0.7.0/src/cpus/tmp_m88k_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_m88k_head.c	2022-10-18 16:37:22.099759300 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES M88K_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH m88k
+#define DYNTRANS_M88K
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N M88K_L2N
+#define DYNTRANS_L3N M88K_L3N
+#if !defined(M88K_L2N) || !defined(M88K_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE m88k_l2_64_table
+#define DYNTRANS_L3_64_TABLE m88k_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC m88k_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE M88K_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT M88K_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE m88k_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY m88k_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR M88K_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY M88K_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE m88k_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE m88k_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS m88k_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC m88k_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS m88k_combine_instructions
+#define DISASSEMBLE m88k_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_m88k_instr.c */
+#define instr(n) m88k_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) m88k32_instr_ ## n
+
+#endif
+
+
+#define X(n) void m88k_instr_ ## n(struct cpu *cpu, \
+ struct m88k_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.m88k.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct m88k_instr_call nothing_call = { instr(nothing), {0,0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_loadstore.c gxemul-0.7.0/src/cpus/tmp_m88k_loadstore.c
--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_loadstore.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_m88k_loadstore.c	2022-10-18 16:37:22.100760000 +0000
@@ -0,0 +1,4250 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_1_le
+#define LS_GENERIC_N m88k_generic_ld_u_1
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le
+#define LS_GENERIC_N m88k_generic_ld_u_2
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le
+#define LS_GENERIC_N m88k_generic_ld_u_4
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le
+#define LS_GENERIC_N m88k_generic_ld_u_8
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_1_le
+#define LS_GENERIC_N m88k_generic_st_1
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le
+#define LS_GENERIC_N m88k_generic_st_2
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le
+#define LS_GENERIC_N m88k_generic_st_4
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le
+#define LS_GENERIC_N m88k_generic_st_8
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_1_le
+#define LS_GENERIC_N m88k_generic_ld_1
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le
+#define LS_GENERIC_N m88k_generic_ld_2
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le
+#define LS_GENERIC_N m88k_generic_ld_4
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le
+#define LS_GENERIC_N m88k_generic_ld_8
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be
+#define LS_GENERIC_N m88k_generic_ld_u_2
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be
+#define LS_GENERIC_N m88k_generic_ld_u_4
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be
+#define LS_GENERIC_N m88k_generic_ld_u_8
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be
+#define LS_GENERIC_N m88k_generic_st_2
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be
+#define LS_GENERIC_N m88k_generic_st_4
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be
+#define LS_GENERIC_N m88k_generic_st_8
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be
+#define LS_GENERIC_N m88k_generic_ld_2
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be
+#define LS_GENERIC_N m88k_generic_ld_4
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be
+#define LS_GENERIC_N m88k_generic_ld_8
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_1_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_1_regofs
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_1_le_regofs
+#define LS_GENERIC_N m88k_generic_st_1_regofs
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_regofs
+#define LS_GENERIC_N m88k_generic_st_2_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_regofs
+#define LS_GENERIC_N m88k_generic_st_4_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_regofs
+#define LS_GENERIC_N m88k_generic_st_8_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_1_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_1_regofs
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_regofs
+#define LS_GENERIC_N m88k_generic_st_2_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_regofs
+#define LS_GENERIC_N m88k_generic_st_4_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_regofs
+#define LS_GENERIC_N m88k_generic_st_8_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_scaled_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_1_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_1_usr_regofs
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_1_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_1_usr_regofs
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_2_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_4_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_8_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_1_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_1_usr_regofs
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_2_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_4_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_8_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_scaled_usr_regofs
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_1_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_1_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_1_le_nopcsync
+#define LS_GENERIC_N m88k_generic_st_1_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_1_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_1_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_1_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_1_regofs_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_1_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_1_regofs_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_1_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_1_regofs_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_scaled_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_scaled_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_scaled_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_scaled_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_1_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_1_usr_regofs_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_1_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_1_usr_regofs_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_1_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_1_usr_regofs_nopcsync
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_le_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_2_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_2_scaled_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_4_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_4_scaled_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_u_8_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_u_8_scaled_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_STORE
+#define LS_N m88k_instr_st_2_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_2_scaled_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_4_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_4_scaled_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_STORE
+#define LS_N m88k_instr_st_8_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_st_8_scaled_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#define LS_LOAD
+#define LS_N m88k_instr_ld_2_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_2_scaled_usr_regofs_nopcsync
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_4_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_4_scaled_usr_regofs_nopcsync
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#define LS_LOAD
+#define LS_N m88k_instr_ld_8_be_scaled_usr_regofs_nopcsync
+#define LS_GENERIC_N m88k_generic_ld_8_scaled_usr_regofs_nopcsync
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#define LS_SCALED
+#define LS_USR
+#define LS_REGOFS
+#define LS_NO_PC_SYNC
+#include "cpu_m88k_instr_loadstore.c"
+#undef LS_NO_PC_SYNC
+#undef LS_REGOFS
+#undef LS_USR
+#undef LS_SCALED
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+
+
+void (*m88k_loadstore[512])(struct cpu *, struct m88k_instr_call *) = {
+	m88k_instr_ld_u_1_le,
+	m88k_instr_ld_u_2_le,
+	m88k_instr_ld_u_4_le,
+	m88k_instr_ld_u_8_le,
+	m88k_instr_st_1_le,
+	m88k_instr_st_2_le,
+	m88k_instr_st_4_le,
+	m88k_instr_st_8_le,
+	m88k_instr_ld_1_le,
+	m88k_instr_ld_2_le,
+	m88k_instr_ld_4_le,
+	m88k_instr_ld_8_le,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le,
+	m88k_instr_ld_u_2_be,
+	m88k_instr_ld_u_4_be,
+	m88k_instr_ld_u_8_be,
+	m88k_instr_st_1_le,
+	m88k_instr_st_2_be,
+	m88k_instr_st_4_be,
+	m88k_instr_st_8_be,
+	m88k_instr_ld_1_le,
+	m88k_instr_ld_2_be,
+	m88k_instr_ld_4_be,
+	m88k_instr_ld_8_be,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_regofs,
+	m88k_instr_ld_u_2_le_regofs,
+	m88k_instr_ld_u_4_le_regofs,
+	m88k_instr_ld_u_8_le_regofs,
+	m88k_instr_st_1_le_regofs,
+	m88k_instr_st_2_le_regofs,
+	m88k_instr_st_4_le_regofs,
+	m88k_instr_st_8_le_regofs,
+	m88k_instr_ld_1_le_regofs,
+	m88k_instr_ld_2_le_regofs,
+	m88k_instr_ld_4_le_regofs,
+	m88k_instr_ld_8_le_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_regofs,
+	m88k_instr_ld_u_2_be_regofs,
+	m88k_instr_ld_u_4_be_regofs,
+	m88k_instr_ld_u_8_be_regofs,
+	m88k_instr_st_1_le_regofs,
+	m88k_instr_st_2_be_regofs,
+	m88k_instr_st_4_be_regofs,
+	m88k_instr_st_8_be_regofs,
+	m88k_instr_ld_1_le_regofs,
+	m88k_instr_ld_2_be_regofs,
+	m88k_instr_ld_4_be_regofs,
+	m88k_instr_ld_8_be_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_le_scaled_regofs,
+	m88k_instr_ld_u_4_le_scaled_regofs,
+	m88k_instr_ld_u_8_le_scaled_regofs,
+	NULL,
+	m88k_instr_st_2_le_scaled_regofs,
+	m88k_instr_st_4_le_scaled_regofs,
+	m88k_instr_st_8_le_scaled_regofs,
+	NULL,
+	m88k_instr_ld_2_le_scaled_regofs,
+	m88k_instr_ld_4_le_scaled_regofs,
+	m88k_instr_ld_8_le_scaled_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_be_scaled_regofs,
+	m88k_instr_ld_u_4_be_scaled_regofs,
+	m88k_instr_ld_u_8_be_scaled_regofs,
+	NULL,
+	m88k_instr_st_2_be_scaled_regofs,
+	m88k_instr_st_4_be_scaled_regofs,
+	m88k_instr_st_8_be_scaled_regofs,
+	NULL,
+	m88k_instr_ld_2_be_scaled_regofs,
+	m88k_instr_ld_4_be_scaled_regofs,
+	m88k_instr_ld_8_be_scaled_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_usr_regofs,
+	m88k_instr_ld_u_2_le_usr_regofs,
+	m88k_instr_ld_u_4_le_usr_regofs,
+	m88k_instr_ld_u_8_le_usr_regofs,
+	m88k_instr_st_1_le_usr_regofs,
+	m88k_instr_st_2_le_usr_regofs,
+	m88k_instr_st_4_le_usr_regofs,
+	m88k_instr_st_8_le_usr_regofs,
+	m88k_instr_ld_1_le_usr_regofs,
+	m88k_instr_ld_2_le_usr_regofs,
+	m88k_instr_ld_4_le_usr_regofs,
+	m88k_instr_ld_8_le_usr_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_usr_regofs,
+	m88k_instr_ld_u_2_be_usr_regofs,
+	m88k_instr_ld_u_4_be_usr_regofs,
+	m88k_instr_ld_u_8_be_usr_regofs,
+	m88k_instr_st_1_le_usr_regofs,
+	m88k_instr_st_2_be_usr_regofs,
+	m88k_instr_st_4_be_usr_regofs,
+	m88k_instr_st_8_be_usr_regofs,
+	m88k_instr_ld_1_le_usr_regofs,
+	m88k_instr_ld_2_be_usr_regofs,
+	m88k_instr_ld_4_be_usr_regofs,
+	m88k_instr_ld_8_be_usr_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_le_scaled_usr_regofs,
+	m88k_instr_ld_u_4_le_scaled_usr_regofs,
+	m88k_instr_ld_u_8_le_scaled_usr_regofs,
+	NULL,
+	m88k_instr_st_2_le_scaled_usr_regofs,
+	m88k_instr_st_4_le_scaled_usr_regofs,
+	m88k_instr_st_8_le_scaled_usr_regofs,
+	NULL,
+	m88k_instr_ld_2_le_scaled_usr_regofs,
+	m88k_instr_ld_4_le_scaled_usr_regofs,
+	m88k_instr_ld_8_le_scaled_usr_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_be_scaled_usr_regofs,
+	m88k_instr_ld_u_4_be_scaled_usr_regofs,
+	m88k_instr_ld_u_8_be_scaled_usr_regofs,
+	NULL,
+	m88k_instr_st_2_be_scaled_usr_regofs,
+	m88k_instr_st_4_be_scaled_usr_regofs,
+	m88k_instr_st_8_be_scaled_usr_regofs,
+	NULL,
+	m88k_instr_ld_2_be_scaled_usr_regofs,
+	m88k_instr_ld_4_be_scaled_usr_regofs,
+	m88k_instr_ld_8_be_scaled_usr_regofs,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_nopcsync,
+	m88k_instr_ld_u_2_le_nopcsync,
+	m88k_instr_ld_u_4_le_nopcsync,
+	m88k_instr_ld_u_8_le_nopcsync,
+	m88k_instr_st_1_le_nopcsync,
+	m88k_instr_st_2_le_nopcsync,
+	m88k_instr_st_4_le_nopcsync,
+	m88k_instr_st_8_le_nopcsync,
+	m88k_instr_ld_1_le_nopcsync,
+	m88k_instr_ld_2_le_nopcsync,
+	m88k_instr_ld_4_le_nopcsync,
+	m88k_instr_ld_8_le_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_nopcsync,
+	m88k_instr_ld_u_2_be_nopcsync,
+	m88k_instr_ld_u_4_be_nopcsync,
+	m88k_instr_ld_u_8_be_nopcsync,
+	m88k_instr_st_1_le_nopcsync,
+	m88k_instr_st_2_be_nopcsync,
+	m88k_instr_st_4_be_nopcsync,
+	m88k_instr_st_8_be_nopcsync,
+	m88k_instr_ld_1_le_nopcsync,
+	m88k_instr_ld_2_be_nopcsync,
+	m88k_instr_ld_4_be_nopcsync,
+	m88k_instr_ld_8_be_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_regofs_nopcsync,
+	m88k_instr_ld_u_2_le_regofs_nopcsync,
+	m88k_instr_ld_u_4_le_regofs_nopcsync,
+	m88k_instr_ld_u_8_le_regofs_nopcsync,
+	m88k_instr_st_1_le_regofs_nopcsync,
+	m88k_instr_st_2_le_regofs_nopcsync,
+	m88k_instr_st_4_le_regofs_nopcsync,
+	m88k_instr_st_8_le_regofs_nopcsync,
+	m88k_instr_ld_1_le_regofs_nopcsync,
+	m88k_instr_ld_2_le_regofs_nopcsync,
+	m88k_instr_ld_4_le_regofs_nopcsync,
+	m88k_instr_ld_8_le_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_regofs_nopcsync,
+	m88k_instr_ld_u_2_be_regofs_nopcsync,
+	m88k_instr_ld_u_4_be_regofs_nopcsync,
+	m88k_instr_ld_u_8_be_regofs_nopcsync,
+	m88k_instr_st_1_le_regofs_nopcsync,
+	m88k_instr_st_2_be_regofs_nopcsync,
+	m88k_instr_st_4_be_regofs_nopcsync,
+	m88k_instr_st_8_be_regofs_nopcsync,
+	m88k_instr_ld_1_le_regofs_nopcsync,
+	m88k_instr_ld_2_be_regofs_nopcsync,
+	m88k_instr_ld_4_be_regofs_nopcsync,
+	m88k_instr_ld_8_be_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_le_scaled_regofs_nopcsync,
+	m88k_instr_ld_u_4_le_scaled_regofs_nopcsync,
+	m88k_instr_ld_u_8_le_scaled_regofs_nopcsync,
+	NULL,
+	m88k_instr_st_2_le_scaled_regofs_nopcsync,
+	m88k_instr_st_4_le_scaled_regofs_nopcsync,
+	m88k_instr_st_8_le_scaled_regofs_nopcsync,
+	NULL,
+	m88k_instr_ld_2_le_scaled_regofs_nopcsync,
+	m88k_instr_ld_4_le_scaled_regofs_nopcsync,
+	m88k_instr_ld_8_le_scaled_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_be_scaled_regofs_nopcsync,
+	m88k_instr_ld_u_4_be_scaled_regofs_nopcsync,
+	m88k_instr_ld_u_8_be_scaled_regofs_nopcsync,
+	NULL,
+	m88k_instr_st_2_be_scaled_regofs_nopcsync,
+	m88k_instr_st_4_be_scaled_regofs_nopcsync,
+	m88k_instr_st_8_be_scaled_regofs_nopcsync,
+	NULL,
+	m88k_instr_ld_2_be_scaled_regofs_nopcsync,
+	m88k_instr_ld_4_be_scaled_regofs_nopcsync,
+	m88k_instr_ld_8_be_scaled_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_usr_regofs_nopcsync,
+	m88k_instr_ld_u_2_le_usr_regofs_nopcsync,
+	m88k_instr_ld_u_4_le_usr_regofs_nopcsync,
+	m88k_instr_ld_u_8_le_usr_regofs_nopcsync,
+	m88k_instr_st_1_le_usr_regofs_nopcsync,
+	m88k_instr_st_2_le_usr_regofs_nopcsync,
+	m88k_instr_st_4_le_usr_regofs_nopcsync,
+	m88k_instr_st_8_le_usr_regofs_nopcsync,
+	m88k_instr_ld_1_le_usr_regofs_nopcsync,
+	m88k_instr_ld_2_le_usr_regofs_nopcsync,
+	m88k_instr_ld_4_le_usr_regofs_nopcsync,
+	m88k_instr_ld_8_le_usr_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_1_le_usr_regofs_nopcsync,
+	m88k_instr_ld_u_2_be_usr_regofs_nopcsync,
+	m88k_instr_ld_u_4_be_usr_regofs_nopcsync,
+	m88k_instr_ld_u_8_be_usr_regofs_nopcsync,
+	m88k_instr_st_1_le_usr_regofs_nopcsync,
+	m88k_instr_st_2_be_usr_regofs_nopcsync,
+	m88k_instr_st_4_be_usr_regofs_nopcsync,
+	m88k_instr_st_8_be_usr_regofs_nopcsync,
+	m88k_instr_ld_1_le_usr_regofs_nopcsync,
+	m88k_instr_ld_2_be_usr_regofs_nopcsync,
+	m88k_instr_ld_4_be_usr_regofs_nopcsync,
+	m88k_instr_ld_8_be_usr_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_le_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_u_4_le_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_u_8_le_scaled_usr_regofs_nopcsync,
+	NULL,
+	m88k_instr_st_2_le_scaled_usr_regofs_nopcsync,
+	m88k_instr_st_4_le_scaled_usr_regofs_nopcsync,
+	m88k_instr_st_8_le_scaled_usr_regofs_nopcsync,
+	NULL,
+	m88k_instr_ld_2_le_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_4_le_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_8_le_scaled_usr_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	NULL,
+	m88k_instr_ld_u_2_be_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_u_4_be_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_u_8_be_scaled_usr_regofs_nopcsync,
+	NULL,
+	m88k_instr_st_2_be_scaled_usr_regofs_nopcsync,
+	m88k_instr_st_4_be_scaled_usr_regofs_nopcsync,
+	m88k_instr_st_8_be_scaled_usr_regofs_nopcsync,
+	NULL,
+	m88k_instr_ld_2_be_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_4_be_scaled_usr_regofs_nopcsync,
+	m88k_instr_ld_8_be_scaled_usr_regofs_nopcsync,
+	NULL,
+	NULL,
+	NULL,
+	NULL };
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_m88k_tail.c gxemul-0.7.0/src/cpus/tmp_m88k_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_m88k_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_m88k_tail.c	2022-10-18 16:37:22.102762000 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF m88k_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES m88k_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF m88k_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC m88k_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE m88k_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE m88k_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW m88k_memory_rw
+#define MEM_M88K
+#include "memory_rw.c"
+#undef MEM_M88K
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC m88k_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC m88k_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS m88k_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) m88k_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_m88k_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF m88k_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS m88k32_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void m88k32_instr_ ## n(struct cpu *cpu, \
+	struct m88k_instr_call *ic)
+#define instr(n) m88k32_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY m88k32_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC m88k32_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE m88k32_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE m88k32_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC m88k32_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC m88k32_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS m88k32_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) m88k32_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_m88k_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS m88k_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 m88k32_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF m88k32_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(m88k,"M88K")
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_head.c gxemul-0.7.0/src/cpus/tmp_mips_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_mips_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_mips_head.c	2022-10-18 16:37:22.102762000 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES MIPS_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH mips
+#define DYNTRANS_MIPS
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N MIPS_L2N
+#define DYNTRANS_L3N MIPS_L3N
+#if !defined(MIPS_L2N) || !defined(MIPS_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE mips_l2_64_table
+#define DYNTRANS_L3_64_TABLE mips_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC mips_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE MIPS_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT MIPS_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE mips_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY mips_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR MIPS_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY MIPS_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE mips_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE mips_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS mips_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC mips_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS mips_combine_instructions
+#define DISASSEMBLE mips_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_mips_instr.c */
+#define instr(n) mips_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) mips32_instr_ ## n
+
+#endif
+
+
+#define X(n) void mips_instr_ ## n(struct cpu *cpu, \
+ struct mips_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.mips.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct mips_instr_call nothing_call = { instr(nothing), {0,0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore.c gxemul-0.7.0/src/cpus/tmp_mips_loadstore.c
--- gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_mips_loadstore.c	2022-10-18 16:37:22.103762900 +0000
@@ -0,0 +1,825 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_lu1_le
+#define LS_GENERIC_N mips_generic_lu1
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_l1_le
+#define LS_GENERIC_N mips_generic_l1
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_lu2_le
+#define LS_GENERIC_N mips_generic_lu2
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_l2_le
+#define LS_GENERIC_N mips_generic_l2
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_lu4_le
+#define LS_GENERIC_N mips_generic_lu4
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_l4_le
+#define LS_GENERIC_N mips_generic_l4
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_lu8_le
+#define LS_GENERIC_N mips_generic_lu8
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_l8_le
+#define LS_GENERIC_N mips_generic_l8
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_STORE
+#define LS_N mips_instr_s1_le
+#define LS_GENERIC_N mips_generic_s1
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifndef MODE32
+#define LS_STORE
+#define LS_N mips_instr_s2_le
+#define LS_GENERIC_N mips_generic_s2
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifndef MODE32
+#define LS_STORE
+#define LS_N mips_instr_s4_le
+#define LS_GENERIC_N mips_generic_s4
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifndef MODE32
+#define LS_STORE
+#define LS_N mips_instr_s8_le
+#define LS_GENERIC_N mips_generic_s8
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_lu2_be
+#define LS_GENERIC_N mips_generic_lu2
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_l2_be
+#define LS_GENERIC_N mips_generic_l2
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_lu4_be
+#define LS_GENERIC_N mips_generic_lu4
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_l4_be
+#define LS_GENERIC_N mips_generic_l4
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_lu8_be
+#define LS_GENERIC_N mips_generic_lu8
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_LOAD
+#define LS_N mips_instr_l8_be
+#define LS_GENERIC_N mips_generic_l8
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifndef MODE32
+#define LS_STORE
+#define LS_N mips_instr_s2_be
+#define LS_GENERIC_N mips_generic_s2
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifndef MODE32
+#define LS_STORE
+#define LS_N mips_instr_s4_be
+#define LS_GENERIC_N mips_generic_s4
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifndef MODE32
+#define LS_STORE
+#define LS_N mips_instr_s8_be
+#define LS_GENERIC_N mips_generic_s8
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_lu1_le
+#define LS_GENERIC_N mips32_generic_lu1
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_l1_le
+#define LS_GENERIC_N mips32_generic_l1
+#define LS_1
+#define LS_SIZE 1
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_lu2_le
+#define LS_GENERIC_N mips32_generic_lu2
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_l2_le
+#define LS_GENERIC_N mips32_generic_l2
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_lu4_le
+#define LS_GENERIC_N mips32_generic_lu4
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_l4_le
+#define LS_GENERIC_N mips32_generic_l4
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_lu8_le
+#define LS_GENERIC_N mips32_generic_lu8
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_l8_le
+#define LS_GENERIC_N mips32_generic_l8
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_STORE
+#define LS_N mips32_instr_s1_le
+#define LS_GENERIC_N mips32_generic_s1
+#define LS_1
+#define LS_SIZE 1
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_1
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifdef MODE32
+#define LS_STORE
+#define LS_N mips32_instr_s2_le
+#define LS_GENERIC_N mips32_generic_s2
+#define LS_2
+#define LS_SIZE 2
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifdef MODE32
+#define LS_STORE
+#define LS_N mips32_instr_s4_le
+#define LS_GENERIC_N mips32_generic_s4
+#define LS_4
+#define LS_SIZE 4
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifdef MODE32
+#define LS_STORE
+#define LS_N mips32_instr_s8_le
+#define LS_GENERIC_N mips32_generic_s8
+#define LS_8
+#define LS_SIZE 8
+#define LS_LE
+#define LS_INCLUDE_GENERIC
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_INCLUDE_GENERIC
+#undef LS_LE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_lu2_be
+#define LS_GENERIC_N mips32_generic_lu2
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_l2_be
+#define LS_GENERIC_N mips32_generic_l2
+#define LS_2
+#define LS_SIZE 2
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_lu4_be
+#define LS_GENERIC_N mips32_generic_lu4
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_l4_be
+#define LS_GENERIC_N mips32_generic_l4
+#define LS_4
+#define LS_SIZE 4
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_lu8_be
+#define LS_GENERIC_N mips32_generic_lu8
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_LOAD
+#define LS_N mips32_instr_l8_be
+#define LS_GENERIC_N mips32_generic_l8
+#define LS_8
+#define LS_SIZE 8
+#define LS_SIGNED
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIGNED
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_LOAD
+#endif
+#ifdef MODE32
+#define LS_STORE
+#define LS_N mips32_instr_s2_be
+#define LS_GENERIC_N mips32_generic_s2
+#define LS_2
+#define LS_SIZE 2
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_2
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifdef MODE32
+#define LS_STORE
+#define LS_N mips32_instr_s4_be
+#define LS_GENERIC_N mips32_generic_s4
+#define LS_4
+#define LS_SIZE 4
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_4
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifdef MODE32
+#define LS_STORE
+#define LS_N mips32_instr_s8_be
+#define LS_GENERIC_N mips32_generic_s8
+#define LS_8
+#define LS_SIZE 8
+#define LS_BE
+#include "cpu_mips_instr_loadstore.c"
+#undef LS_BE
+#undef LS_SIZE
+#undef LS_8
+#undef LS_GENERIC_N
+#undef LS_N
+#undef LS_STORE
+#endif
+#ifndef MODE32
+
+
+void (*mips_loadstore[32])(struct cpu *, struct mips_instr_call *) = {
+	mips_instr_lu1_le,
+	mips_instr_l1_le,
+	mips_instr_lu2_le,
+	mips_instr_l2_le,
+	mips_instr_lu4_le,
+	mips_instr_l4_le,
+	mips_instr_lu8_le,
+	mips_instr_l8_le,
+	mips_instr_s1_le,
+	mips_instr_invalid,
+	mips_instr_s2_le,
+	mips_instr_invalid,
+	mips_instr_s4_le,
+	mips_instr_invalid,
+	mips_instr_s8_le,
+	mips_instr_invalid,
+	mips_instr_lu1_le,
+	mips_instr_l1_le,
+	mips_instr_lu2_be,
+	mips_instr_l2_be,
+	mips_instr_lu4_be,
+	mips_instr_l4_be,
+	mips_instr_lu8_be,
+	mips_instr_l8_be,
+	mips_instr_s1_le,
+	mips_instr_invalid,
+	mips_instr_s2_be,
+	mips_instr_invalid,
+	mips_instr_s4_be,
+	mips_instr_invalid,
+	mips_instr_s8_be,
+	mips_instr_invalid };
+#endif
+#ifdef MODE32
+
+
+void (*mips32_loadstore[32])(struct cpu *, struct mips_instr_call *) = {
+	mips32_instr_lu1_le,
+	mips32_instr_l1_le,
+	mips32_instr_lu2_le,
+	mips32_instr_l2_le,
+	mips32_instr_lu4_le,
+	mips32_instr_l4_le,
+	mips32_instr_lu8_le,
+	mips32_instr_l8_le,
+	mips32_instr_s1_le,
+	mips32_instr_invalid,
+	mips32_instr_s2_le,
+	mips32_instr_invalid,
+	mips32_instr_s4_le,
+	mips32_instr_invalid,
+	mips32_instr_s8_le,
+	mips32_instr_invalid,
+	mips32_instr_lu1_le,
+	mips32_instr_l1_le,
+	mips32_instr_lu2_be,
+	mips32_instr_l2_be,
+	mips32_instr_lu4_be,
+	mips32_instr_l4_be,
+	mips32_instr_lu8_be,
+	mips32_instr_l8_be,
+	mips32_instr_s1_le,
+	mips32_instr_invalid,
+	mips32_instr_s2_be,
+	mips32_instr_invalid,
+	mips32_instr_s4_be,
+	mips32_instr_invalid,
+	mips32_instr_s8_be,
+	mips32_instr_invalid };
+#endif
+#ifndef MODE32
+
+
+void (*mips_loadstore_generic[16])(struct cpu *, struct mips_instr_call *) = {
+	mips_generic_lu1,
+	mips_generic_l1,
+	mips_generic_lu2,
+	mips_generic_l2,
+	mips_generic_lu4,
+	mips_generic_l4,
+	mips_generic_lu8,
+	mips_generic_l8,
+	mips_generic_s1,
+	mips_instr_invalid,
+	mips_generic_s2,
+	mips_instr_invalid,
+	mips_generic_s4,
+	mips_instr_invalid,
+	mips_generic_s8,
+	mips_instr_invalid };
+#endif
+#ifdef MODE32
+
+
+void (*mips32_loadstore_generic[16])(struct cpu *, struct mips_instr_call *) = {
+	mips32_generic_lu1,
+	mips32_generic_l1,
+	mips32_generic_lu2,
+	mips32_generic_l2,
+	mips32_generic_lu4,
+	mips32_generic_l4,
+	mips32_generic_lu8,
+	mips32_generic_l8,
+	mips32_generic_s1,
+	mips32_instr_invalid,
+	mips32_generic_s2,
+	mips32_instr_invalid,
+	mips32_generic_s4,
+	mips32_instr_invalid,
+	mips32_generic_s8,
+	mips32_instr_invalid };
+#endif
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore_multi.c gxemul-0.7.0/src/cpus/tmp_mips_loadstore_multi.c
--- gxemul-0.7.0.orig/src/cpus/tmp_mips_loadstore_multi.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_mips_loadstore_multi.c	2022-10-18 16:37:22.105764600 +0000
@@ -0,0 +1,1267 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#ifdef MODE32
+X(multi_lw_2_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#else
+X(multi_lw_2_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#endif
+
+#ifdef MODE32
+X(multi_lw_3_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#else
+X(multi_lw_3_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#endif
+
+#ifdef MODE32
+X(multi_lw_4_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#else
+X(multi_lw_4_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#endif
+
+#ifdef MODE32
+X(multi_lw_5_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r4 = page[addr4];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	r4 = LE32_TO_HOST(r4);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#else
+X(multi_lw_5_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips_loadstore[5](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r4 = page[addr4];
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	r4 = LE32_TO_HOST(r4);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_2_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#else
+X(multi_sw_2_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_3_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#else
+X(multi_sw_3_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_4_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#else
+X(multi_sw_4_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_5_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r4 = reg(ic[4].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	r4 = LE32_TO_HOST(r4);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	page[addr4] = r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#else
+X(multi_sw_5_le)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips_loadstore[12](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r4 = reg(ic[4].arg[0]);
+	r0 = LE32_TO_HOST(r0);
+	r1 = LE32_TO_HOST(r1);
+	r2 = LE32_TO_HOST(r2);
+	r3 = LE32_TO_HOST(r3);
+	r4 = LE32_TO_HOST(r4);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	page[addr4] = r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#endif
+
+#ifdef MODE32
+X(multi_lw_2_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#else
+X(multi_lw_2_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#endif
+
+#ifdef MODE32
+X(multi_lw_3_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#else
+X(multi_lw_3_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#endif
+
+#ifdef MODE32
+X(multi_lw_4_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#else
+X(multi_lw_4_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#endif
+
+#ifdef MODE32
+X(multi_lw_5_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_load[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r4 = page[addr4];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	r4 = BE32_TO_HOST(r4);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#else
+X(multi_lw_5_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_load[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips_loadstore[21](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = page[addr0];
+	r1 = page[addr1];
+	r2 = page[addr2];
+	r3 = page[addr3];
+	r4 = page[addr4];
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	r4 = BE32_TO_HOST(r4);
+	reg(ic[0].arg[0]) = (MODE_int_t)(int32_t)r0;
+	reg(ic[1].arg[0]) = (MODE_int_t)(int32_t)r1;
+	reg(ic[2].arg[0]) = (MODE_int_t)(int32_t)r2;
+	reg(ic[3].arg[0]) = (MODE_int_t)(int32_t)r3;
+	reg(ic[4].arg[0]) = (MODE_int_t)(int32_t)r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_2_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#else
+X(multi_sw_2_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff)) {
+		mips_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	cpu->n_translated_instrs += 1;
+	cpu->cd.mips.next_ic += 1;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_3_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#else
+X(multi_sw_3_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff)) {
+		mips_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	cpu->n_translated_instrs += 2;
+	cpu->cd.mips.next_ic += 2;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_4_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#else
+X(multi_sw_4_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff)) {
+		mips_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	cpu->n_translated_instrs += 3;
+	cpu->cd.mips.next_ic += 3;
+}
+#endif
+
+#ifdef MODE32
+X(multi_sw_5_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	uint32_t index0 = addr0 >> 12;
+	page = (uint32_t *) cpu->cd.mips.host_store[index0];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips32_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r4 = reg(ic[4].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	r4 = BE32_TO_HOST(r4);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	page[addr4] = r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#else
+X(multi_sw_5_be)
+{
+	uint32_t *page;
+	MODE_uint_t rX = reg(ic[0].arg[1]), r0, r1, r2, r3, r4;
+	MODE_uint_t addr0 = rX + (int32_t)ic[0].arg[2];
+	MODE_uint_t addr1 = rX + (int32_t)ic[1].arg[2];
+	MODE_uint_t addr2 = rX + (int32_t)ic[2].arg[2];
+	MODE_uint_t addr3 = rX + (int32_t)ic[3].arg[2];
+	MODE_uint_t addr4 = rX + (int32_t)ic[4].arg[2];
+	const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
+	const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
+	const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
+	uint32_t x1, x2, x3;
+	struct DYNTRANS_L2_64_TABLE *l2;
+	struct DYNTRANS_L3_64_TABLE *l3;
+	x1 = (addr0 >> (64-DYNTRANS_L1N)) & mask1;
+	x2 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
+	x3 = (addr0 >> (64-DYNTRANS_L1N-DYNTRANS_L2N-DYNTRANS_L3N)) & mask3;
+	l2 = cpu->cd.DYNTRANS_ARCH.l1_64[x1];
+	l3 = l2->l3[x2];
+	page = (uint32_t *) l3->host_store[x3];
+	if (cpu->delay_slot ||
+	    page == NULL || (addr0 & 3) || (addr1 & 3) || (addr2 & 3) || (addr3 & 3) || (addr4 & 3)
+	    || ((addr1 ^ addr0) & ~0xfff) || ((addr2 ^ addr0) & ~0xfff) || ((addr3 ^ addr0) & ~0xfff) || ((addr4 ^ addr0) & ~0xfff)) {
+		mips_loadstore[28](cpu, ic);
+		return;
+	}
+	addr0 = (addr0 >> 2) & 0x3ff;
+	addr1 = (addr1 >> 2) & 0x3ff;
+	addr2 = (addr2 >> 2) & 0x3ff;
+	addr3 = (addr3 >> 2) & 0x3ff;
+	addr4 = (addr4 >> 2) & 0x3ff;
+	r0 = reg(ic[0].arg[0]);
+	r1 = reg(ic[1].arg[0]);
+	r2 = reg(ic[2].arg[0]);
+	r3 = reg(ic[3].arg[0]);
+	r4 = reg(ic[4].arg[0]);
+	r0 = BE32_TO_HOST(r0);
+	r1 = BE32_TO_HOST(r1);
+	r2 = BE32_TO_HOST(r2);
+	r3 = BE32_TO_HOST(r3);
+	r4 = BE32_TO_HOST(r4);
+	page[addr0] = r0;
+	page[addr1] = r1;
+	page[addr2] = r2;
+	page[addr3] = r3;
+	page[addr4] = r4;
+	cpu->n_translated_instrs += 4;
+	cpu->cd.mips.next_ic += 4;
+}
+#endif
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_mips_tail.c gxemul-0.7.0/src/cpus/tmp_mips_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_mips_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_mips_tail.c	2022-10-18 16:37:22.106765500 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF mips_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES mips_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF mips_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC mips_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE mips_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE mips_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW mips_memory_rw
+#define MEM_MIPS
+#include "memory_rw.c"
+#undef MEM_MIPS
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC mips_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC mips_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS mips_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) mips_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_mips_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF mips_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS mips32_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void mips32_instr_ ## n(struct cpu *cpu, \
+	struct mips_instr_call *ic)
+#define instr(n) mips32_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY mips32_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC mips32_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE mips32_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE mips32_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC mips32_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC mips32_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS mips32_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) mips32_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_mips_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS mips_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 mips32_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF mips32_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(mips,"MIPS")
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_ppc_head.c gxemul-0.7.0/src/cpus/tmp_ppc_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_ppc_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_ppc_head.c	2022-10-18 16:37:22.107766300 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES PPC_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH ppc
+#define DYNTRANS_PPC
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N PPC_L2N
+#define DYNTRANS_L3N PPC_L3N
+#if !defined(PPC_L2N) || !defined(PPC_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE ppc_l2_64_table
+#define DYNTRANS_L3_64_TABLE ppc_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC ppc_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE PPC_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT PPC_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE ppc_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY ppc_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR PPC_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY PPC_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE ppc_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE ppc_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS ppc_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC ppc_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS ppc_combine_instructions
+#define DISASSEMBLE ppc_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_ppc_instr.c */
+#define instr(n) ppc_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) ppc32_instr_ ## n
+
+#endif
+
+
+#define X(n) void ppc_instr_ ## n(struct cpu *cpu, \
+ struct ppc_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.ppc.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct ppc_instr_call nothing_call = { instr(nothing), {0,0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_ppc_loadstore.c gxemul-0.7.0/src/cpus/tmp_ppc_loadstore.c
--- gxemul-0.7.0.orig/src/cpus/tmp_ppc_loadstore.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_ppc_loadstore.c	2022-10-18 16:37:22.108767400 +0000
@@ -0,0 +1,2063 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#ifndef MODE32
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_stb
+#define LS_N ppc_instr_stb
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_sth
+#define LS_N ppc_instr_sth
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_stw
+#define LS_N ppc_instr_stw
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_std
+#define LS_N ppc_instr_std
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lba
+#define LS_N ppc_instr_lba
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lha
+#define LS_N ppc_instr_lha
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lwa
+#define LS_N ppc_instr_lwa
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lbz
+#define LS_N ppc_instr_lbz
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lhz
+#define LS_N ppc_instr_lhz
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lwz
+#define LS_N ppc_instr_lwz
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_ldz
+#define LS_N ppc_instr_ld
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_stb
+#define LS_N ppc_instr_stb_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_sth
+#define LS_N ppc_instr_sth_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_stw
+#define LS_N ppc_instr_stw_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_std
+#define LS_N ppc_instr_std_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_lba
+#define LS_N ppc_instr_lba_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_lha
+#define LS_N ppc_instr_lha_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_lwa
+#define LS_N ppc_instr_lwa_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_lbz
+#define LS_N ppc_instr_lbz_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_lhz
+#define LS_N ppc_instr_lhz_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_lwz
+#define LS_N ppc_instr_lwz_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc_generic_ldz
+#define LS_N ppc_instr_ld_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stbu
+#define LS_N ppc_instr_stbu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_sthu
+#define LS_N ppc_instr_sthu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stwu
+#define LS_N ppc_instr_stwu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stdu
+#define LS_N ppc_instr_stdu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lbau
+#define LS_N ppc_instr_lbau
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lhau
+#define LS_N ppc_instr_lhau
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lwau
+#define LS_N ppc_instr_lwau
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lbzu
+#define LS_N ppc_instr_lbzu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lhzu
+#define LS_N ppc_instr_lhzu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lwzu
+#define LS_N ppc_instr_lwzu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_ldzu
+#define LS_N ppc_instr_ldu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stbu
+#define LS_N ppc_instr_stbu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_sthu
+#define LS_N ppc_instr_sthu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stwu
+#define LS_N ppc_instr_stwu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stdu
+#define LS_N ppc_instr_stdu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lbau
+#define LS_N ppc_instr_lbau_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lhau
+#define LS_N ppc_instr_lhau_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lwau
+#define LS_N ppc_instr_lwau_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lbzu
+#define LS_N ppc_instr_lbzu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lhzu
+#define LS_N ppc_instr_lhzu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lwzu
+#define LS_N ppc_instr_lwzu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_ldzu
+#define LS_N ppc_instr_ldu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_INDEXED
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_stbx
+#define LS_N ppc_instr_stbx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_sthx
+#define LS_N ppc_instr_sthx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_stwx
+#define LS_N ppc_instr_stwx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_GENERIC_N ppc_generic_stdx
+#define LS_N ppc_instr_stdx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lbax
+#define LS_N ppc_instr_lbax
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lhax
+#define LS_N ppc_instr_lhax
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lwax
+#define LS_N ppc_instr_lwax
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lbzx
+#define LS_N ppc_instr_lbzx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lhzx
+#define LS_N ppc_instr_lhzx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_lwzx
+#define LS_N ppc_instr_lwzx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc_generic_ldzx
+#define LS_N ppc_instr_ldx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stbux
+#define LS_N ppc_instr_stbux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_sthux
+#define LS_N ppc_instr_sthux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stwux
+#define LS_N ppc_instr_stwux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_stdux
+#define LS_N ppc_instr_stdux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lbaux
+#define LS_N ppc_instr_lbaux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lhaux
+#define LS_N ppc_instr_lhaux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lwaux
+#define LS_N ppc_instr_lwaux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lbzux
+#define LS_N ppc_instr_lbzux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lhzux
+#define LS_N ppc_instr_lhzux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_lwzux
+#define LS_N ppc_instr_lwzux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc_generic_ldzux
+#define LS_N ppc_instr_ldux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_INDEXED
+
+
+void (*ppc_loadstore[64])(struct cpu *, struct ppc_instr_call *) = {
+	ppc_instr_stb,
+	ppc_instr_sth,
+	ppc_instr_stw,
+	ppc_instr_std,
+	ppc_instr_stb,
+	ppc_instr_sth,
+	ppc_instr_stw,
+	ppc_instr_std,
+	ppc_instr_lba,
+	ppc_instr_lha,
+	ppc_instr_lwa,
+	ppc_instr_invalid,
+	ppc_instr_lbz,
+	ppc_instr_lhz,
+	ppc_instr_lwz,
+	ppc_instr_ld,
+	ppc_instr_stb_0,
+	ppc_instr_sth_0,
+	ppc_instr_stw_0,
+	ppc_instr_std_0,
+	ppc_instr_stb_0,
+	ppc_instr_sth_0,
+	ppc_instr_stw_0,
+	ppc_instr_std_0,
+	ppc_instr_lba_0,
+	ppc_instr_lha_0,
+	ppc_instr_lwa_0,
+	ppc_instr_invalid,
+	ppc_instr_lbz_0,
+	ppc_instr_lhz_0,
+	ppc_instr_lwz_0,
+	ppc_instr_ld_0,
+	ppc_instr_stbu,
+	ppc_instr_sthu,
+	ppc_instr_stwu,
+	ppc_instr_stdu,
+	ppc_instr_stbu,
+	ppc_instr_sthu,
+	ppc_instr_stwu,
+	ppc_instr_stdu,
+	ppc_instr_lbau,
+	ppc_instr_lhau,
+	ppc_instr_lwau,
+	ppc_instr_invalid,
+	ppc_instr_lbzu,
+	ppc_instr_lhzu,
+	ppc_instr_lwzu,
+	ppc_instr_ldu,
+	ppc_instr_stbu_0,
+	ppc_instr_sthu_0,
+	ppc_instr_stwu_0,
+	ppc_instr_stdu_0,
+	ppc_instr_stbu_0,
+	ppc_instr_sthu_0,
+	ppc_instr_stwu_0,
+	ppc_instr_stdu_0,
+	ppc_instr_lbau_0,
+	ppc_instr_lhau_0,
+	ppc_instr_lwau_0,
+	ppc_instr_invalid,
+	ppc_instr_lbzu_0,
+	ppc_instr_lhzu_0,
+	ppc_instr_lwzu_0,
+	ppc_instr_ldu_0
+};
+
+
+
+void (*ppc_loadstore_indexed[32])(struct cpu *, struct ppc_instr_call *) = {
+	ppc_instr_stbx,
+	ppc_instr_sthx,
+	ppc_instr_stwx,
+	ppc_instr_stdx,
+	ppc_instr_stbx,
+	ppc_instr_sthx,
+	ppc_instr_stwx,
+	ppc_instr_stdx,
+	ppc_instr_lbax,
+	ppc_instr_lhax,
+	ppc_instr_lwax,
+	ppc_instr_invalid,
+	ppc_instr_lbzx,
+	ppc_instr_lhzx,
+	ppc_instr_lwzx,
+	ppc_instr_ldx,
+	ppc_instr_stbux,
+	ppc_instr_sthux,
+	ppc_instr_stwux,
+	ppc_instr_stdux,
+	ppc_instr_stbux,
+	ppc_instr_sthux,
+	ppc_instr_stwux,
+	ppc_instr_stdux,
+	ppc_instr_lbaux,
+	ppc_instr_lhaux,
+	ppc_instr_lwaux,
+	ppc_instr_invalid,
+	ppc_instr_lbzux,
+	ppc_instr_lhzux,
+	ppc_instr_lwzux,
+	ppc_instr_ldux
+};
+
+#define LS_BYTEREVERSE
+#define LS_INDEXED
+#define LS_SIZE 2
+#define LS_H
+#define LS_GENERIC_N ppc_generic_lhbrx
+#define LS_N ppc_instr_lhbrx
+#define LS_LOAD
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_LOAD
+#undef LS_N
+#undef LS_GENERIC_N
+#define LS_GENERIC_N ppc_generic_sthbrx
+#define LS_N ppc_instr_sthbrx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#define LS_SIZE 4
+#define LS_W
+#define LS_GENERIC_N ppc_generic_lwbrx
+#define LS_N ppc_instr_lwbrx
+#define LS_LOAD
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_LOAD
+#undef LS_N
+#undef LS_GENERIC_N
+#define LS_GENERIC_N ppc_generic_stwbrx
+#define LS_N ppc_instr_stwbrx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_INDEXED
+#undef LS_BYTEREVERSE
+#endif
+#ifdef MODE32
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_stb
+#define LS_N ppc32_instr_stb
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_sth
+#define LS_N ppc32_instr_sth
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_stw
+#define LS_N ppc32_instr_stw
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_std
+#define LS_N ppc32_instr_std
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lba
+#define LS_N ppc32_instr_lba
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lha
+#define LS_N ppc32_instr_lha
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lwa
+#define LS_N ppc32_instr_lwa
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lbz
+#define LS_N ppc32_instr_lbz
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lhz
+#define LS_N ppc32_instr_lhz
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lwz
+#define LS_N ppc32_instr_lwz
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_ldz
+#define LS_N ppc32_instr_ld
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_stb
+#define LS_N ppc32_instr_stb_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_sth
+#define LS_N ppc32_instr_sth_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_stw
+#define LS_N ppc32_instr_stw_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_std
+#define LS_N ppc32_instr_std_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_lba
+#define LS_N ppc32_instr_lba_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_lha
+#define LS_N ppc32_instr_lha_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_lwa
+#define LS_N ppc32_instr_lwa_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_lbz
+#define LS_N ppc32_instr_lbz_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_lhz
+#define LS_N ppc32_instr_lhz_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_lwz
+#define LS_N ppc32_instr_lwz_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_GENERIC_N ppc32_generic_ldz
+#define LS_N ppc32_instr_ld_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stbu
+#define LS_N ppc32_instr_stbu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_sthu
+#define LS_N ppc32_instr_sthu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stwu
+#define LS_N ppc32_instr_stwu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stdu
+#define LS_N ppc32_instr_stdu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lbau
+#define LS_N ppc32_instr_lbau
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lhau
+#define LS_N ppc32_instr_lhau
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lwau
+#define LS_N ppc32_instr_lwau
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lbzu
+#define LS_N ppc32_instr_lbzu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lhzu
+#define LS_N ppc32_instr_lhzu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lwzu
+#define LS_N ppc32_instr_lwzu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_ldzu
+#define LS_N ppc32_instr_ldu
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stbu
+#define LS_N ppc32_instr_stbu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_sthu
+#define LS_N ppc32_instr_sthu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stwu
+#define LS_N ppc32_instr_stwu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stdu
+#define LS_N ppc32_instr_stdu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lbau
+#define LS_N ppc32_instr_lbau_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lhau
+#define LS_N ppc32_instr_lhau_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lwau
+#define LS_N ppc32_instr_lwau_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_IGNOREOFS
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lbzu
+#define LS_N ppc32_instr_lbzu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lhzu
+#define LS_N ppc32_instr_lhzu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lwzu
+#define LS_N ppc32_instr_lwzu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_IGNOREOFS
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_ldzu
+#define LS_N ppc32_instr_ldu_0
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_IGNOREOFS
+#define LS_INDEXED
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_stbx
+#define LS_N ppc32_instr_stbx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_sthx
+#define LS_N ppc32_instr_sthx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_stwx
+#define LS_N ppc32_instr_stwx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_GENERIC_N ppc32_generic_stdx
+#define LS_N ppc32_instr_stdx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lbax
+#define LS_N ppc32_instr_lbax
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lhax
+#define LS_N ppc32_instr_lhax
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lwax
+#define LS_N ppc32_instr_lwax
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lbzx
+#define LS_N ppc32_instr_lbzx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lhzx
+#define LS_N ppc32_instr_lhzx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_lwzx
+#define LS_N ppc32_instr_lwzx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_GENERIC_N ppc32_generic_ldzx
+#define LS_N ppc32_instr_ldx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stbux
+#define LS_N ppc32_instr_stbux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_sthux
+#define LS_N ppc32_instr_sthux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stwux
+#define LS_N ppc32_instr_stwux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_stdux
+#define LS_N ppc32_instr_stdux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_B
+#define LS_SIZE 1
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lbaux
+#define LS_N ppc32_instr_lbaux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_H
+#define LS_SIZE 2
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lhaux
+#define LS_N ppc32_instr_lhaux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_W
+#define LS_SIZE 4
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lwaux
+#define LS_N ppc32_instr_lwaux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#define LS_B
+#define LS_SIZE 1
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lbzux
+#define LS_N ppc32_instr_lbzux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_B
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_H
+#define LS_SIZE 2
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lhzux
+#define LS_N ppc32_instr_lhzux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_W
+#define LS_SIZE 4
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_lwzux
+#define LS_N ppc32_instr_lwzux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#define LS_D
+#define LS_SIZE 8
+#define LS_ZERO
+#define LS_LOAD
+#define LS_UPDATE
+#define LS_GENERIC_N ppc32_generic_ldzux
+#define LS_N ppc32_instr_ldux
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_D
+#undef LS_SIZE
+#undef LS_LOAD
+#undef LS_UPDATE
+#undef LS_ZERO
+#undef LS_INDEXED
+
+
+void (*ppc32_loadstore[64])(struct cpu *, struct ppc_instr_call *) = {
+	ppc32_instr_stb,
+	ppc32_instr_sth,
+	ppc32_instr_stw,
+	ppc32_instr_std,
+	ppc32_instr_stb,
+	ppc32_instr_sth,
+	ppc32_instr_stw,
+	ppc32_instr_std,
+	ppc32_instr_lba,
+	ppc32_instr_lha,
+	ppc32_instr_lwa,
+	ppc32_instr_invalid,
+	ppc32_instr_lbz,
+	ppc32_instr_lhz,
+	ppc32_instr_lwz,
+	ppc32_instr_ld,
+	ppc32_instr_stb_0,
+	ppc32_instr_sth_0,
+	ppc32_instr_stw_0,
+	ppc32_instr_std_0,
+	ppc32_instr_stb_0,
+	ppc32_instr_sth_0,
+	ppc32_instr_stw_0,
+	ppc32_instr_std_0,
+	ppc32_instr_lba_0,
+	ppc32_instr_lha_0,
+	ppc32_instr_lwa_0,
+	ppc32_instr_invalid,
+	ppc32_instr_lbz_0,
+	ppc32_instr_lhz_0,
+	ppc32_instr_lwz_0,
+	ppc32_instr_ld_0,
+	ppc32_instr_stbu,
+	ppc32_instr_sthu,
+	ppc32_instr_stwu,
+	ppc32_instr_stdu,
+	ppc32_instr_stbu,
+	ppc32_instr_sthu,
+	ppc32_instr_stwu,
+	ppc32_instr_stdu,
+	ppc32_instr_lbau,
+	ppc32_instr_lhau,
+	ppc32_instr_lwau,
+	ppc32_instr_invalid,
+	ppc32_instr_lbzu,
+	ppc32_instr_lhzu,
+	ppc32_instr_lwzu,
+	ppc32_instr_ldu,
+	ppc32_instr_stbu_0,
+	ppc32_instr_sthu_0,
+	ppc32_instr_stwu_0,
+	ppc32_instr_stdu_0,
+	ppc32_instr_stbu_0,
+	ppc32_instr_sthu_0,
+	ppc32_instr_stwu_0,
+	ppc32_instr_stdu_0,
+	ppc32_instr_lbau_0,
+	ppc32_instr_lhau_0,
+	ppc32_instr_lwau_0,
+	ppc32_instr_invalid,
+	ppc32_instr_lbzu_0,
+	ppc32_instr_lhzu_0,
+	ppc32_instr_lwzu_0,
+	ppc32_instr_ldu_0
+};
+
+
+
+void (*ppc32_loadstore_indexed[32])(struct cpu *, struct ppc_instr_call *) = {
+	ppc32_instr_stbx,
+	ppc32_instr_sthx,
+	ppc32_instr_stwx,
+	ppc32_instr_stdx,
+	ppc32_instr_stbx,
+	ppc32_instr_sthx,
+	ppc32_instr_stwx,
+	ppc32_instr_stdx,
+	ppc32_instr_lbax,
+	ppc32_instr_lhax,
+	ppc32_instr_lwax,
+	ppc32_instr_invalid,
+	ppc32_instr_lbzx,
+	ppc32_instr_lhzx,
+	ppc32_instr_lwzx,
+	ppc32_instr_ldx,
+	ppc32_instr_stbux,
+	ppc32_instr_sthux,
+	ppc32_instr_stwux,
+	ppc32_instr_stdux,
+	ppc32_instr_stbux,
+	ppc32_instr_sthux,
+	ppc32_instr_stwux,
+	ppc32_instr_stdux,
+	ppc32_instr_lbaux,
+	ppc32_instr_lhaux,
+	ppc32_instr_lwaux,
+	ppc32_instr_invalid,
+	ppc32_instr_lbzux,
+	ppc32_instr_lhzux,
+	ppc32_instr_lwzux,
+	ppc32_instr_ldux
+};
+
+#define LS_BYTEREVERSE
+#define LS_INDEXED
+#define LS_SIZE 2
+#define LS_H
+#define LS_GENERIC_N ppc32_generic_lhbrx
+#define LS_N ppc32_instr_lhbrx
+#define LS_LOAD
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_LOAD
+#undef LS_N
+#undef LS_GENERIC_N
+#define LS_GENERIC_N ppc32_generic_sthbrx
+#define LS_N ppc32_instr_sthbrx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_H
+#undef LS_SIZE
+#define LS_SIZE 4
+#define LS_W
+#define LS_GENERIC_N ppc32_generic_lwbrx
+#define LS_N ppc32_instr_lwbrx
+#define LS_LOAD
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_LOAD
+#undef LS_N
+#undef LS_GENERIC_N
+#define LS_GENERIC_N ppc32_generic_stwbrx
+#define LS_N ppc32_instr_stwbrx
+#include "cpu_ppc_instr_loadstore.c"
+#undef LS_N
+#undef LS_GENERIC_N
+#undef LS_W
+#undef LS_SIZE
+#undef LS_INDEXED
+#undef LS_BYTEREVERSE
+#endif
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_ppc_tail.c gxemul-0.7.0/src/cpus/tmp_ppc_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_ppc_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_ppc_tail.c	2022-10-18 16:37:22.108767400 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF ppc_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES ppc_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF ppc_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC ppc_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE ppc_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE ppc_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW ppc_memory_rw
+#define MEM_PPC
+#include "memory_rw.c"
+#undef MEM_PPC
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC ppc_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC ppc_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS ppc_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) ppc_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_ppc_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF ppc_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS ppc32_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void ppc32_instr_ ## n(struct cpu *cpu, \
+	struct ppc_instr_call *ic)
+#define instr(n) ppc32_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY ppc32_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC ppc32_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE ppc32_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE ppc32_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC ppc32_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC ppc32_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS ppc32_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) ppc32_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_ppc_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS ppc_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 ppc32_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF ppc32_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(ppc,"PPC")
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_riscv_head.c gxemul-0.7.0/src/cpus/tmp_riscv_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_riscv_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_riscv_head.c	2022-10-18 16:37:22.109768200 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES RISCV_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH riscv
+#define DYNTRANS_RISCV
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N RISCV_L2N
+#define DYNTRANS_L3N RISCV_L3N
+#if !defined(RISCV_L2N) || !defined(RISCV_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE riscv_l2_64_table
+#define DYNTRANS_L3_64_TABLE riscv_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC riscv_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE RISCV_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT RISCV_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE riscv_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY riscv_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR RISCV_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY RISCV_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE riscv_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE riscv_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS riscv_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC riscv_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS riscv_combine_instructions
+#define DISASSEMBLE riscv_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_riscv_instr.c */
+#define instr(n) riscv_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) riscv32_instr_ ## n
+
+#endif
+
+
+#define X(n) void riscv_instr_ ## n(struct cpu *cpu, \
+ struct riscv_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.riscv.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct riscv_instr_call nothing_call = { instr(nothing), {0,0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_riscv_tail.c gxemul-0.7.0/src/cpus/tmp_riscv_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_riscv_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_riscv_tail.c	2022-10-18 16:37:22.110770500 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF riscv_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES riscv_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF riscv_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC riscv_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE riscv_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE riscv_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW riscv_memory_rw
+#define MEM_RISCV
+#include "memory_rw.c"
+#undef MEM_RISCV
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC riscv_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC riscv_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS riscv_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) riscv_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_riscv_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF riscv_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS riscv32_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void riscv32_instr_ ## n(struct cpu *cpu, \
+	struct riscv_instr_call *ic)
+#define instr(n) riscv32_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY riscv32_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC riscv32_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE riscv32_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE riscv32_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC riscv32_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC riscv32_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS riscv32_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) riscv32_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_riscv_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS riscv_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 riscv32_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF riscv32_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(riscv,"RISCV")
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_sh_head.c gxemul-0.7.0/src/cpus/tmp_sh_head.c
--- gxemul-0.7.0.orig/src/cpus/tmp_sh_head.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_sh_head.c	2022-10-18 16:37:22.110770500 +0000
@@ -0,0 +1,67 @@
+
+/*  AUTOMATICALLY GENERATED! Do not edit.  */
+
+#include <assert.h>
+#include "debugger.h"
+#define DYNTRANS_MAX_VPH_TLB_ENTRIES SH_MAX_VPH_TLB_ENTRIES
+#define DYNTRANS_ARCH sh
+#define DYNTRANS_SH
+#ifndef DYNTRANS_32
+#define DYNTRANS_L2N SH_L2N
+#define DYNTRANS_L3N SH_L3N
+#if !defined(SH_L2N) || !defined(SH_L3N)
+#error arch_L2N, and arch_L3N must be defined for this arch!
+#endif
+#define DYNTRANS_L2_64_TABLE sh_l2_64_table
+#define DYNTRANS_L3_64_TABLE sh_l3_64_table
+#endif
+#ifndef DYNTRANS_PAGESIZE
+#define DYNTRANS_PAGESIZE 4096
+#endif
+#define DYNTRANS_IC sh_instr_call
+#define DYNTRANS_IC_ENTRIES_PER_PAGE SH_IC_ENTRIES_PER_PAGE
+#define DYNTRANS_INSTR_ALIGNMENT_SHIFT SH_INSTR_ALIGNMENT_SHIFT
+#define DYNTRANS_TC_PHYSPAGE sh_tc_physpage
+#define DYNTRANS_INVALIDATE_TLB_ENTRY sh_invalidate_tlb_entry
+#define DYNTRANS_ADDR_TO_PAGENR SH_ADDR_TO_PAGENR
+#define DYNTRANS_PC_TO_IC_ENTRY SH_PC_TO_IC_ENTRY
+#define DYNTRANS_TC_ALLOCATE sh_tc_allocate_default_page
+#define DYNTRANS_TC_PHYSPAGE sh_tc_physpage
+#define DYNTRANS_PC_TO_POINTERS sh_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC sh_pc_to_pointers_generic
+#define COMBINE_INSTRUCTIONS sh_combine_instructions
+#define DISASSEMBLE sh_cpu_disassemble_instr
+
+extern bool single_step;
+extern bool about_to_enter_single_step;
+extern int single_step_breakpoint;
+extern int old_quiet_mode;
+extern int quiet_mode;
+
+/* instr uses the same names as in cpu_sh_instr.c */
+#define instr(n) sh_instr_ ## n
+
+#ifdef DYNTRANS_DUALMODE_32
+#define instr32(n) sh32_instr_ ## n
+
+#endif
+
+
+#define X(n) void sh_instr_ ## n(struct cpu *cpu, \
+ struct sh_instr_call *ic)
+
+/*
+ *  nothing:  Do nothing.
+ *
+ *  The difference between this function and a "nop" instruction is that
+ *  this function does not increase the program counter.  It is used to "get out" of running in translated
+ *  mode.
+ */
+X(nothing)
+{
+	cpu->cd.sh.next_ic --;
+	cpu->ninstrs --;
+}
+
+static struct sh_instr_call nothing_call = { instr(nothing), {0,0} };
+
diff -Nru gxemul-0.7.0.orig/src/cpus/tmp_sh_tail.c gxemul-0.7.0/src/cpus/tmp_sh_tail.c
--- gxemul-0.7.0.orig/src/cpus/tmp_sh_tail.c	1970-01-01 00:00:00.000000000 +0000
+++ gxemul-0.7.0/src/cpus/tmp_sh_tail.c	2022-10-18 16:37:22.111770200 +0000
@@ -0,0 +1,132 @@
+
+/*
+ *  AUTOMATICALLY GENERATED! Do not edit.
+ */
+
+extern size_t dyntrans_cache_size;
+#ifdef DYNTRANS_32
+#define MODE32
+#endif
+#define DYNTRANS_FUNCTION_TRACE_DEF sh_cpu_functioncall_trace
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_FUNCTION_TRACE_DEF
+
+#define DYNTRANS_INIT_TABLES sh_cpu_init_tables
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INIT_TABLES
+
+#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF sh_tc_allocate_default_page
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE_DEF
+
+#define DYNTRANS_INVAL_ENTRY
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC sh_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE sh_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE sh_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define MEMORY_RW sh_memory_rw
+#define MEM_SH
+#include "memory_rw.c"
+#undef MEM_SH
+#undef MEMORY_RW
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC sh_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC sh_pc_to_pointers_generic
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#define COMBINE_INSTRUCTIONS sh_combine_instructions
+#ifndef DYNTRANS_32
+#define reg(x) (*((uint64_t *)(x)))
+#define MODE_uint_t uint64_t
+#define MODE_int_t int64_t
+#else
+#define reg(x) (*((uint32_t *)(x)))
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#endif
+#define COMBINE(n) sh_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_sh_instr.c"
+
+#define DYNTRANS_RUN_INSTR_DEF sh_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#ifdef DYNTRANS_DUALMODE_32
+#undef COMBINE_INSTRUCTIONS
+#define COMBINE_INSTRUCTIONS sh32_combine_instructions
+#undef X
+#undef instr
+#undef reg
+#define X(n) void sh32_instr_ ## n(struct cpu *cpu, \
+	struct sh_instr_call *ic)
+#define instr(n) sh32_instr_ ## n
+#ifdef HOST_LITTLE_ENDIAN
+#define reg(x) ( *((uint32_t *)(x)) )
+#else
+#define reg(x) ( *((uint32_t *)(x)+1) )
+#endif
+#define MODE32
+#undef MODE_uint_t
+#undef MODE_int_t
+#define MODE_uint_t uint32_t
+#define MODE_int_t int32_t
+#define DYNTRANS_INVAL_ENTRY
+#undef DYNTRANS_INVALIDATE_TLB_ENTRY
+#define DYNTRANS_INVALIDATE_TLB_ENTRY sh32_invalidate_tlb_entry
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVAL_ENTRY
+
+#define DYNTRANS_INVALIDATE_TC sh32_invalidate_translation_caches
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC
+
+#define DYNTRANS_INVALIDATE_TC_CODE sh32_invalidate_code_translation
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_INVALIDATE_TC_CODE
+
+#define DYNTRANS_UPDATE_TRANSLATION_TABLE sh32_update_translation_table
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_UPDATE_TRANSLATION_TABLE
+
+#define DYNTRANS_PC_TO_POINTERS_FUNC sh32_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS_GENERIC sh32_pc_to_pointers_generic
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS sh32_pc_to_pointers
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_PC_TO_POINTERS_FUNC
+
+#undef DYNTRANS_PC_TO_POINTERS_GENERIC
+
+#undef COMBINE
+#define COMBINE(n) sh32_combine_ ## n
+#include "quick_pc_to_pointers.h"
+#include "cpu_sh_instr.c"
+
+#undef DYNTRANS_PC_TO_POINTERS
+#define DYNTRANS_PC_TO_POINTERS sh_pc_to_pointers
+#define DYNTRANS_PC_TO_POINTERS32 sh32_pc_to_pointers
+
+#define DYNTRANS_RUN_INSTR_DEF sh32_run_instr
+#include "cpu_dyntrans.c"
+#undef DYNTRANS_RUN_INSTR_DEF
+
+#endif /*  DYNTRANS_DUALMODE_32  */
+
+
+CPU_FAMILY_INIT(sh,"SH")
+