diff --git a/include/ntapi/bits/nt32/nt_atomic_i386_asm__gcc.h b/include/ntapi/bits/nt32/nt_atomic_i386_asm__gcc.h
index 002a62a..c8706ae 100644
--- a/include/ntapi/bits/nt32/nt_atomic_i386_asm__gcc.h
+++ b/include/ntapi/bits/nt32/nt_atomic_i386_asm__gcc.h
@@ -400,7 +400,7 @@ static __inline__ void at_locked_xor_64(
 
 
 static __inline__ void at_store(
-	volatile intptr_t *	dst,
+	intptr_t volatile *	dst,
 	intptr_t		val)
 {
 	__asm__(
@@ -414,7 +414,7 @@ static __inline__ void at_store(
 
 
 static __inline__ void at_store_32(
-	volatile int32_t *	dst,
+	int32_t volatile *	dst,
 	int32_t			val)
 {
 	__asm__(
@@ -428,7 +428,7 @@ static __inline__ void at_store_32(
 
 
 static __inline__ void at_store_64(
-	volatile int64_t *	dst,
+	int64_t volatile *	dst,
 	int64_t			xchg)
 {
 	int64_t	cmp;
diff --git a/include/ntapi/bits/nt32/nt_atomic_i386_asm__msvc.h b/include/ntapi/bits/nt32/nt_atomic_i386_asm__msvc.h
index 37dc496..5ae6585 100644
--- a/include/ntapi/bits/nt32/nt_atomic_i386_asm__msvc.h
+++ b/include/ntapi/bits/nt32/nt_atomic_i386_asm__msvc.h
@@ -271,7 +271,7 @@ static __inline__ void at_locked_xor_64(
 
 
 static __inline__ void at_store(
-	volatile intptr_t *	dst,
+	intptr_t volatile *	dst,
 	intptr_t		val)
 {
 	_ReadWriteBarrier();
@@ -283,7 +283,7 @@ static __inline__ void at_store(
 
 
 static __inline__ void at_store_32(
-	volatile int32_t *	dst,
+	int32_t volatile *	dst,
 	int32_t			val)
 {
 	_ReadWriteBarrier();
@@ -295,7 +295,7 @@ static __inline__ void at_store_32(
 
 
 static __inline__ void at_store_64(
-	volatile int64_t *	dst,
+	int64_t volatile *	dst,
 	int64_t			val)
 {
 	_ReadWriteBarrier();
diff --git a/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__gcc.h b/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__gcc.h
index 2162b1c..4c6b88a 100644
--- a/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__gcc.h
+++ b/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__gcc.h
@@ -418,7 +418,7 @@ static __inline__ void at_locked_xor_64(
 
 
 static __inline__ void at_store(
-	volatile intptr_t *	dst,
+	intptr_t volatile *	dst,
 	intptr_t		val)
 {
 	__asm__(
@@ -432,7 +432,7 @@ static __inline__ void at_store(
 
 
 static __inline__ void at_store_32(
-	volatile int32_t *	dst,
+	int32_t volatile *	dst,
 	int32_t			val)
 {
 	__asm__(
@@ -446,7 +446,7 @@ static __inline__ void at_store_32(
 
 
 static __inline__ void at_store_64(
-	volatile int64_t *	dst,
+	int64_t volatile *	dst,
 	int64_t			val)
 {
 	__asm__(
diff --git a/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__msvc.h b/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__msvc.h
index e202187..525eb68 100644
--- a/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__msvc.h
+++ b/include/ntapi/bits/nt64/nt_atomic_x86_64_asm__msvc.h
@@ -271,7 +271,7 @@ static __inline__ void at_locked_xor_64(
 
 
 static __inline__ void at_store(
-	volatile intptr_t *	dst,
+	intptr_t volatile *	dst,
 	intptr_t		val)
 {
 	_ReadWriteBarrier();
@@ -283,7 +283,7 @@ static __inline__ void at_store(
 
 
 static __inline__ void at_store_32(
-	volatile int32_t *	dst,
+	int32_t volatile *	dst,
 	int32_t			val)
 {
 	_ReadWriteBarrier();
@@ -295,7 +295,7 @@ static __inline__ void at_store_32(
 
 
 static __inline__ void at_store_64(
-	volatile int64_t *	dst,
+	int64_t volatile *	dst,
 	int64_t			val)
 {
 	_ReadWriteBarrier();